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Commit 15cff341 authored by Rahix's avatar Rahix
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Merge 'SpO2 sensor improvements' 

See merge request card10/firmware!414
parents c28aed8d 5a7cc7c9
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epicardium/modules/hardware.c
View file @ 15cff341
......@@ -13,6 +13,7 @@
#include "pb.h"
#include "pmic.h"
#include "portexpander.h"
#include "max86150.h"
#include "gpio.h"
#include "i2c.h"
......@@ -191,6 +192,8 @@ int hardware_early_init(void)
*/
max86150_mutex_init();
max86150_shut_down();
/* Allow user space to trigger interrupts.
* Used for BLE, not sure if needed. */
SCB->CCR |= SCB_CCR_USERSETMPEND_Msk;
......
epicardium/modules/max86150.c
View file @ 15cff341
......@@ -66,6 +66,8 @@ int epic_max86150_enable_sensor(
ppg_sample_rate = MAX86150_PPG_SAMPLERATE_100;
} else if (config->ppg_sample_rate == 200) {
ppg_sample_rate = MAX86150_PPG_SAMPLERATE_200;
} else if (config->ppg_sample_rate == 400) {
ppg_sample_rate = MAX86150_PPG_SAMPLERATE_400;
} else {
result = -EINVAL;
goto out_free;
......@@ -104,23 +106,16 @@ int epic_max86150_disable_sensor(void)
mutex_lock(&max86150_mutex);
hwlock_acquire(HWLOCK_I2C);
max86150_shut_down();
max86150_sensor_active = false;
struct stream_info *stream = &max86150_stream;
result = stream_deregister(SD_MAX86150, stream);
if (result < 0) {
goto out_free;
if (result == 0) {
vQueueDelete(stream->queue);
stream->queue = NULL;
}
vQueueDelete(stream->queue);
stream->queue = NULL;
// disable max86150 leds
max86150_set_led_red_amplitude(0);
max86150_set_led_ir_amplitude(0);
max86150_sensor_active = false;
result = 0;
out_free:
hwlock_release(HWLOCK_I2C);
mutex_unlock(&max86150_mutex);
return result;
......@@ -140,7 +135,6 @@ static int max86150_handle_sample(struct max86150_sensor_data *data)
LOG_WARN("max86150", "queue full");
}
max86150_stream.was_full = true;
return -EIO;
} else {
max86150_stream.was_full = false;
}
......
lib/meson.build
View file @ 15cff341
......@@ -5,6 +5,7 @@ subdir('./vendor/Bosch/BME680/')
subdir('./vendor/Bosch/BMA400/')
subdir('./vendor/Maxim/MAX77650/')
subdir('./vendor/Maxim/MAX86150/')
subdir('./vendor/Maxim/rd117_mbed/')
subdir('./gfx/')
subdir('./FreeRTOS/')
......
lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665.ld
View file @ 15cff341
......@@ -57,6 +57,8 @@ SRAM_ADDR = DEFINED(ARM_SRAM_START) ? ARM_SRAM_START : (SDMA_CODE_ADDR + SDMA_CO
/* SRAM_SIZE must be defined */
SRAM_LEN = SRAM_SIZE + SRAM_ORIGIN - SRAM_ADDR;
STACK_SIZE = 0x1000;
/* SPID and SPIX Sections here are maximum possible sizes */
/* If used, they should be adjusted for the external Flash/RAM size */
MEMORY {
......@@ -191,18 +193,11 @@ SECTIONS {
_ebss = ALIGN(., 4);
} > SRAM
/* Setup the stack for Core 1, it will only be used if the user code
* includes a definition of Stack_Size_Core1, which defines the space
* reserved above the main core's stack for core 1's stack */
__StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size.
* If core 1 is used, set the stack to the bottom of Core 1's stack region */
__StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - Stack_Size;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size. */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
/*__StackLimit = __StackTop - Stack_Size; */
__StackLimit = __StackTop - STACK_SIZE;
.heap (COPY):
{
......
lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_boot.ld
View file @ 15cff341
......@@ -34,6 +34,8 @@
*
******************************************************************************/
STACK_SIZE = 0x1000;
/* SPID and SPIX Sections here are maximum possible sizes */
/* If used, they should be adjusted for the external Flash/RAM size */
MEMORY {
......@@ -120,18 +122,11 @@ SECTIONS {
_ebss = ALIGN(., 4);
} > SRAM
/* Setup the stack for Core 1, it will only be used if the user code
* includes a definition of Stack_Size_Core1, which defines the space
* reserved above the main core's stack for core 1's stack */
__StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size.
* If core 1 is used, set the stack to the bottom of Core 1's stack region */
__StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - Stack_Size;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size. */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
/*__StackLimit = __StackTop - Stack_Size; */
__StackLimit = __StackTop - STACK_SIZE;
.heap (COPY):
{
......
lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core0.ld
View file @ 15cff341
......@@ -34,6 +34,8 @@
*
******************************************************************************/
STACK_SIZE = 0x1000;
/* SPID and SPIX Sections here are maximum possible sizes */
/* If used, they should be adjusted for the external Flash/RAM size */
MEMORY {
......@@ -120,18 +122,11 @@ SECTIONS {
_ebss = ALIGN(., 4);
} > SRAM
/* Setup the stack for Core 1, it will only be used if the user code
* includes a definition of Stack_Size_Core1, which defines the space
* reserved above the main core's stack for core 1's stack */
__StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size.
* If core 1 is used, set the stack to the bottom of Core 1's stack region */
__StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - Stack_Size;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size. */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
/*__StackLimit = __StackTop - Stack_Size; */
__StackLimit = __StackTop - STACK_SIZE;
.heap (COPY):
{
......
lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld
View file @ 15cff341
......@@ -34,6 +34,8 @@
*
******************************************************************************/
STACK_SIZE = 0x2000;
/* SPID and SPIX Sections here are maximum possible sizes */
/* If used, they should be adjusted for the external Flash/RAM size */
MEMORY {
......@@ -120,18 +122,11 @@ SECTIONS {
_ebss = ALIGN(., 4);
} > SRAM
/* Setup the stack for Core 1, it will only be used if the user code
* includes a definition of Stack_Size_Core1, which defines the space
* reserved above the main core's stack for core 1's stack */
__StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size.
* If core 1 is used, set the stack to the bottom of Core 1's stack region */
__StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - Stack_Size;
/* Set stack top to end of RAM, and stack limit move down by Stack_Size. */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
/*__StackLimit = __StackTop - Stack_Size; */
__StackLimit = __StackTop - STACK_SIZE;
.heap (COPY):
{
......
lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S
View file @ 15cff341
......@@ -63,12 +63,16 @@
.equ ARM_SRAM_START, __ARM_SRAM_START
#endif
/*
XXX: card10: Stack size moved to linker scripts.
.globl Stack_Size
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x00001000
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
......@@ -76,7 +80,7 @@ __StackLimit:
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
*/
.section .heap
.align 3
#ifdef __HEAP_SIZE
......@@ -250,6 +254,19 @@ ecc_init_exit:
ldr r0, =__StackTop
mov sp, r0
/*
* Loop to initialize out stack section to aid debugging.
*/
ldr r1, =__StackLimit
ldr r2, =__StackTop
movs r0, 0xAAAAAAAA
.LC3:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .LC3
/* PreInit runs before any RAM initialization. Example usage: DDR setup, etc. */
ldr r0, =PreInit
......
lib/vendor/Maxim/MAX86150/max86150.c
View file @ 15cff341
......@@ -35,7 +35,7 @@ static const uint8_t MAX86150_FIFOCONTROL2 = 0x0A;
static const uint8_t MAX86150_SYSCONTROL = 0x0D;
static const uint8_t MAX86150_PPGCONFIG1 = 0x0E;
static const uint8_t MAX86150_PPGCONFIG2 = 0x0F;
static const uint8_t MAX86150_LED_PROX_AMP = 0x10;
static const uint8_t MAX86150_PROXINTTHRESH = 0x10;
static const uint8_t MAX86150_LED1_PULSEAMP = 0x11;
static const uint8_t MAX86150_LED2_PULSEAMP = 0x12;
......@@ -44,7 +44,6 @@ static const uint8_t MAX86150_LED_PILOT_PA = 0x15;
static const uint8_t MAX86150_ECG_CONFIG1 = 0x3C;
static const uint8_t MAX86150_ECG_CONFIG3 = 0x3E;
static const uint8_t MAX86150_PROXINTTHRESH = 0x10;
static const uint8_t MAX86150_PARTID = 0xFF;
......@@ -65,7 +64,7 @@ static const uint8_t MAX86150_INT_PROX_INT_MASK = (byte)~0b00010000;
static const uint8_t MAX86150_INT_PROX_INT_ENABLE = 0x10;
static const uint8_t MAX86150_INT_PROX_INT_DISABLE = 0x00;
static const uint8_t MAX86150_SAMPLEAVG_MASK = (byte)~0b00000111;
static const uint8_t MAX86150_SMP_AVE_MASK = (byte)~0b00000111;
static const uint8_t MAX86150_ROLLOVER_MASK = (byte)~0b00010000;
static const uint8_t MAX86150_ROLLOVER_ENABLE = 0b00010000;
......@@ -337,7 +336,7 @@ void max86150_set_led_ir_amplitude(uint8_t amplitude)
void max86150_set_led_proximity_amplitude(uint8_t amplitude)
{
max86150_write_register(
MAX86150_ADDRESS, MAX86150_LED_PROX_AMP, amplitude
MAX86150_ADDRESS, MAX86150_LED_PILOT_PA, amplitude
);
}
......@@ -400,7 +399,7 @@ void max86150_disableSlots(void)
void max86150_set_ppg_averaging(uint8_t numberOfSamples)
{
max86150_bit_mask(
MAX86150_FIFOCONFIG, MAX86150_SAMPLEAVG_MASK, numberOfSamples
MAX86150_PPGCONFIG2, MAX86150_SMP_AVE_MASK, numberOfSamples
);
}
......@@ -536,7 +535,11 @@ void max86150_setup(const uint8_t ppg_sample_rate)
max86150_fifo_enable_slot(1, MAX86150_SLOT_RED_LED);
max86150_fifo_enable_slot(2, MAX86150_SLOT_IR_LED);
max86150_fifo_enable_slot(3, MAX86150_SLOT_ECG);
// ECG is disabled for now as the FIFO code does not
// manage the increased FIFO rate correctly.
// E.g. instead of providging PPG data at 100 sps, the
// code provides PPG data at 200 sps
//max86150_fifo_enable_slot(3, MAX86150_SLOT_ECG);
//max86150_fifo_enable_slot(4, MAX86150_SLOT_NONE);
max86150_set_ppg_adc_range(MAX86150_ADCRANGE_16384);
......@@ -663,13 +666,15 @@ uint8_t max86150_get_sample(uint32_t *red, uint32_t *ir, int32_t *ecg)
MXC_I2C1_BUS0,
MAX86150_ADDRESS << 1,
data,
3 * 3,
3 * 2,
0
);
*red = (data[0] << 16) | (data[1] << 8) | (data[2]);
*ir = (data[3] << 16) | (data[4] << 8) | (data[5]);
*ecg = (data[6] << 16) | (data[7] << 8) | (data[8]);
// According to datasheet MS bits of PPG have to be masked
*red = ((data[0] << 16) | (data[1] << 8) | (data[2])) & 0x7FFFF;
*ir = ((data[3] << 16) | (data[4] << 8) | (data[5])) & 0x7FFFF;
//*ecg = (data[6] << 16) | (data[7] << 8) | (data[8]);
*ecg = 0;
}
} //End readPtr != writePtr
......
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<div class="title">Adafruit_NeoPixel.cpp File Reference</div> </div>
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<div class="textblock"><code>#include &quot;<a class="el" href="_adafruit___neo_pixel_8h_source.html">Adafruit_NeoPixel.h</a>&quot;</code><br/>
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