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  17. 07 Sep, 2012 1 commit
    • Chuen Chou's avatar
      flash: fix sam3 page read/write address computation error · e26ddb62
      Chuen Chou authored
      
      
      In at91sam3.c for Atmel SAM3 flash support, there are arithmetic errors in the functions sam3_page_read() and sam3_page_write().
      Address locations are computed incorrectly due to an extra addition operation. This leads to memory locations being skipped during
      flash writes and reads.
      
      Smaller programs are written successfully into flash, with memory gaps, while larger programs of legitimate size fail because the
      skipped memory is not utilized and therefore unavailable.
      
      The changes address this condition, and have been tested with an Atmel SAM3X-EK evaluation board.
      
      Change-Id: I9ea3b9ed0130b71cbc32b2294e31a6a2bc71b47a
      Signed-off-by: default avatarChuen Chou <zhouquan27@gmail.com>
      Reviewed-on: http://openocd.zylin.com/806
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarFreddie Chopin <freddie.chopin@gmail.com>
      e26ddb62
  18. 26 Jun, 2012 1 commit
  19. 04 May, 2012 1 commit
  20. 26 Apr, 2012 1 commit
  21. 13 Mar, 2012 1 commit
    • Olivier Schonken's avatar
      topic: Added support for the SAM3X/A variants · 736e8bb7
      Olivier Schonken authored
      
      
      Atmel introduced 7 new Cortex-M3 processors on 2012-02-28
      SAM3X4C - 256KB flash
      SAM3X4E - 256KB flash
      SAM3X8C - 512KB flash
      SAM3X8E - 512KB flash
      SAM3X8H (Only on dev-kit - not in production...) - 512KB flash
      SAM3A4C - 256KB flash
      SAM3A8C - 256KB flash
      
      The SAM3X/A processors still suffer from the "6 waitstates needed
      to program device" errata.
      
      The CIDR address for the SAM3X/A processors are different from the
      other SAM3 processors.  Unfortunately, the chip identification register
      is not at a constant address across all of the SAM3 series'. As a
      consequence, a simple heuristic is used to find where it's
      at... If the contents at the first address is zero, then we know
      that the second address is where the chip id register is.
      We can deduce this because for those SAM's that have the chip id @ 0x400e0940,
      the first address, 0x400e0740, is located in the memory map of the Power
      Management Controller (PMC). Furthermore, the address is not used by the PMC.
      So when read, the memory controller returns zero.
      
      Another interesting change is the flash bank address for flash bank 1.
      It is not fixed at 0x00100000 like the Sam3U.  Bank 1 of the at91sam3a/x
      series starts at 0x00080000 + half the total flash size.  Thus for the 256KB
      devices Bank 1 is located at 0x000A0000, and for the 512KB devices Bank 1 is
      located at 0x000C0000.
      
      The configuration files for the SAM3X/A processors will follow
      
      Change-Id: I6c3a707c00e05d993a2ad1d5a423f23b37ffd553
      Signed-off-by: default avatarOlivier Schonken <olivier.schonken@gmail.com>
      Reviewed-on: http://openocd.zylin.com/505
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarSpencer Oliver <spen@spen-soft.co.uk>
      736e8bb7
  22. 06 Mar, 2012 3 commits
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  32. 17 Mar, 2011 1 commit
    • Uwe Hermann's avatar
      Fix a bunch of typos. · 33a17fd3
      Uwe Hermann authored
      Fix a bunch of typos.
      
      Most are in code comments, so nothing should break. UNKOWN_COMMAND and
      CMD_UNKOWN are not used elsewhere, so correcting the spelling should
      also not break anything.
      33a17fd3
  33. 26 Jan, 2011 1 commit
  34. 09 Jan, 2011 1 commit
    • Eric Wetzel's avatar
      nit: more LOG_* \n fixes · 0535531d
      Eric Wetzel authored
      Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages
      
      Remove LOG_INFO_N
      LOG_INFO_N was only used once and had a \n at the end
      
      Change LOG_USER_N calls that end with \n to LOG_USER
      0535531d