1. 13 Nov, 2009 4 commits
  2. 06 Nov, 2009 2 commits
  3. 05 Nov, 2009 1 commit
  4. 12 Sep, 2009 1 commit
    • oharboe's avatar
      David Brownell <david-b@pacbell.net> · c993d75d
      oharboe authored
      Cleanup some the downloaded ARM target algorithm code:
      
       - Provide more complete disassembly of the DCC bulk write code
      
       - Make code blocks "static const", in case GCC doesn't
      
       - Fix some tabbing/layout issues
      
       - Make some arm7_9_common.h flags be "bool" not "int"; and compact
         the layout a bit (group most bools together)
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      c993d75d
  5. 18 Aug, 2009 1 commit
  6. 07 Aug, 2009 1 commit
  7. 21 Jul, 2009 3 commits
    • ntfreak's avatar
      David Brownell <david-b@pacbell.net>: · d460a7cd
      ntfreak authored
      Dump SP on poll, and show whether it's MSP or PSP.
      
      Thread mode can use either stack pointer, so this is
      part of the state that's not yet displayed.
      
      Shrink some lines.
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2555 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      d460a7cd
    • ntfreak's avatar
      David Brownell <david-b@pacbell.net>: · 4da019ed
      ntfreak authored
      Clean up treatment of registers in ARMv7-M and Cortex-M3. 
      
       - At the arch level:
          * Just list registers and names; don't impose core-specific
            policy about how they are accessed.
          * Each register has a symbol.
          * Remove the register mode field (irrelevant to debugger)
      
       - At the core/implementation level:
          * Just map the registers to their relevant access methods;
            don't require the arch level to say how that should work
            (cores other than Cortex-M3 could do it differently).
          * Don't use undefined bits from register 20.
          * Use register IDs that are part of the ARMv7-M interface.
      
      In short, there's now a real distinction between the arch
      and core layers.
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2554 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      4da019ed
    • ntfreak's avatar
      David Brownell <david-b@pacbell.net>: · cd0ca916
      ntfreak authored
      Revert parts of the previous ARMv7-M register patch.
      It turns out that part of the issue is a documentation
      problem for the Cortex-M3 r1 parts. So for the rest,
      simpler fixes are possible (in followup patch).
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      cd0ca916
  8. 17 Jul, 2009 1 commit
  9. 16 Jul, 2009 2 commits
    • zwelch's avatar
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>,... · 1af6b72f
      zwelch authored
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, David Brownell <david-b@pacbell.net>:
      
      Move the dap command handler implementations to arm_adi_v5.c,
      leaving just thin wrappers in armv7m.c.  There should be no
      change in functionality here.  (From Magnus.)
      
      Minor style cleanup:  whitespace, line length, etc.  Update spec
      references to use docs which are currently available.  (From Dave.)
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      1af6b72f
    • zwelch's avatar
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>,... · 16e17ab1
      zwelch authored
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, David Brownell <david-b@pacbell.net>:
      
      Some cleanup of the ARMv7-M support:
      
       - Reference the relevant ARMv7-M ARM doc (DDI 0405C to non-Vendors), and
         update the Cortex-M3 doc refs (DDI 0337C is no longer available).
      
       - Those registers aren't actually general, and some are incorrect (per all
         public docs anyway).  Update comments and code accordingly.
      
           * What the Core Debug facility exposes is *implementation-specific*
             not architectural.  These values aren't fully portable.  They match
             Cortex-M3 ... so no current implementation will make trouble, but
             the next v7m implementation might.
      
           * Four of the registers are actually not exposed that way.  Before
             Cortex-M3 r2p0 they are read/written through MRS/MSR instructions.
             In that newest silicon, they are four bytes in one register, not
             four separate registers.
      
       - Update the CM3 code to report when that one register is available,
         and not try to access it when it isn't.  Also declare the register
         numbers that an eventual MRS/MSR solution will need to be using.
      
       - Stop line wrapping the exception labels.
      
      So for parts before r2p0 OpenOCD behavior is effectively unchanged, and
      still buggy; but for those newer parts a few things might now be correct.
      
      Most current Cortex-M3 parts use r1p1 (or earlier); this seems to include
      most LM3S parts and all STM32 parts.  Parts using r2p0 are available, and
      include fourth generation LM3S parts ("Tempest") plus AT91SAM3 and LPC17xx
      parts which are now sampling.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2543 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      16e17ab1
  10. 23 Jun, 2009 5 commits
  11. 21 Jun, 2009 1 commit
  12. 18 Jun, 2009 3 commits
  13. 02 Jun, 2009 1 commit
    • ntfreak's avatar
      - change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use... · 7dc29156
      ntfreak authored
      - change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use swjdp_common_t *swjdp instead of arm_jtag_t *jtag_info
      - change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs.
      - add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus
      - Set default memaccess value to 8 for Cortex-M3.
      - Add dap memaccess command.
      - document all armv7 dap cmds.
      - Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu].
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      7dc29156
  14. 31 May, 2009 1 commit
  15. 11 May, 2009 1 commit
  16. 06 May, 2009 1 commit
  17. 27 Apr, 2009 2 commits
  18. 19 Apr, 2009 1 commit
  19. 03 Apr, 2009 1 commit
  20. 20 Nov, 2008 1 commit
  21. 06 Nov, 2008 1 commit
  22. 02 Nov, 2008 1 commit
  23. 14 Oct, 2008 2 commits
  24. 13 Oct, 2008 1 commit
  25. 07 Oct, 2008 1 commit