Commits · ac927559c3ce5406adac34b9d4ca4ecb37a48181 · card10 / openocd

13 Nov, 2009 13 commits
- target_type_t -> struct target_type · ac927559
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct target_type.
```
  ac927559
- armv4_5_common_t -> struct arm · af949b25
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and just use struct arm.
```
  af949b25
- cortex_a8_wrp_t -> struct cortex_a8_wrp · d727f978
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct cortex_a8_wrp.
```
  d727f978
- cortex_a8_brp_t -> struct cortex_a8_brp · 42fb6b88
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct cortex_a8_brp.
```
  42fb6b88
- breakpoint_t -> struct breakpoint · 53c05c8b
  Zachary T Welch authored Nov 13, 2009
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Remove misleading typedef and redundant suffix from struct breakpoint.
```
  53c05c8b
- working_area_t -> struct working_area · 46fc1d57
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct working_area.
```
  46fc1d57
- reg_cache_t -> struct reg_cache · 74d09617
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct reg_cache.
```
  74d09617
- cortex_a8_common_t -> struct cortex_a8_common · a1971eca
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct cortex_a8_common.
```
  a1971eca
- armv7a_common_t -> struct armv7a_common · 248448ee
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct armv7a_common.
```
  248448ee
- swjdp_common_t -> struct swjdp_common · f96d6054
  Zachary T Welch authored Nov 13, 2009
```
Remove misleading typedef and redundant suffix from struct swjdp_common.
```
  f96d6054
- jtag_tap_t -> struct jtag_tap · 42ef503d
  Zachary T Welch authored Nov 13, 2009
```
Search and destroy the jtag_tap_t typedef.  This also cleans up a
layering violation, removing the declaration from types.h.
```
  42ef503d
- use COMMAND_HANDLER macro to define all commands · cfc4d5c6
  Zachary T Welch authored Nov 09, 2009
  
  cfc4d5c6
- Cortex-A8: fix indent · 5eb638c7
  David Brownell authored Nov 13, 2009
```
The "remove (forward) declarations" patch goofed indentation on the
"cortexa8_target" struct; fix.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
```
  5eb638c7
11 Nov, 2009 1 commit
- cortex_a8: remove declarations, use static keyword · e9974316
  Zachary T Welch authored Nov 10, 2009
  
  e9974316
06 Nov, 2009 1 commit

Cortex-A8: use the new inheritance/nesting scheme · a81df55f

David Brownell authored Nov 05, 2009

Use target_to_armv7a() etc, replacing needless pointer traversals.
Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

a81df55f

05 Nov, 2009 3 commits

cortex_a8: add mrc mcr interface. · 1ebdc244
Øyvind Harboe authored Oct 24, 2009
```
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
```
1ebdc244

target: remove unused interface fn that clutters code · af66678c

Øyvind Harboe authored Oct 31, 2009



The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

af66678c

debug interface: get rid of unused pre_debug fn · acff2521

Øyvind Harboe authored Oct 30, 2009



Removing unused code makes it much less mysterius.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

acff2521

13 Oct, 2009 1 commit
- Cleanup: nuke trailling whitespaces · 6a2fd7ca
  Yauheni Kaliuta authored Oct 13, 2009
```
Signed-off-by: Yauheni Kaliuta <y.kaliuta@gmail.com>
```
  6a2fd7ca
02 Oct, 2009 5 commits
- It is not possible to invalidate I-Cache on memory writes while the target is running · 16742b52
  mlu authored Oct 02, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2795 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  16742b52
- Make sure that DSCR_DTR_RX is not full before writing · 49f3497b
  mlu authored Oct 02, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2794 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  49f3497b
- More error reporting in Cortex_a8 execute_opcode · 1b90a9f5
  mlu authored Oct 02, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2793 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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  1b90a9f5
- Added asser_reset and deassert_reset for cortex_a8 · 84dabdcc
  mlu authored Oct 02, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2792 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  84dabdcc
- Added asser_reset and deassert_reset for cortex_a8 · c74ede42
  mlu authored Oct 02, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2791 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  c74ede42
21 Sep, 2009 1 commit

Remove annoying end-of-line whitespace from most src/* · 86a7d813

dbrownell authored Sep 21, 2009

files; omitted src/httpd


git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60

86a7d813

19 Sep, 2009 1 commit
- Avoid cache invalidation when writing to hardware debug registers · 781997f5
  mlu authored Sep 19, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  781997f5
18 Sep, 2009 1 commit
- Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.c · 7b3be0e2
  mlu authored Sep 18, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  7b3be0e2
16 Sep, 2009 1 commit
- Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASE · 45f03dd9
  mlu authored Sep 16, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2716 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  45f03dd9
14 Sep, 2009 2 commits
- Check return values to avoid infinite wait in loop on error. · 45674af6
  mlu authored Sep 14, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  45674af6
- Cache invalidation when writing to memory · d4e4d65d
  mlu authored Sep 14, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  d4e4d65d
13 Sep, 2009 1 commit

Fix argument passing in cortex_a8_write_cp. · c4ee12ea

mlu authored Sep 13, 2009

git-svn-id: svn://svn.berlios.de/openocd/trunk@2701 b42882b7-edfa-0310-969c-e2dbd0fdcd60

c4ee12ea

08 Sep, 2009 1 commit
- Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state. · f6a5749c
  mlu authored Sep 08, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  f6a5749c
07 Sep, 2009 1 commit
- Improved handling of instruction set state, helps for debugging Thumb state. · 2c76cd71
  mlu authored Sep 07, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
  2c76cd71
04 Sep, 2009 2 commits

Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode. · 81b57a3f

oharboe authored Sep 04, 2009

By enabling this bit, the processor halts when a debug event
such as breakpoint occurs.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60

81b57a3f

Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR register · 51be978b
oharboe authored Sep 04, 2009
```
git-svn-id: svn://svn.berlios.de/openocd/trunk@2666 b42882b7-edfa-0310-969c-e2dbd0fdcd60
```
51be978b

26 Aug, 2009 5 commits

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ... · 327ba6cb

oharboe authored Aug 26, 2009

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> cortex-a8: Wait for the CPU to be halted/started

With DCCR we are asking the CPU to halt, we should wait until
the CPU has halted before proceeding with the operation.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2638 b42882b7-edfa-0310-969c-e2dbd0fdcd60

327ba6cb

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org>... · 01000e98

oharboe authored Aug 26, 2009

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> Only dap_ap_select when we are going to do a memory access
in the fast reg case.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2636 b42882b7-edfa-0310-969c-e2dbd0fdcd60

01000e98

Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instruction into · 56a04a34

oharboe authored Aug 26, 2009

the ITR register but it will only be executed when the DSCR[13]
bit is set. The documentation is a bit weird as it classifies
the DSCR as read-only but the pseudo code is writing to it as
well. This is working on a beagleboard.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60

56a04a34

Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it.... · f36d0083

oharboe authored Aug 26, 2009

Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. Remove the trans_mode change as it is done in the mem_ap_read_atomic_u32 function.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2633 b42882b7-edfa-0310-969c-e2dbd0fdcd60

f36d0083

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org>... · 56b34644

oharboe authored Aug 26, 2009

Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> Before executing a new instruction wait for the previous
instruction to be finished. This comes from the pseudo code
of the cortex a8 trm.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2632 b42882b7-edfa-0310-969c-e2dbd0fdcd60

56b34644