1. 17 Jul, 2009 1 commit
  2. 16 Jul, 2009 6 commits
    • oharboe's avatar
      added item to come up with slick new 32 bit jtag_add_xxx() API · 14cbd545
      oharboe authored
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2548 b42882b7-edfa-0310-969c-e2dbd0fdcd60
    • oharboe's avatar
      microscopic whitespace cleanup · bd437719
      oharboe authored
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2547 b42882b7-edfa-0310-969c-e2dbd0fdcd60
    • oharboe's avatar
      microscopic white space fixes · 4deb8530
      oharboe authored
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2546 b42882b7-edfa-0310-969c-e2dbd0fdcd60
    • ntfreak's avatar
      - disable using parport ppdev under win32 hosts · 4ebd353a
      ntfreak authored
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2545 b42882b7-edfa-0310-969c-e2dbd0fdcd60
    • zwelch's avatar
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>,... · 1af6b72f
      zwelch authored
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, David Brownell <david-b@pacbell.net>:
      Move the dap command handler implementations to arm_adi_v5.c,
      leaving just thin wrappers in armv7m.c.  There should be no
      change in functionality here.  (From Magnus.)
      Minor style cleanup:  whitespace, line length, etc.  Update spec
      references to use docs which are currently available.  (From Dave.)
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
    • zwelch's avatar
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>,... · 16e17ab1
      zwelch authored
      Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, David Brownell <david-b@pacbell.net>:
      Some cleanup of the ARMv7-M support:
       - Reference the relevant ARMv7-M ARM doc (DDI 0405C to non-Vendors), and
         update the Cortex-M3 doc refs (DDI 0337C is no longer available).
       - Those registers aren't actually general, and some are incorrect (per all
         public docs anyway).  Update comments and code accordingly.
           * What the Core Debug facility exposes is *implementation-specific*
             not architectural.  These values aren't fully portable.  They match
             Cortex-M3 ... so no current implementation will make trouble, but
             the next v7m implementation might.
           * Four of the registers are actually not exposed that way.  Before
             Cortex-M3 r2p0 they are read/written through MRS/MSR instructions.
             In that newest silicon, they are four bytes in one register, not
             four separate registers.
       - Update the CM3 code to report when that one register is available,
         and not try to access it when it isn't.  Also declare the register
         numbers that an eventual MRS/MSR solution will need to be using.
       - Stop line wrapping the exception labels.
      So for parts before r2p0 OpenOCD behavior is effectively unchanged, and
      still buggy; but for those newer parts a few things might now be correct.
      Most current Cortex-M3 parts use r1p1 (or earlier); this seems to include
      most LM3S parts and all STM32 parts.  Parts using r2p0 are available, and
      include fourth generation LM3S parts ("Tempest") plus AT91SAM3 and LPC17xx
      parts which are now sampling.
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2543 b42882b7-edfa-0310-969c-e2dbd0fdcd60
  3. 15 Jul, 2009 15 commits
  4. 14 Jul, 2009 10 commits
  5. 13 Jul, 2009 1 commit
  6. 12 Jul, 2009 5 commits
  7. 11 Jul, 2009 1 commit
  8. 10 Jul, 2009 1 commit