1. 18 Nov, 2009 17 commits
    • Zachary T Welch's avatar
      use COMMAND_PARSE_ON_OFF where appropriate · 75a37eb5
      Zachary T Welch authored
      Updates all command parsing of "on" and "off" arguments.
    • Zachary T Welch's avatar
      add COMMAND_PARSE_BOOL macro and friends · bd5a1799
      Zachary T Welch authored
      Adds several macros similar to COMMAND_PARSE_NUMBER, but for parsing
      boolean command arguments.  Two flavors are provided to provide
      drop-in compatibility with existing code, allow for the elimination
      of a lot of code bloat while improving the error checking and reporting.
      COMMAND_PARSE_ON_OFF parses "on"/"off" command parameters.
      COMMAND_PARSE_ENABLE parses "enable"/"disable" command parameters.
      Both print the error and return an error out of the calling function.
    • David Brownell's avatar
      ARM: rework "arm reg" output for new mode · bd9d05e1
      David Brownell authored
      Change the layout to show the "Secure Monitor" registers too,
      when they're present.
      Instead of lining registers for each of six (or seven) modes up
      in adjacent vertical columns, display each mode's registers (or
      shadows) in a single block, avoiding duplicate value displays.
      This also lets us shrink the line length to fits in standard 80
      character lines ... six or seven 18-character columns can't fit.
      Relabel "r13" as "sp", so it's more meaningful.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      Cortex-A8: xPSR handling updates · f0c9e89e
      David Brownell authored
      When we read the CPSR on debug entry, update the CPSR cache in all
      cases, not just when the current processor state is User or System.
      Plus minor cleanup of how the (too-many) other registers' cache
      entries get updated.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: add a default full_context() method · 94dba423
      David Brownell authored
      If the core doesn't provide an optimized version of this
      method, provide one without core-specific optimizations.
      Use this to make Cortex-A8 support the "arm reg" command.
      Related: make the two register access methods properly static,
      have the "set" log a "not halted" error too, and make sure
      that the "valid" flag is set on successful reads.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: simplify ARMv7-A register handling · f5093e16
      David Brownell authored
      ARMv7-A doesn't need to duplicate all the standard ARM code
      for register handling.
       - Switch Cortex-A8 to use the standard register code
       - Remove duplicated infrastructure from ARMv7-A
       - Have ARMv7-A arch_state() show CPSR, like other ARMs
      Add comments to show where the Cortex-A8 isn't actually doing
      the right thing for register reads/writes, unless core happens
      to be in the right mode to start with.  (Looks like maybe there
      may be generic confusion between saved/current PSR values in all
      the ARM code ...)
      Make related ARMv7-A and Cortex-A8 symbols properly static.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: setup "secure monitor mode" shadow regs · 8a6d4ced
      David Brownell authored
      Teach the "armv4_5" register code to understand about the
      secure monitor mode:
       - Add the other three shadowed registers to the arrays
       - Support another internal mode number (sigh) in mappings
       - Catch malloc/calloc failures building that register cache
      This should kick in for Cortex-A8 and ARM1176.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: add "core_type" field to "struct arm" · bbebfd9e
      David Brownell authored
      It's used to flag cores with the "TrustZone" extension,
      and is used in subsequent patches to set up support for
      the registers shadowed by its new secure monitor mode.
      The ARM1176 and Cortex-A8 both support this new mode.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • Zachary T Welch's avatar
      fix segfault at startup · 9b1f9810
      Zachary T Welch authored
      The previous changes to move the startup TCL code resulted in segfaults
      during startup.  This seemingly innocuous patch fixes the problem.
      I would explain why changing from 'foo[]' to '*foo' caused this issue,
      but the difference seems superficial.  For now, this hot fix will do,
      but this issue might bear further scrutiny.
    • Zachary T Welch's avatar
      pass startup_tcl to command_init · 5e229bbf
      Zachary T Welch authored
      Removes external linkage from helper module, making the startup
      code a parameter to a new command context's initialization routine.
    • Zachary T Welch's avatar
      split startup.tcl file across modules · cb7dbc1a
      Zachary T Welch authored
      Moves definitions for each layer into their own file, eliminating
      layering violations in the built-in TCL code.  Updates src/Makefile.am
      rules to include all files in the final startup.tcl input file, and
      others Makefile.am rules to distribute the new files in our packages.
    • Zachary T Welch's avatar
      move startup.c to libopenocd · 903daa79
      Zachary T Welch authored
      Moves the creation of startup_tcl.c from src/helper/ to src/.
      Prepares to split the startup.tcl file into its per-module parts.
    • Zachary T Welch's avatar
      fix regression in md/mw commands · 59f32cbe
      Zachary T Welch authored
      The recent migration broke them, the fixes broken them in a new way,
      but this should restore them to working order.  Eliminates the
      temporary variable, as the CMD_NAME macro can once again be use
      in routines that increment CMD_ARGV without nasty side-effects.
    • Øyvind Harboe's avatar
      jtag-api: get rid of unecessary buf_set_u23() that make code obtuse. · 6e95f16d
      Øyvind Harboe authored
      Also, this is on the path to increasing the word size for
      bit vectors from 8 to something wider(32? natural host machine
      Signed-off-by: default avatarØyvind Harboe <oyvind.harboe@zylin.com>
    • David Brownell's avatar
      ARM: add is_arm_mode() · 181d401d
      David Brownell authored
      Add a new is_arm_mode() predicate, and use it to replace almost
      all calls to current armv4_5_mode_to_number().
      Eventually those internal mode numbers should vanish... along
      with their siblings in the armv7a.c file.
      Remove a handful of superfluous checks ... e.g. the mode number
      was just initialized, or (debug entry methods) already validated.
      Move one of the macros using internal mode numbers into the only
      file which uses that macro.  Make the tables manipulated with
      those numbers be read-only and, where possible, static so they're
      not confused with part of the generic ARM interface.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: add arm_mode_name() · ec93209f
      David Brownell authored
      Add and use arm_mode_name() to map from PSR bits to user
      meaningful names.   It uses a new table which, later, can
      be used to hold other mode-coupled data.
      Add definitions for the "Secure Monitor" mode, as seen on
      some ARM11 cores (like ARM1176) and on Cortex-A8.  The
      previous mode name scheme didn't understand that mode.
      Remove the old mechanism ... there were two copies, caused
      by Cortex-A8 needing to add "Secure Monitor" mode support.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    • David Brownell's avatar
      ARM: only use one set of dummy FPA registers · d6c89456
      David Brownell authored
      All ARM cores need to provide obsolete FPA registers in their
      GDB register dumps.  (Even though cores with floating point
      support now generally use some version of VFP...)
      Clean up that support a bit by sharing the same dummy registers,
      and removing the duplicate copies.  Eventually we shouldn't need
      to export those dummies.
      (This makes the ARMv7-M support include the armv4_5 header, and
      cleans up related #includes, but doesn't yet use anything from
      there except those dummies.)
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
  2. 17 Nov, 2009 23 commits