1. 25 Nov, 2009 3 commits
  2. 22 Nov, 2009 5 commits
    • David Brownell's avatar
      ARM: use arm_reg_current() · b404b9ab
      David Brownell authored
      
      
      Start using the arm_reg_current() call.  This shrinks and speeds
      the affected code.  It can also prevent some coredumps coming from
      invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
      bogus registers if e.g. "Secure Monitor" mode isn't supported by
      the current CPU.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      b404b9ab
    • David Brownell's avatar
      ARM: remove 'armv4_5_common_s' migration #define · ab5ac33f
      David Brownell authored
      
      
      Finish migrating from the old symbol to the new one.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      ab5ac33f
    • David Brownell's avatar
      ARM: arm_set_cpsr() handles T and J bits · dd9894f4
      David Brownell authored
      
      
      Have arm_set_cpsr() handle the two core state flags, updating
      the CPU state.  This eliminates code in various debug_entry()
      paths, and marginally improves handling of the J bit.
      
      Catch and comment a few holes in the handling of the J bit on
      ARM926ejs cores ... it's unlikely our users will care about
      Jazelle mode, but we can at least warn of Impending Doom.  If
      anyone does use it, these breadcrumbs may help them to find
      the right path through the code.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      dd9894f4
    • David Brownell's avatar
      ARM: define two register utilities · ff810723
      David Brownell authored
      
      
      Define arm_reg_current() ... returning handle to a given register,
      and encapsulating the current mode's register shadowing.  It's got
      one current use, for reporting the current register set to GDB.
      This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
      nastiness, saving a bit of code.
      
      Define and use arm_set_cpsr() ... initially it updates the cached
      CPSR and sets up state used by arm_reg_current(), plus any SPSR
      handle.   (Later: can also set up for T and J bits.)
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      ff810723
    • David Brownell's avatar
      ARM: simplify CPSR handling · 5706fd78
      David Brownell authored
      
      
      Stash a pointer to the CPSR in the "struct arm", to help get rid
      of the (common) references to its index in the register cache.
      
      This removes almost all references to CPSR offsets outside of the
      toplevel ARM code ... except a pair related to the current ARM11
      "simulator" logic (which should be removable soonish).
      
      This is a net minor code shrink of a few hundred bytes of object
      code, and also makes the code more readable.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      5706fd78
  3. 18 Nov, 2009 2 commits
    • David Brownell's avatar
      ARM: add is_arm_mode() · 181d401d
      David Brownell authored
      
      
      Add a new is_arm_mode() predicate, and use it to replace almost
      all calls to current armv4_5_mode_to_number().
      
      Eventually those internal mode numbers should vanish... along
      with their siblings in the armv7a.c file.
      
      Remove a handful of superfluous checks ... e.g. the mode number
      was just initialized, or (debug entry methods) already validated.
      
      Move one of the macros using internal mode numbers into the only
      file which uses that macro.  Make the tables manipulated with
      those numbers be read-only and, where possible, static so they're
      not confused with part of the generic ARM interface.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      181d401d
    • David Brownell's avatar
      ARM: add arm_mode_name() · ec93209f
      David Brownell authored
      
      
      Add and use arm_mode_name() to map from PSR bits to user
      meaningful names.   It uses a new table which, later, can
      be used to hold other mode-coupled data.
      
      Add definitions for the "Secure Monitor" mode, as seen on
      some ARM11 cores (like ARM1176) and on Cortex-A8.  The
      previous mode name scheme didn't understand that mode.
      
      Remove the old mechanism ... there were two copies, caused
      by Cortex-A8 needing to add "Secure Monitor" mode support.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      ec93209f
  4. 17 Nov, 2009 4 commits
  5. 16 Nov, 2009 1 commit
  6. 15 Nov, 2009 1 commit
    • David Brownell's avatar
      ARM: memory utils aren't ARM7/ARM9 dependent · 269040bb
      David Brownell authored
      
      
      The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
      routines are not actually specific to the ARM7 and ARM9 core
      generations ... they can work for any core which can run
      algorithms using basic ARM (not Thumb) instructions.
      
      Rename them; move the declarations to a more generic site;
      likewise move the code (and tidy it a bit in the process).
      
      NOTE:  the blank_check() method falsely returned a success
      status (0) on one error path, when the algorithm failed.
      Fixed this bug.
      
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      269040bb
  7. 14 Nov, 2009 1 commit
  8. 13 Nov, 2009 15 commits
  9. 10 Nov, 2009 1 commit
  10. 06 Nov, 2009 3 commits
  11. 05 Nov, 2009 2 commits
  12. 03 Nov, 2009 1 commit
  13. 21 Oct, 2009 1 commit