1. 12 Nov, 2009 1 commit
    • David Brownell's avatar
      ETM: remove old mid-level ETM handle · 5723e54f
      David Brownell authored
      
      
      Now that nothing uses the old ETM handle any more, remove it.
      Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
      access ETM facilities.
      
      Now ARM11 could support standard ETM (and ETB) access as soon as
      it derives from "struct arm" ... its scanchain 6 is used access
      the ETM, just like ARM7 and ARM9.
      
      The Cortex parts (both M3 and A8) will need modified access methods
      (via ETM init parameters), so they use the DAP.  Our first A8 target
      (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
      useful without SWO trace support (it's painfully stripped down), so
      that support won't be worth adding for a while.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      5723e54f
  2. 11 Nov, 2009 1 commit
    • David Brownell's avatar
      ETM cleanup · d796ce0e
      David Brownell authored
      
      
      Various cleanups of ETM related code.
      
       - Saner error return paths
       - Simplify arm7_9 init ... no need for extra zeroing!
       - Shrink some lines
       - Tweak some diagnostics
       - Use shorter name for ETM struct type.
       - Don't exit()
      
      and similar.  The diagnostics look forward to having
      this ETM code work with more than just ARM7/ARM9.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      d796ce0e
  3. 09 Nov, 2009 1 commit
  4. 23 Sep, 2009 3 commits
    • dbrownell's avatar
      When setting up an ETM, cache its ETM_CONFIG register. Then · 22045fa6
      dbrownell authored
      only expose the registers which are actually present.  They
      could be missing for two basic reasons:
      
       - This version might not support them at all; e.g. ETMv1.1
         doesn't have some control/status registers.  (My sample of
         ARM9 boards shows all with ETMv1.3 support, FWIW.)
      
       - The configuration on this chip may not populate as many
         registers as possible; e.g. only two data value comparators
         instead of eight.
      
      Includes a bugfix in the "etm info" command:  only one of the
      two registers is missing on older silicon, so show the first
      one before bailing.
      
      Update ETM usage docs to explain that those registers need to be
      written to configure what is traced, and that some ETM configs
      are not yet handled.  Also, give some examples of the kinds of
      constrained trace which could be arranged.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      22045fa6
    • dbrownell's avatar
      Start cleaning up ETM register handling. On one ARM926 ETM+ETB · d9ce8a2f
      dbrownell authored
      system, removes 20 non-existent registers ... but still includes
      over 45 (!) ETM registers which don't even exist there ...
      
       - Integrate the various tables to get one struct per register
       - Get rid of needless per-register dynamic allocation
       - Double check list of registers:
          * Remove sixteen (!) non-registers for data comparators
          * Remove four registers that imply newer ETM than we support
          * Change some names to match current architecture specs
       - Handle more register info
          * some are write-only
          * some are read-only
          * record which versions have them, just in case
       - Reorganize the registers to facilitate removing the extras
          * group e.g. comparator/counter #N registers together
          * add and use lookup-by-ID
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      d9ce8a2f
    • dbrownell's avatar
      Initial ETM cleanups. Most of these are cosmetic: · a6d858eb
      dbrownell authored
       - Add a header comment
       - Line up the ETM context struct, pack it a bit
       - Remove unused context_id (this doesn't support ETMv2 yet)
       - Make most functions static
       - Remove unused string table and other needless lines of code
       - Correct "tracemode" helptext
      
      Also provide and use an etm_reg_lookup() to find entries in the ETM
      register cache.  This will help cope with corrected contents of that
      cache, which doesn't include entires for non-existent registers.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      a6d858eb
  5. 23 Jun, 2009 1 commit
  6. 18 Jun, 2009 3 commits
  7. 11 May, 2009 1 commit
  8. 08 May, 2009 1 commit
  9. 16 Apr, 2008 1 commit
  10. 25 Feb, 2008 1 commit
  11. 16 Aug, 2007 1 commit
  12. 31 Jul, 2007 1 commit
  13. 15 Jul, 2007 1 commit
    • drath's avatar
      - added support for Asix Presto JTAG interface (thanks to Pavel Chromy and... · 1429d2c6
      drath authored
      - added support for Asix Presto JTAG interface (thanks to Pavel Chromy and Asix for making this addition possible)
      - added support for usbprog (thanks to Benedikt Sauter)
      - make OpenOCD listen for WM_QUIT messages on windows (thanks to Pavel Chromy)
      - register at_exit handler to do necessary unregistering (thanks to Pavel Chromy)
      - added dummy ETM capture driver to allow ETM to be registered without a capture driver
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@180 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      1429d2c6
  14. 14 Jun, 2007 1 commit
    • drath's avatar
      - added manpage for OpenOCD (thanks to Uwe Hermann) · 53d1f9b2
      drath authored
      - fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry
      - added support for auto image type detection (thanks to Vincent Palatin)
      - further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental)
      
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      53d1f9b2
  15. 30 May, 2007 1 commit
  16. 29 May, 2007 1 commit
    • drath's avatar
      - split fileio handling into fileio part and image handling · 237e8948
      drath authored
      - reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported)
      - added XScale debug handler binary to repository
      - added Thumb disassembling (thanks to Vincent Palatin for this patch)
      - added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported)
      This checkin is experimental, not suitable for general use
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      237e8948
  17. 28 Sep, 2006 1 commit
    • drath's avatar
      - str9x flash support (Thanks to Spencer Oliver) · a582e9a8
      drath authored
      - str75x flash support (Thanks to Spencer Oliver)
      - correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this)
      - core-state (ARM/Thumb) can be switched by modifying CPSR
      - fixed bug in gdb_server register handling
      - register values > 32-bit should now be supported
      - several minor fixes and enhancements
      
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      a582e9a8
  18. 02 Jun, 2006 1 commit