1. 12 Nov, 2009 3 commits
    • David Brownell's avatar
      ETM: remove old mid-level ETM handle · 5723e54f
      David Brownell authored
      
      
      Now that nothing uses the old ETM handle any more, remove it.
      Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
      access ETM facilities.
      
      Now ARM11 could support standard ETM (and ETB) access as soon as
      it derives from "struct arm" ... its scanchain 6 is used access
      the ETM, just like ARM7 and ARM9.
      
      The Cortex parts (both M3 and A8) will need modified access methods
      (via ETM init parameters), so they use the DAP.  Our first A8 target
      (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
      useful without SWO trace support (it's painfully stripped down), so
      that support won't be worth adding for a while.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      5723e54f
    • David Brownell's avatar
      ETM: use new toplevel ETM handle · e7405365
      David Brownell authored
      
      
      Make ETM itself use the new toplevel ETM handle, instead
      of the to-be-removed lower level one.  As of this patch,
      nothing should be using the old ARM7/ARM9-specific handle.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      e7405365
    • David Brownell's avatar
      ARM: start generalized base type · 4b20ed6b
      David Brownell authored
      
      
      Rename "struct armv4_5_common_s" as "struct arm".  It needs
      a bit more work to be properly generic, and to move out of
      this header, but it's the best start we have on that today.
      
      Add and initialize an optional ETM pointer, since that will
      be the first thing that gets generalized.
      
      The intent being:  all ARMs should eventually derive from
      this "struct arm", so they can reuse the current ETM logic.
      (And later, more.)  Currently the ARM cores that *don't* so
      derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      4b20ed6b
  2. 11 Nov, 2009 1 commit
    • David Brownell's avatar
      ETM cleanup · d796ce0e
      David Brownell authored
      
      
      Various cleanups of ETM related code.
      
       - Saner error return paths
       - Simplify arm7_9 init ... no need for extra zeroing!
       - Shrink some lines
       - Tweak some diagnostics
       - Use shorter name for ETM struct type.
       - Don't exit()
      
      and similar.  The diagnostics look forward to having
      this ETM code work with more than just ARM7/ARM9.
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      d796ce0e
  3. 06 Nov, 2009 3 commits
  4. 22 Oct, 2009 1 commit
    • David Brownell's avatar
      ETM: rename registers, doc tweaks · 344bed2f
      David Brownell authored
      
      
      The register names are perversely not documented as zero-indexed,
      so rename them to match that convention.  Also switch to lowercase
      suffixes and infix numbering, matching ETB and EmbeddedICE usage.
      
      Update docs to be a bit more accurate, especially regarding what
      the "trigger" event can cause; and to split the issues into a few
      more paragraphs, for clarity.
      
      Make "configure" helptext point out that "oocd_trace" is prototype
      hardware, not anything "real".
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      344bed2f
  5. 10 Oct, 2009 1 commit
  6. 02 Oct, 2009 1 commit
    • dbrownell's avatar
      Minor ETB and ETM bugfixes and doc updates · 10336333
      dbrownell authored
       - ETB
          * report _actual_ hardware status, not just expected status
          * add a missing diagnostic on a potential ETB setup error
          * prefix any diagnostics with "ETB"
       - ETM
          * make "etm status" show ETM hardware status too, instead of
            just traceport status (which previously was fake, sigh)
       - Docs
          * flesh out "etm tracemode" docs a bit
          * clarify "etm status" ... previously it was traceport status
          * explain "etm trigger_percent" as a *traceport* option
      
      ETM+ETB tracing still isn't behaving, but now I can see that part of 
      the reason is that the ETB turns itself off almost immediately after
      being enabled, and before collecting any data.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      10336333
  7. 29 Sep, 2009 1 commit
  8. 23 Sep, 2009 3 commits
    • dbrownell's avatar
      When setting up an ETM, cache its ETM_CONFIG register. Then · 22045fa6
      dbrownell authored
      only expose the registers which are actually present.  They
      could be missing for two basic reasons:
      
       - This version might not support them at all; e.g. ETMv1.1
         doesn't have some control/status registers.  (My sample of
         ARM9 boards shows all with ETMv1.3 support, FWIW.)
      
       - The configuration on this chip may not populate as many
         registers as possible; e.g. only two data value comparators
         instead of eight.
      
      Includes a bugfix in the "etm info" command:  only one of the
      two registers is missing on older silicon, so show the first
      one before bailing.
      
      Update ETM usage docs to explain that those registers need to be
      written to configure what is traced, and that some ETM configs
      are not yet handled.  Also, give some examples of the kinds of
      constrained trace which could be arranged.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      22045fa6
    • dbrownell's avatar
      Start cleaning up ETM register handling. On one ARM926 ETM+ETB · d9ce8a2f
      dbrownell authored
      system, removes 20 non-existent registers ... but still includes
      over 45 (!) ETM registers which don't even exist there ...
      
       - Integrate the various tables to get one struct per register
       - Get rid of needless per-register dynamic allocation
       - Double check list of registers:
          * Remove sixteen (!) non-registers for data comparators
          * Remove four registers that imply newer ETM than we support
          * Change some names to match current architecture specs
       - Handle more register info
          * some are write-only
          * some are read-only
          * record which versions have them, just in case
       - Reorganize the registers to facilitate removing the extras
          * group e.g. comparator/counter #N registers together
          * add and use lookup-by-ID
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      d9ce8a2f
    • dbrownell's avatar
      Initial ETM cleanups. Most of these are cosmetic: · a6d858eb
      dbrownell authored
       - Add a header comment
       - Line up the ETM context struct, pack it a bit
       - Remove unused context_id (this doesn't support ETMv2 yet)
       - Make most functions static
       - Remove unused string table and other needless lines of code
       - Correct "tracemode" helptext
      
      Also provide and use an etm_reg_lookup() to find entries in the ETM
      register cache.  This will help cope with corrected contents of that
      cache, which doesn't include entires for non-existent registers.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      a6d858eb
  9. 24 Aug, 2009 1 commit
  10. 23 Jun, 2009 3 commits
  11. 21 Jun, 2009 1 commit
  12. 18 Jun, 2009 2 commits
  13. 04 Jun, 2009 3 commits
  14. 30 May, 2009 1 commit
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 91d55c0e
      zwelch authored
      Provide basic documentation on the ARM ETM and ETB trace commands.
      
      Fix minor goofs in registration of the ETM commands; and whitespace
      issues in the proof-of-concept oocd_trace code.  (Plus include a
      ref to Dominic's email saying that it's just proof-of-concept code.)
      
      Note that I'm still not sure whether the ETM support works.  But
      documenting how it's expected to work should help sort out which
      behaviors are bugs, which will help get bugs patched.
      
      ZW: whitespace changes were split out of this patch but will follow.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@1945 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      91d55c0e
  15. 21 May, 2009 1 commit
  16. 18 May, 2009 1 commit
  17. 11 May, 2009 3 commits
  18. 08 May, 2009 3 commits
  19. 06 May, 2009 2 commits
  20. 04 May, 2009 1 commit
  21. 30 Apr, 2009 1 commit
  22. 29 Apr, 2009 1 commit
  23. 19 Apr, 2009 1 commit
  24. 18 Apr, 2009 1 commit
    • mifi's avatar
      The following patches was applied: · 0bba8327
      mifi authored
      - openocd-flash-static-keyword-v3.patch
      - openocd-lpc2000-fix-erase-obo.patch
      - openocd-jlink-fix-sign-ptr-warn.patch
      - openocd-wextra-etm.patch
      - openocd-wextra-jtag.patch
      - openocd-add-new-tap-symbols-v6.patch
      
      Many thanks to  Zach Welch <zw(at)superlucidity.net>
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@1462 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      0bba8327