- 19 Apr, 2011 4 commits
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Alexandre Pereira da Silva authored
Fix non cfi x16 nor flash connected to x8 bus. The ids in the table should be masked before comparison.
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Alexandre Pereira da Silva authored
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Alexandre Pereira da Silva authored
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Øyvind Harboe authored
only set jtag global pointer if jtag->init() succeeds. Less code, more clear what the rules are. Fix nit that error value from init() was not propagated unmodified. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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- 15 Apr, 2011 1 commit
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Broadcom Corporation (Evan Hunter) authored
- works on Cortex-M3 with ThreadX and FreeRTOS Compared to original patch a few nits were fixed: - remove stricmp usage - unsigned compare fix - printf formatting fixes - fixed a bug with overrunning a memory buffer allocated with malloc.
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- 14 Apr, 2011 1 commit
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Spencer Oliver authored
Update devices as per the latest programming manual. We now use the full DEVID to identify the target. Previously we used a 8bit id but that has now been changed in the manual. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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- 13 Apr, 2011 5 commits
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Luca Ellero authored
Freescale iMX53 doesn't seem to like unaligned accesses to his memory mapped registers. Anyway this patch makes dump_image/load_image 4X faster for every access through APB. Signed-off-by:
Luca Ellero <lroluk@gmail.com>
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Luca Ellero authored
Signed-off-by:
Luca Ellero <lroluk@gmail.com>
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Michel JAOUEN authored
Conflicts: src/target/cortex_a.c
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Michel JAOUEN authored
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Michel JAOUEN authored
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- 09 Apr, 2011 1 commit
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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- 08 Apr, 2011 2 commits
- 06 Apr, 2011 1 commit
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Michel JAOUEN authored
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- 05 Apr, 2011 3 commits
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Drasko DRASKOVIC authored
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Drasko DRASKOVIC authored
Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check that PrAcc is "1" before FASTDATA access.
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Drasko DRASKOVIC authored
Added correct endianess treatment for big endian targets. Now it is possible to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
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- 01 Apr, 2011 6 commits
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Michel JAOUEN authored
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Øyvind Harboe authored
accidentally invoked return jtag_execute_queue() in the middle of a fn. Hmm.... I would have expected gcc or at least lint to catch this. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
the patchup code would get false positives when checking whether a dbgbase had to be corrected. The solution is to have autodetect default, with manual override in scripts. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Do not require unecessary roundtrips for clocking out data. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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- 31 Mar, 2011 9 commits
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Øyvind Harboe authored
Could this cause confusion as data sent to write would be flipped and then if the caller subsequently used the data, e.g. a compare mismatch might happen? Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Importantly adapter cleanup will now happen upon startup failure. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
this fn does not fail, it queues data. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
it would *read* instead of *write* to memory when the MMU was disabled. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Really a Cortex-A specific option, but there is no system in place to support target specific options currently and there has been no need for such a system until now. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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- 30 Mar, 2011 3 commits
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Olivier Schonken authored
production processor versions increment, thus the version bits should be ignored for future proofing. e.g. Engineering sample version == 0x00, production version 0x01
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Alexandre Pereira da Silva authored
Hi, This is a more descriptive message about LPC32XX error, when the nand chip needs 5 address cycles. Thanks.
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Alexandre Pereira da Silva authored
Hi, This will add support for a new nand chip device. Thanks.
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- 29 Mar, 2011 1 commit
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Andrew Lyon authored
The patch below fixes step <address> on mips_m4k. Spencer Oliver <spen@spen-soft.co.uk>: The current code is used on all other arch's - is there a underlying issue with those aswell ?
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- 27 Mar, 2011 1 commit
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Øyvind Harboe authored
found via valgrind, not observed/reported. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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- 22 Mar, 2011 2 commits
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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