- 03 Mar, 2010 2 commits
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David Brownell authored
Make ADIv5 use one of the new transport-neutral interfaces: call dap_run(), not jtagdp_transaction_endcheck(). Also, make that old interface private; and bugfix some of its call sites to handle the fault returns, instead of ignoring them. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
To support both JTAG and SWD, ADIv5 needs DAP operations which are transport-neutral, instead being of JTAG-specific. This patch: - Defines such a transport-neutral interface, abstracting access to DP and AP registers through a conceptual queue of operations. - Builds the first implementation of such a transport with the existing JTAG-specific code. In contrast to the current JTAG-only interface, the interface adds support for two previously-missing (and unused) DAP operations: - aborting the current AP transaction (untested); - reading the IDCODE register (tested) ... required for SWD init. The choice of transports may be fixed at the chip, board, or JTAG/SWD adapter level. Or if all the relevant hardware supports both transport options, the choice may be made at runtime, This patch provides basic infrastructure to support whichever choice is made. The current "JTAG-only" transport choice policy will necessarily continue for now, until SWD support becomes available in OpenOCD. Later patches start phasing out JTAG-specific calls in favor of transport-neutral calls. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 02 Mar, 2010 3 commits
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David Brownell authored
Add doxygen for target_resume() ... referencing the still-unresolved confusion about what the "debug_execution" parameter means (not all CPU support code acts the same). The 'handle_breakpoints" param seems to have resolved the main issue with its semantics, but it wasn't part of the function spec before. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Fix some issues with the generic LPC1768 config file: - Handle the post-reset clock config: 4 MHz internal RC, no PLL. This affects flash and JTAG clocking. - Remove JTAG adapter config; they don't all support trst_and_srst - Remove the rest of the bogus "reset-init" event handler. - Allow explicit CCLK configuration, instead of assuming 12 MHz; some boards will use 100 Mhz (or the post-reset 4 MHz). - Simplify: rely on defaults for endianness and IR-Capture value - Update some comments too Build on those fixes to make a trivial config for the IAR LPC1768 kickstart board (by Olimex) start working. Also, add doxygen to the lpc2000 flash driver, primarily to note a configuration problem with driver: it wrongly assumes the core clock rate never changes. Configs that are safe for updating flash after "reset halt" will thus often be unsafe later ... e.g. for LPC1768, after switching to use PLL0 at 100 MHz. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Correct a mistake made copying the ID of the Cortex-M3 ETM module from the TRM, so that "dap info" on a CM3 with an ETM will now correctly describe ROM table entries for such modules. (They are included on LPC17xx and some other cores.) Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 01 Mar, 2010 5 commits
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David Brownell authored
The recent "add armv7m semihosting support" patch introduced two build errors: arm_semihosting.c: In function ‘do_semihosting’: arm_semihosting.c:71: error: ‘spsr’ may be used uninitialized in this function arm_semihosting.c:71: error: ‘lr’ may be used uninitialized in this function This fixes those build errors. The behavior is, however, untested. (Also, note the two new REVISIT comments.) Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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Øyvind Harboe authored
Faster and simpler. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
290kBytes/s @ 8MHz, no need to inline jtag_tap_next_enabled(). Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
after clocking out a tms sequence, then the TAP will be in some state. This state is now handed to the drivers. TAP_INVALID is a possible state after a TMS sequence if switching to SWD. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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- 28 Feb, 2010 13 commits
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Spencer Oliver authored
core_type check is not required as the core function will be null for cores that do not support the mcr/mrc functions. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
windows api does not define a posix sleep, use usleep that has an openocd wrapper to the win32 native function. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
do_semihosting and arm_semihosting now check the core type and use the generic arm structure. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
Move semihosting cmd to the arm cmd group. Targets that support semihosting will setup the setup_semihosting callback function. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
Rather than using a Cortex disassemble cmd, we now use the arm generic version. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
- Add arm cmd group to armv7m cmd chain. - arm cmd's now check the core type before running a cmd. - todo: add support for armv7m registers for reg cmd. Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
- add mips support for target algorithms. - added handlers for target_checksum_memory and target_blank_check_memory. - clean up long lines Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Spencer Oliver authored
- armv7m_run_algorithm now requires all algorithms to use a software breakpoint at their exit address - updated all algorithms to support this Signed-off-by:
Spencer Oliver <ntfreak@users.sourceforge.net>
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Mariano Alvira authored
The Redbee USB is a small form-factor usb stick from Redwire, LLC (www.redwirellc.com/store), built around a Freescale MC13224V ARM7TDMI + 802.15.4 radio (plus antenna). It includes an FT2232H for debugging, with Channel B connected to the mc13224v's JTAG interface (unusual) and Channel A connected to UART1. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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Mariano Alvira authored
The Redbee Econotag is an open hardware development kit from Redwire, LLC (www.redwirellc.com/store), for the Freescale MC13224V ARM7TDMI + 802.15.4 radio. It includes both an MC13224V and an FT2232H (for JTAG and UART support). It has flexible power supply options. Additional features are: - inverted-F pcb antenna - 36 GPIO brought out to 0.1" pin header (includes all peripheral pins) - Reset button - Two push buttons (on kbi1-5 and kbi0-4) - USB-A connector, powered from USB - up to 16V external input - pads for optional buck inductor - pads for optional 32.768kHz crystal - 2x LEDS on TX_ON and RX_ON [ dbrownell@users.sourceforge.net: shrink lines; texi ] Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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Mariano Alvira authored
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for Zigbee and similar low-power wireless applications. Using PIP (Platform In Package) technology, it integrates: an RF balun and matching network; a buck converter (only an external inductor is necessary); 96KB of SRAM; and 128KB of non-volatile memory. It has an integrated bootloader and can boot from a variety of sources: external SPI or I2C non-volatile memory, an image loaded over UART1, or the internal non-volatile memory. The image loaded from one of these sources is executed directly from SRAM starting at location 0x00400000. Open source development code at http://mc1322x.devl.org Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 27 Feb, 2010 4 commits
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David Brownell authored
Stellaris chips have a procedure for restoring the chip to what's effectively the "as-manufactured" state, with all the non-volatile memory erased. That includes all flash memory, plus things like the flash protection bits and various control words which can for example disable debugger access. clearly, this can be useful during development. Luminary/TI provides an MS-Windows utility to perform this procedure along with its Stellaris developer kits. Now OpenOCD users will no longer need to use that MS-Windows utility. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Define two new DAP operations which use the new jtag_add_tms_seq() calls to put the DAP's transport into either SWD or JTAG mode, when the hardware allows. Tested with the Stellaris 'Recovering a "Locked" Device' procedure, which loops five times over both of these. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Implement the new TMS_SEQ command on FT2232 hardware. Also, swap a bogus exit() call with a clean failure return. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
For support of SWD we need to be able to clock out special bit sequences over TMS or SWDIO. Create this as a generic operation, not yet called by anything, which is split as usual into: - upper level abstraction ... here, jtag_add_tms_seq(); - midlayer implementation logic hooking that to the lowlevel code; - lowlevel minidriver operation ... here, interface_add_tms_seq(); - message type for request queue, here JTAG_TMS. This is done slightly differently than other operations: there's a flag saying whether the interface driver supports this request. (In fact a flag *word* so upper layers can learn about other capabilities too ... for example, supporting SWD operations.) That approach (flag) lets this method *eventually* be used to eliminate pathmove() and statemove() support from most adapter drivers, by moving all that logic into the mid-layer and increasing uniformity between the various drivers. (Which will in turn reduce subtle bugginess.) Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 25 Feb, 2010 3 commits
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Mariano Alvira authored
FT2232-family chips have two or more MPSSE modules. FTDI documentation calls these channels. JTAG adapter drivers thus need to be able to choose which channel to use. (For example, one channel may connect to a board's microcontroller, while another connects to a CPLD.) Since each channel has its own USB interface, libftdi (somewhat confusingly) identifies channels using INTERFACE_* symbols. Most boards use INTERFACE_A for JTAG, which is the default in OpenOCD. But some wire up a different one. Note that there are two facets of what makes a wiring "layout": - The mapping between debug signals map and channel signals ... embedded in C functions. - Label used in Tcl configuration scripts ... part of the "layout" structure. By letting the channel be part of the layout struct, we permit sharing the C functions between Tcl-visible layouts, when those signal mappings are reused. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Add doxygen for mem_ap_read_buf_u{8,16,32}() calls, and shrink a few overlong lines. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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Hans Peter Mortensn authored
I have successfully programmed the AT90CAN128, based on the mega128 with some small modifications. [ dbrownell@users.sourceforge.net: patch cleanup ] Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 24 Feb, 2010 1 commit
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David Brownell authored
Highlight more of the internal JTAG-specific utilities, so it's easier to identify code needing changes to become transport-neutral. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 22 Feb, 2010 5 commits
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Øyvind Harboe authored
zy1000 performance for GDB load went from 100kBytes/s to 300kBytes/s @ 8 MHz by implementing the inner loop of unack arm11 memory writes directly on top of the hw fifo. Profiling info: 78.57 0.77 0.77 arm11_run_instr_data_to_core_noack_inner 5.10 0.82 0.05 memcpy 4.08 0.86 0.04 jtag_tap_next_enabled 3.06 0.89 0.03 gdb_input Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
This allows minidrivers to e.g. hardware accelerate memory writes. Same trick as is used for arm7/9 dcc writes. Added error propagation for memory transfer failures in code rearrangement. Also the JTAG end state is not updated until after the memory write run is complete. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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Øyvind Harboe authored
Reduce overhead in jtag_add_dr_scan() a bit. Signed-off-by:
Øyvind Harboe <oyvind.harboe@zylin.com>
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David Brownell authored
Use labeled initializers in the table of layouts instead of positional ones. This ls cleaner and less error prone, plus it simplifies patches which add members to these structure. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
Be a closer match to what I've actually done for the past few cycles. In particular, hold off pushing repository updates until after the packages are published, as part of opening the merge window, and mention the utility commands which actually create the archives. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- 21 Feb, 2010 4 commits
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David Brownell authored
When using an AP to access a memory (or a memory-mapped register), some extra TCK (assuming JTAG) cycles should be added to ensure the AP has enugh time to complete that access before trying to collect the response. The previous code was adding these cycles *before* trying to access (read or write) data to that address, not *after*. Fix by putting the delays in the right location. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
This removes context-sensitivity from the programming interface and makes it possible to know what a block of code does without needing to know the previous history (specifically, the DAP's "trans_mode" setting). The mode was only set to ATOMIC briefly after DAP initialization, making this patch be primarily cleanup; almost everything depends on COMPOSITE. The transactions which shouldn't have been queued were already properly flushing the queue. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
I have no idea what the scan_inout_check() was *expecting* to achieve by issuing a read of the DP_RDBUFF register. But in any case, that code was clearly never being called ("invalue" always NULL) ... so remove it, and the associated comment. Also rename it as ap_write_check(), facilitating a cleanup of its single call site by removing constant parameters. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
adi_jtag_dp_scan_u32() now wraps adi_jtag_dp_scan(), removing code duplication. Include doxygen for the former. Comment some particularly relevant points. Minor fault handling fixes for both routines: don't register a callback that can't run, or return ERROR_OK after an error. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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