1. 01 Apr, 2019 1 commit
  2. 06 Mar, 2019 1 commit
  3. 01 Mar, 2019 1 commit
  4. 07 Feb, 2019 1 commit
  5. 04 Feb, 2019 1 commit
  6. 27 Jan, 2019 1 commit
  7. 16 Jan, 2019 1 commit
  8. 08 Jan, 2019 1 commit
    • Antonio Borneo's avatar
      target/arm: add support for multi-architecture gdb · 5c941edc
      Antonio Borneo authored
      GDB can be built for multi-architecture through the command
      	./configure --enable-targets=all && make
      Such multi-architecture GDB requires the target's architecture to
      be selected either manually by the user through the GDB command
      "set architecture" or automatically by the target description sent
      by the remote target (i.e. OpenOCD).
      
      Commit e65acd88
      
       ("gdb_server: add
      support for architecture element") already provides the required
      infrastructure to support multi-architecture gdb.
      
      arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also
      supports the following values: "arm_any", "armv2", "armv2a",
      "armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te",
      "armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m",
      "armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base",
      "armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale".
      These values can be displayed on arm gdb prompt by typing
      "set architecture " followed by a TAB for autocompletion.
      
      Set the gdb architecture value for all arm targets to "arm".
      
      Change-Id: I176cb89878606e1febd546ce26543b3e7849500a
      Signed-off-by: default avatarAntonio Borneo <borneo.antonio@gmail.com>
      Reviewed-on: http://openocd.zylin.com/4754
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarSpencer Oliver <spen@spen-soft.co.uk>
      5c941edc
  9. 19 Dec, 2018 2 commits
  10. 25 Sep, 2018 1 commit
  11. 07 Sep, 2018 1 commit
  12. 14 Aug, 2018 1 commit
  13. 01 Aug, 2018 1 commit
  14. 25 Jul, 2018 1 commit
  15. 19 Jul, 2018 1 commit
  16. 03 Jul, 2018 1 commit
  17. 05 Jun, 2018 1 commit
  18. 12 Apr, 2018 1 commit
    • Tomas Vanek's avatar
      target/cortex_m: allow setting the type of a breakpoint · 81d0b769
      Tomas Vanek authored
      
      
      Cortex-M target used 'auto_bp_type' mode. The requested type
      of breakpoint was ignored and hard (FPB) breakpoints were set in
      'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
      0x20000000.
      
      The code memory area of Cortex-M does not mean the memory is flash and
      vice versa. External flash (parallel or QSPI) is usually mapped above
      code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
      has a RAM block under 0x20000000 boundary.
      
      Remove 'auto_bp_type' mode, set breakpoints to requested type.
      
      Change 'cortex_m maskisr auto' handling to use a hard temporary
      breakpoint everywhere: it can also workaround not working soft breakpoints
      on Cortex-M7 with ICache enabled.
      
      Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
      Signed-off-by: default avatarTomas Vanek <vanekt@fbl.cz>
      Reviewed-on: http://openocd.zylin.com/4429
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarMatthias Welwarsky <matthias@welwarsky.de>
      81d0b769
  19. 04 Apr, 2018 1 commit
  20. 30 Mar, 2018 1 commit
    • Matthias Welwarsky's avatar
      target: restructure dap support · 2231da8e
      Matthias Welwarsky authored
      
      
      - add 'dap create' command to create dap instances
      - move all dap subcmmand into the dap instance commands
      - keep 'dap info' for convenience
      - change all armv7 and armv8 targets to take a dap
        instance instead of a jtag chain position
      - restructure tap/dap/target relations, jtag tap no
        longer references the dap, daps are now independently
        created and initialized.
      - clean up swd connect
      - re-initialize DAP also on JTAG errors (e.g. after reset,
        power cycle)
      - update documentation
      - update target files
      
      Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9
      Signed-off-by: default avatarMatthias Welwarsky <matthias.welwarsky@sysgo.com>
      Reviewed-on: http://openocd.zylin.com/4468
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarMatthias Welwarsky <matthias@welwarsky.de>
      2231da8e
  21. 25 Jan, 2018 1 commit
  22. 13 Jan, 2018 2 commits
  23. 27 Oct, 2017 2 commits
    • Christopher Head's avatar
      Cortex-M: Delete an unnecessary local variable · bca67d10
      Christopher Head authored
      
      
      The dhcsr_save variable was used to save the value of
      cortex_m->dcb_dhcsr so it could be restored later. However, all writes
      in between the save and the restore use mem_ap_write_atomic_u32, not
      cortex_m_write_debug_halt_mask, which means cortex_m->dcb_dhcsr isn’t
      changed anyway. Delete the unnecessary local.
      
      Change-Id: I064a3134e21398e1ecfc9f1fa7efd7b020b52341
      Signed-off-by: default avatarChristopher Head <chead@zaber.com>
      Reviewed-on: http://openocd.zylin.com/4240
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarTomas Vanek <vanekt@fbl.cz>
      bca67d10
    • Christopher Head's avatar
      Cortex-M: fix stale DHCSR cache values · 02df0abb
      Christopher Head authored
      
      
      In cortex_m_assert_reset, in two locations, DHCSR is written directly
      using mem_ap_write_u32. This means that the cached version,
      target_to_cm(target)->dcb_dhcsr, is not updated when these writes are
      performed, so subsequent writes to DHCSR that use
      cortex_m_write_debug_halt_mask will change those bits back to their old
      values which, unless modified in that particular invocation, come from
      the cache. This causes an actual, observable bug on an STM32F7 in which
      running “reset run” immediately after “program” can in some cases result
      in execution proceeding with C_MASKINTS set (it is cleared on line 1021
      but is then set immediately afterward in cortex_m_clear_halt), causing
      failure of the application. Replace these mem_ap_write_u32 calls with
      cortex_m_write_debug_halt_mask calls to do the same jobs.
      
      Change-Id: Id35ca7f6057c2df2ba9cd67c53a73b50816d0b71
      Signed-off-by: default avatarChristopher Head <chead@zaber.com>
      Reviewed-on: http://openocd.zylin.com/4239
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarTomas Vanek <vanekt@fbl.cz>
      02df0abb
  24. 10 Feb, 2017 1 commit
    • Dongxue Zhang's avatar
      target: Add 64-bit target address support · 47b8cf84
      Dongxue Zhang authored
      
      
      Define a target_addr_t type to support 32-bit and 64-bit addresses at
      the same time. Also define matching TARGET_PRI*ADDR format macros as
      well as a convenient TARGET_ADDR_FMT.
      
      In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
      be least invasive by leaving the formatting unchanged apart from the
      type;
      for generic code adopt TARGET_ADDR_FMT as unified address format.
      
      Don't silently change gdb formatting here, leave that to later.
      
      Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
      Implement it using its own parse_target_addr() function, in the hopes
      of catching pointer type mismatches better.
      
      Add '--disable-target64' configure option to revert to previous 32-bit
      target address behavior.
      
      Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
      Signed-off-by: default avatarDongxue Zhang <elta.era@gmail.com>
      Signed-off-by: default avatarDavid Ung <david.ung.42@gmail.com>
      [AF: Default to enabling (Paul Fertser), rename macros, simplify]
      Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
      Signed-off-by: default avatarMatthias Welwarsky <matthias.welwarsky@sysgo.com>
      47b8cf84
  25. 08 Dec, 2016 2 commits
  26. 04 Nov, 2016 1 commit
  27. 04 Oct, 2016 1 commit
  28. 10 Aug, 2016 1 commit
  29. 24 May, 2016 1 commit
  30. 20 May, 2016 1 commit
  31. 06 May, 2016 1 commit
  32. 05 May, 2016 1 commit
    • Tomas Vanek's avatar
      target: improve robustness of reset command · 88258042
      Tomas Vanek authored
      
      
      Before this change jim_target_reset() checked examined state of a target
      and failed without calling .assert_reset in particular target layer
      (and without comprehensible warning to user).
      Cortex-M target (which refuses access to DP under active SRST):
      If connection is lost then reset process fails before asserting SRST
      and connection with MCU is not restored.
      This resulted in:
      1) A lot of Cortex-M MCUs required use of reset button or cycling power
      after firmware blocked SWD access somehow (sleep, misconfigured clock etc).
      If firmware blocks SWD access early during initialization, a MCU could
      become completely inaccessible by SWD.
      2) If OpenOCD is (re)started and a MCU is in a broken state unresponsive
      to SWD, reset command does not work even if it could help to restore communication.
      Hopefully this scenario is not possible under full JTAG.
      
      jim_target_reset() in target.c now does not check examined state
      and delegates this task to a particular target. All targets have been checked
      and xx_assert_reset() (or xx_deassert_reset()) procedures were changed
      to check examined state if needed. Targets except arm11, cortex_a and cortex_m
      just fail if target is not examined although it may be possible to use
      at least hw reset. Left as TODO for developers familiar with these targets.
      
      cortex_m_assert_reset(): memory access errors are stored
      instead of immediate returning them to a higher level.
      Errors from less important reads/writes are ignored.
      Requested reset always leads to a configured action.
      
      arm11_assert_reset() just asserts hw reset in case of not examined target.
      cortex_a_assert_reset() works as usual in case of not examined target.
      
      Change-Id: I84fa869f4f58e2fa83b6ea75de84440d9dc3d929
      Signed-off-by: default avatarTomas Vanek <vanekt@fbl.cz>
      Reviewed-on: http://openocd.zylin.com/2606
      
      
      Tested-by: jenkins
      Reviewed-by: default avatarMatthias Welwarsky <matthias@welwarsky.de>
      Reviewed-by: default avatarPaul Fertser <fercerpav@gmail.com>
      88258042
  33. 30 Dec, 2015 1 commit
  34. 29 Dec, 2015 3 commits