1. 02 Oct, 2009 1 commit
    • dbrownell's avatar
      Minor ETB and ETM bugfixes and doc updates · 10336333
      dbrownell authored
       - ETB
          * report _actual_ hardware status, not just expected status
          * add a missing diagnostic on a potential ETB setup error
          * prefix any diagnostics with "ETB"
       - ETM
          * make "etm status" show ETM hardware status too, instead of
            just traceport status (which previously was fake, sigh)
       - Docs
          * flesh out "etm tracemode" docs a bit
          * clarify "etm status" ... previously it was traceport status
          * explain "etm trigger_percent" as a *traceport* option
      
      ETM+ETB tracing still isn't behaving, but now I can see that part of 
      the reason is that the ETB turns itself off almost immediately after
      being enabled, and before collecting any data.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      10336333
  2. 01 Oct, 2009 1 commit
  3. 30 Sep, 2009 11 commits
  4. 29 Sep, 2009 10 commits
  5. 28 Sep, 2009 3 commits
  6. 27 Sep, 2009 3 commits
  7. 26 Sep, 2009 4 commits
  8. 25 Sep, 2009 3 commits
  9. 24 Sep, 2009 1 commit
  10. 23 Sep, 2009 3 commits
    • dbrownell's avatar
      Start handling the (second) SRST stage of reset better: · 23e22b6e
      dbrownell authored
      make sure that when there are two or more targets, their
      various pre/post event reports are correctly ordered.
      
      Previously, only the first target always saw its "pre"
      method before SRST was asserted or deasserted.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2753 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      23e22b6e
    • dbrownell's avatar
      When setting up an ETM, cache its ETM_CONFIG register. Then · 22045fa6
      dbrownell authored
      only expose the registers which are actually present.  They
      could be missing for two basic reasons:
      
       - This version might not support them at all; e.g. ETMv1.1
         doesn't have some control/status registers.  (My sample of
         ARM9 boards shows all with ETMv1.3 support, FWIW.)
      
       - The configuration on this chip may not populate as many
         registers as possible; e.g. only two data value comparators
         instead of eight.
      
      Includes a bugfix in the "etm info" command:  only one of the
      two registers is missing on older silicon, so show the first
      one before bailing.
      
      Update ETM usage docs to explain that those registers need to be
      written to configure what is traced, and that some ETM configs
      are not yet handled.  Also, give some examples of the kinds of
      constrained trace which could be arranged.
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      22045fa6
    • dbrownell's avatar
      Start cleaning up ETM register handling. On one ARM926 ETM+ETB · d9ce8a2f
      dbrownell authored
      system, removes 20 non-existent registers ... but still includes
      over 45 (!) ETM registers which don't even exist there ...
      
       - Integrate the various tables to get one struct per register
       - Get rid of needless per-register dynamic allocation
       - Double check list of registers:
          * Remove sixteen (!) non-registers for data comparators
          * Remove four registers that imply newer ETM than we support
          * Change some names to match current architecture specs
       - Handle more register info
          * some are write-only
          * some are read-only
          * record which versions have them, just in case
       - Reorganize the registers to facilitate removing the extras
          * group e.g. comparator/counter #N registers together
          * add and use lookup-by-ID
      
      
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      d9ce8a2f