Commit f876d5e9 authored by zwelch's avatar zwelch
Browse files

Transform 'u16' to 'uint16_t'

- Replace '\([^_]\)u16' with '\1uint16_t'.
- Replace '^u16' with 'uint16_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent c18947b9
......@@ -57,7 +57,7 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
......@@ -274,7 +274,7 @@ static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeo
}
/* Send one command to the AT91SAM flash controller */
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen)
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -309,14 +309,14 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_flash_bank_t *at91sam7_info;
target_t *target = t_bank->target;
u16 bnk, sec;
u16 arch;
uint16_t bnk, sec;
uint16_t arch;
u32 cidr;
uint8_t banks_num = 0;
u16 num_nvmbits = 0;
u16 sectors_num = 0;
u16 pages_per_sector = 0;
u16 page_size = 0;
uint16_t num_nvmbits = 0;
uint16_t sectors_num = 0;
uint16_t pages_per_sector = 0;
uint16_t page_size = 0;
u32 ext_freq;
u32 bank_size;
u32 base_address = 0;
......@@ -621,12 +621,12 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u16 retval;
uint16_t retval;
u32 blank;
u16 fast_check;
uint16_t fast_check;
uint8_t *buffer;
u16 nSector;
u16 nByte;
uint16_t nSector;
uint16_t nByte;
if (bank->target->state != TARGET_HALTED)
{
......@@ -759,9 +759,9 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *
int banks_num;
int num_sectors;
u16 pages_per_sector;
u16 page_size;
u16 num_nvmbits;
uint16_t pages_per_sector;
uint16_t page_size;
uint16_t num_nvmbits;
char *target_name;
......
......@@ -29,30 +29,30 @@ typedef struct at91sam7_flash_bank_s
{
/* chip id register */
u32 cidr;
u16 cidr_ext;
u16 cidr_nvptyp;
u16 cidr_arch;
u16 cidr_sramsiz;
u16 cidr_nvpsiz;
u16 cidr_nvpsiz2;
u16 cidr_eproc;
u16 cidr_version;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
uint16_t cidr_sramsiz;
uint16_t cidr_nvpsiz;
uint16_t cidr_nvpsiz2;
uint16_t cidr_eproc;
uint16_t cidr_version;
char *target_name;
/* flash auto-detection */
uint8_t flash_autodetection;
/* flash geometry */
u16 pages_per_sector;
u16 pagesize;
u16 pages_in_lockregion;
uint16_t pages_per_sector;
uint16_t pagesize;
uint16_t pages_in_lockregion;
/* nv memory bits */
u16 num_lockbits_on;
u16 lockbits;
u16 num_nvmbits;
u16 num_nvmbits_on;
u16 nvmbits;
uint16_t num_lockbits_on;
uint16_t lockbits;
uint16_t num_nvmbits;
uint16_t num_nvmbits_on;
uint16_t nvmbits;
uint8_t securitybit;
/* 0: not init
......
......@@ -76,8 +76,8 @@ extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir
extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
extern int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
extern int mcu_execute_queue(void);
......
......@@ -25,7 +25,7 @@
typedef struct avrf_type_s
{
char name[15];
u16 chip_id;
uint16_t chip_id;
int flash_page_size;
int flash_page_num;
int eeprom_page_size;
......
......@@ -203,7 +203,7 @@ static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
}
}
static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
......@@ -979,8 +979,8 @@ static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
/* NOTE:
* The data to flash must not be changed in endian! We write a bytestrem in
* target byte order already. Only the control and status byte lane of the flash
* WSM is interpreted by the CPU in different ways, when read a u16 or u32
* word (data seems to be in the upper or lower byte lane for u16 accesses).
* WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
* word (data seems to be in the upper or lower byte lane for uint16_t accesses).
*/
#if 0
......
......@@ -34,16 +34,16 @@ typedef struct cfi_flash_bank_s
int not_cfi;
int probed;
u16 manufacturer;
u16 device_id;
uint16_t manufacturer;
uint16_t device_id;
char qry[3];
/* identification string */
u16 pri_id;
u16 pri_addr;
u16 alt_id;
u16 alt_addr;
uint16_t pri_id;
uint16_t pri_addr;
uint16_t alt_id;
uint16_t alt_addr;
/* device-system interface */
uint8_t vcc_min;
......@@ -63,8 +63,8 @@ typedef struct cfi_flash_bank_s
/* flash geometry */
u32 dev_size;
u16 interface_desc;
u16 max_buf_write_size;
uint16_t interface_desc;
uint16_t max_buf_write_size;
uint8_t num_erase_regions;
u32 *erase_region_info;
......@@ -83,11 +83,11 @@ typedef struct cfi_intel_pri_ext_s
uint8_t minor_version;
u32 feature_support;
uint8_t suspend_cmd_support;
u16 blk_status_reg_mask;
uint16_t blk_status_reg_mask;
uint8_t vcc_optimal;
uint8_t vpp_optimal;
uint8_t num_protection_fields;
u16 prot_reg_addr;
uint16_t prot_reg_addr;
uint8_t fact_prot_reg_size;
uint8_t user_prot_reg_size;
uint8_t extra[0];
......@@ -144,8 +144,8 @@ typedef struct cfi_unlock_addresses_s
typedef struct cfi_fixup_s
{
u16 mfr;
u16 id;
uint16_t mfr;
uint16_t id;
void (*fixup)(flash_bank_t *flash, void *param);
void *param;
} cfi_fixup_t;
......
......@@ -157,7 +157,7 @@ static int davinci_address(struct nand_device_s *nand, uint8_t address)
return ERROR_OK;
}
static int davinci_write_data(struct nand_device_s *nand, u16 data)
static int davinci_write_data(struct nand_device_s *nand, uint16_t data)
{
struct davinci_nand *info = nand->controller_priv;
target_t *target = info->target;
......
......@@ -30,7 +30,7 @@ static int lpc3180_init(struct nand_device_s *device);
static int lpc3180_reset(struct nand_device_s *device);
static int lpc3180_command(struct nand_device_s *device, uint8_t command);
static int lpc3180_address(struct nand_device_s *device, uint8_t address);
static int lpc3180_write_data(struct nand_device_s *device, u16 data);
static int lpc3180_write_data(struct nand_device_s *device, uint16_t data);
static int lpc3180_read_data(struct nand_device_s *device, void *data);
static int lpc3180_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
static int lpc3180_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
......@@ -410,7 +410,7 @@ static int lpc3180_address(struct nand_device_s *device, uint8_t address)
return ERROR_OK;
}
static int lpc3180_write_data(struct nand_device_s *device, u16 data)
static int lpc3180_write_data(struct nand_device_s *device, uint16_t data)
{
lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
target_t *target = lpc3180_info->target;
......@@ -466,7 +466,7 @@ static int lpc3180_read_data(struct nand_device_s *device, void *data)
}
else if (device->bus_width == 16)
{
u16 *data16 = data;
uint16_t *data16 = data;
target_read_u16(target, 0x200b0000, data16);
}
else
......@@ -489,7 +489,7 @@ static int lpc3180_read_data(struct nand_device_s *device, void *data)
}
else if (device->bus_width == 16)
{
u16 *data16 = data;
uint16_t *data16 = data;
*data16 = data32 & 0xffff;
}
else
......
......@@ -956,8 +956,8 @@ static double mg_calc_pll(double XIN, mg_pll_t *p_pll_val)
static int mg_verify_interface(void)
{
u16 buff[MG_MFLASH_SECTOR_SIZE >> 1];
u16 i, j;
uint16_t buff[MG_MFLASH_SECTOR_SIZE >> 1];
uint16_t i, j;
u32 address = mflash_bank->base + MG_BUFFER_OFFSET;
target_t *target = mflash_bank->target;
int ret;
......@@ -1174,7 +1174,7 @@ static int mg_set_pll(mg_pll_t *pll)
memset(buff, 0xff, 512);
/* PLL Lock cycle and Feedback 9bit Divider */
memcpy(buff, &pll->lock_cyc, sizeof(u32));
memcpy(buff + 4, &pll->feedback_div, sizeof(u16));
memcpy(buff + 4, &pll->feedback_div, sizeof(uint16_t));
buff[6] = pll->input_div; /* PLL Input 5bit Divider */
buff[7] = pll->output_div; /* PLL Output Divider */
......@@ -1306,7 +1306,7 @@ static int mg_bank_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args
mflash_bank->base = strtoul(args[1], NULL, 0);
mflash_bank->rst_pin.num = strtoul(args[2], &str, 0);
if (*str)
mflash_bank->rst_pin.port[0] = (u16)tolower(str[0]);
mflash_bank->rst_pin.port[0] = (uint16_t)tolower(str[0]);
mflash_bank->target = target;
......
......@@ -384,7 +384,7 @@ int nand_read_status(struct nand_device_s *device, uint8_t *status)
/* read status */
if (device->device->options & NAND_BUSWIDTH_16)
{
u16 data;
uint16_t data;
device->controller->read_data(device, &data);
*status = data & 0xff;
}
......@@ -403,7 +403,7 @@ static int nand_poll_ready(struct nand_device_s *device, int timeout)
device->controller->command(device, NAND_CMD_STATUS);
do {
if (device->device->options & NAND_BUSWIDTH_16) {
u16 data;
uint16_t data;
device->controller->read_data(device, &data);
status = data & 0xff;
} else {
......@@ -464,7 +464,7 @@ int nand_probe(struct nand_device_s *device)
}
else
{
u16 data_buf;
uint16_t data_buf;
device->controller->read_data(device, &data_buf);
manufacturer_id = data_buf & 0xff;
device->controller->read_data(device, &data_buf);
......@@ -524,7 +524,7 @@ int nand_probe(struct nand_device_s *device)
}
else
{
u16 data_buf;
uint16_t data_buf;
device->controller->read_data(device, &data_buf);
id_buff[3] = data_buf;
......@@ -996,7 +996,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u
{
if (device->device->options & NAND_BUSWIDTH_16)
{
u16 data_buf = le_to_h_u16(data);
uint16_t data_buf = le_to_h_u16(data);
device->controller->write_data(device, data_buf);
data += 2;
i += 2;
......@@ -1021,7 +1021,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u
{
if (device->device->options & NAND_BUSWIDTH_16)
{
u16 oob_buf = le_to_h_u16(data);
uint16_t oob_buf = le_to_h_u16(data);
device->controller->write_data(device, oob_buf);
oob += 2;
i += 2;
......
......@@ -38,7 +38,7 @@ typedef struct nand_flash_controller_s
int (*reset)(struct nand_device_s *device);
int (*command)(struct nand_device_s *device, uint8_t command);
int (*address)(struct nand_device_s *device, uint8_t address);
int (*write_data)(struct nand_device_s *device, u16 data);
int (*write_data)(struct nand_device_s *device, uint16_t data);
int (*read_data)(struct nand_device_s *device, void *data);
int (*write_block_data)(struct nand_device_s *device, uint8_t *data, int size);
int (*read_block_data)(struct nand_device_s *device, uint8_t *data, int size);
......
......@@ -137,7 +137,7 @@ int nand_calculate_ecc_kw(struct nand_device_s *device, const uint8_t *data, uin
d = data[i];
if (r7) {
u16 *t = gf_exp + gf_log[r7];
uint16_t *t = gf_exp + gf_log[r7];
r7 = r6 ^ t[0x21c];
r6 = r5 ^ t[0x181];
......
......@@ -24,12 +24,12 @@
typedef struct non_cfi_s
{
u16 mfr;
u16 id;
u16 pri_id;
uint16_t mfr;
uint16_t id;
uint16_t pri_id;
u32 dev_size;
u16 interface_desc;
u16 max_buf_write_size;
uint16_t interface_desc;
uint16_t max_buf_write_size;
uint8_t num_erase_regions;
u32 erase_region_info[6];
uint8_t status_poll_mask;
......
......@@ -79,7 +79,7 @@ static int orion_nand_read(struct nand_device_s *device, void *data)
return ERROR_OK;
}
static int orion_nand_write(struct nand_device_s *device, u16 data)
static int orion_nand_write(struct nand_device_s *device, uint16_t data)
{
orion_nand_controller_t *hw = device->controller_priv;
target_t *target = hw->target;
......
......@@ -260,7 +260,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
pic32mx_flash_bank_t *pic32mx_info = NULL;
target_t *target = bank->target;
#if 0
u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
int i, reg, bit;
int status;
u32 protection;
......@@ -285,10 +285,10 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
* high density - each bit refers to a 2bank protection */
target_read_u32(target, PIC32MX_FLASH_WRPR, &protection);
prot_reg[0] = (u16)protection;
prot_reg[1] = (u16)(protection >> 8);
prot_reg[2] = (u16)(protection >> 16);
prot_reg[3] = (u16)(protection >> 24);
prot_reg[0] = (uint16_t)protection;
prot_reg[1] = (uint16_t)(protection >> 8);
prot_reg[2] = (uint16_t)(protection >> 16);
prot_reg[3] = (uint16_t)(protection >> 24);
if (pic32mx_info->ppage_size == 2)
{
......@@ -596,7 +596,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
int i;
u16 num_pages = 0;
uint16_t num_pages = 0;
u32 device_id;
int page_size;
......
......@@ -34,7 +34,7 @@
static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
static int s3c2410_init(struct nand_device_s *device);
static int s3c2410_read_data(struct nand_device_s *device, void *data);
static int s3c2410_write_data(struct nand_device_s *device, u16 data);
static int s3c2410_write_data(struct nand_device_s *device, uint16_t data);
static int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
nand_flash_controller_t s3c2410_nand_controller =
......@@ -86,7 +86,7 @@ static int s3c2410_init(struct nand_device_s *device)
return ERROR_OK;
}
static int s3c2410_write_data(struct nand_device_s *device, u16 data)
static int s3c2410_write_data(struct nand_device_s *device, uint16_t data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
......
......@@ -104,7 +104,7 @@ int s3c24xx_address(struct nand_device_s *device, uint8_t address)
return ERROR_OK;
}
int s3c24xx_write_data(struct nand_device_s *device, u16 data)
int s3c24xx_write_data(struct nand_device_s *device, uint16_t data)
{
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
target_t *target = s3c24xx_info->target;
......
......@@ -48,7 +48,7 @@ extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx);
extern int s3c24xx_reset(struct nand_device_s *device);
extern int s3c24xx_command(struct nand_device_s *device, uint8_t command);
extern int s3c24xx_address(struct nand_device_s *device, uint8_t address);
extern int s3c24xx_write_data(struct nand_device_s *device, u16 data);
extern int s3c24xx_write_data(struct nand_device_s *device, uint16_t data);
extern int s3c24xx_read_data(struct nand_device_s *device, void *data);
extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
......
......@@ -412,7 +412,7 @@ static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int time
}
/* Send one command to the flash controller */
static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,u16 pagen)
static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_t pagen)
{
u32 fmc;
target_t *target = bank->target;
......
......@@ -40,7 +40,7 @@ typedef struct stellaris_flash_bank_s
u32 pages_in_lockregion;
/* nv memory bits */
u16 num_lockbits;
uint16_t num_lockbits;
u32 lockbits;
/* main clock status */
......
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