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card10
openocd
Commits
f6315d5e
Commit
f6315d5e
authored
Jun 03, 2011
by
Freddie Chopin
Committed by
Øyvind Harboe
Jun 04, 2011
Browse files
Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixes
parent
ae02a0e5
Changes
22
Hide whitespace changes
Inline
Side-by-side
src/flash/nor/core.c
View file @
f6315d5e
...
...
@@ -621,7 +621,6 @@ int flash_write_unlock(struct target *target, struct image *image,
{
uint32_t
buffer_size
;
uint8_t
*
buffer
;
int
section_first
;
int
section_last
;
uint32_t
run_address
=
sections
[
section
]
->
base_address
+
section_offset
;
uint32_t
run_size
=
sections
[
section
]
->
size
-
section_offset
;
...
...
@@ -649,7 +648,6 @@ int flash_write_unlock(struct target *target, struct image *image,
}
/* collect consecutive sections which fall into the same bank */
section_first
=
section
;
section_last
=
section
;
padding
[
section
]
=
0
;
while
((
run_address
+
run_size
-
1
<
c
->
base
+
c
->
size
-
1
)
...
...
src/flash/nor/em357.c
View file @
f6315d5e
...
...
@@ -813,7 +813,6 @@ COMMAND_HANDLER(em357_handle_lock_command)
COMMAND_HANDLER
(
em357_handle_unlock_command
)
{
struct
target
*
target
=
NULL
;
struct
em357_flash_bank
*
em357_info
=
NULL
;
if
(
CMD_ARGC
<
1
)
{
...
...
@@ -826,8 +825,6 @@ COMMAND_HANDLER(em357_handle_unlock_command)
if
(
ERROR_OK
!=
retval
)
return
retval
;
em357_info
=
bank
->
driver_priv
;
target
=
bank
->
target
;
if
(
target
->
state
!=
TARGET_HALTED
)
...
...
src/flash/nor/pic32mx.c
View file @
f6315d5e
...
...
@@ -313,11 +313,8 @@ static int pic32mx_erase(struct flash_bank *bank, int first, int last)
static
int
pic32mx_protect
(
struct
flash_bank
*
bank
,
int
set
,
int
first
,
int
last
)
{
struct
pic32mx_flash_bank
*
pic32mx_info
=
NULL
;
struct
target
*
target
=
bank
->
target
;
pic32mx_info
=
bank
->
driver_priv
;
if
(
target
->
state
!=
TARGET_HALTED
)
{
LOG_ERROR
(
"Target not halted"
);
...
...
src/flash/nor/stm32x.c
View file @
f6315d5e
...
...
@@ -1217,7 +1217,6 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
COMMAND_HANDLER
(
stm32x_handle_unlock_command
)
{
struct
target
*
target
=
NULL
;
struct
stm32x_flash_bank
*
stm32x_info
=
NULL
;
if
(
CMD_ARGC
<
1
)
{
...
...
@@ -1230,8 +1229,6 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
if
(
ERROR_OK
!=
retval
)
return
retval
;
stm32x_info
=
bank
->
driver_priv
;
target
=
bank
->
target
;
if
(
target
->
state
!=
TARGET_HALTED
)
...
...
src/flash/nor/str9x.c
View file @
f6315d5e
...
...
@@ -681,7 +681,6 @@ static int get_str9x_info(struct flash_bank *bank, char *buf, int buf_size)
COMMAND_HANDLER
(
str9x_handle_flash_config_command
)
{
struct
str9x_flash_bank
*
str9x_info
;
struct
target
*
target
=
NULL
;
if
(
CMD_ARGC
<
5
)
...
...
@@ -700,8 +699,6 @@ COMMAND_HANDLER(str9x_handle_flash_config_command)
COMMAND_PARSE_NUMBER
(
u32
,
CMD_ARGV
[
3
],
bbadr
);
COMMAND_PARSE_NUMBER
(
u32
,
CMD_ARGV
[
4
],
nbbadr
);
str9x_info
=
bank
->
driver_priv
;
target
=
bank
->
target
;
if
(
bank
->
target
->
state
!=
TARGET_HALTED
)
...
...
src/pld/virtex2.c
View file @
f6315d5e
...
...
@@ -175,7 +175,6 @@ static int virtex2_load(struct pld_device *pld_device, const char *filename)
COMMAND_HANDLER
(
virtex2_handle_read_stat_command
)
{
struct
pld_device
*
device
;
struct
virtex2_pld_device
*
virtex2_info
;
uint32_t
status
;
if
(
CMD_ARGC
<
1
)
...
...
@@ -193,8 +192,6 @@ COMMAND_HANDLER(virtex2_handle_read_stat_command)
return
ERROR_OK
;
}
virtex2_info
=
device
->
driver_priv
;
virtex2_read_stat
(
device
,
&
status
);
command_print
(
CMD_CTX
,
"virtex2 status register: 0x%8.8"
PRIx32
""
,
status
);
...
...
src/rtos/rtos.c
View file @
f6315d5e
...
...
@@ -314,15 +314,14 @@ int gdb_thread_packet(struct connection *connection, struct target *target, char
int
symbol_num
;
char
*
found
=
strstr
(
packet
,
"qSymbol::"
);
int
numconv
;
if
(
0
==
found
)
{
numconv
=
sscanf
(
packet
,
"qSymbol:%"
SCNx64
":%s"
,
&
value
,
hex_name_str
);
sscanf
(
packet
,
"qSymbol:%"
SCNx64
":%s"
,
&
value
,
hex_name_str
);
}
else
{
// No value returned by GDB - symbol was not found
numconv
=
sscanf
(
packet
,
"qSymbol::%s"
,
hex_name_str
);
sscanf
(
packet
,
"qSymbol::%s"
,
hex_name_str
);
}
name_str
=
(
char
*
)
malloc
(
1
+
strlen
(
hex_name_str
)
/
2
);
...
...
src/server/gdb_server.c
View file @
f6315d5e
...
...
@@ -1731,11 +1731,10 @@ static int gdb_memory_map(struct connection *connection,
for
(
i
=
0
;
i
<
flash_get_bank_count
();
i
++
)
{
int
j
;
unsigned
sector_size
=
0
;
uint32_t
start
,
end
;
uint32_t
start
;
p
=
banks
[
i
];
start
=
p
->
base
;
end
=
p
->
base
+
p
->
size
;
if
(
ram_start
<
p
->
base
)
xml_printf
(
&
retval
,
&
xml
,
&
pos
,
&
size
,
...
...
src/svf/svf.c
View file @
f6315d5e
...
...
@@ -653,7 +653,7 @@ static int svf_read_command_from_file(FILE * fd)
unsigned
char
ch
;
int
i
=
0
;
size_t
cmd_pos
=
0
;
int
cmd_ok
=
0
,
slash
=
0
,
comment
=
0
;
int
cmd_ok
=
0
,
slash
=
0
;
if
(
svf_getline
(
&
svf_read_line
,
&
svf_read_line_size
,
svf_fd
)
<=
0
)
{
...
...
@@ -699,7 +699,6 @@ static int svf_read_command_from_file(FILE * fd)
i
=
-
1
;
case
'\r'
:
slash
=
0
;
comment
=
0
;
/* Don't save '\r' and '\n' if no data is parsed */
if
(
!
cmd_pos
)
break
;
...
...
@@ -1507,13 +1506,12 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
{
#if 1
/* FIXME handle statemove failures */
int
retval
;
uint32_t
min_usec
=
1000000
*
min_time
;
// enter into run_state if necessary
if
(
cmd_queue_cur_state
!=
svf_para
.
runtest_run_state
)
{
retval
=
svf_add_statemove
(
svf_para
.
runtest_run_state
);
svf_add_statemove
(
svf_para
.
runtest_run_state
);
}
// add clocks and/or min wait
...
...
@@ -1530,7 +1528,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
// move to end_state if necessary
if
(
svf_para
.
runtest_end_state
!=
svf_para
.
runtest_run_state
)
{
retval
=
svf_add_statemove
(
svf_para
.
runtest_end_state
);
svf_add_statemove
(
svf_para
.
runtest_end_state
);
}
#else
if
(
svf_para
.
runtest_run_state
!=
TAP_IDLE
)
...
...
src/target/arm720t.c
View file @
f6315d5e
...
...
@@ -253,15 +253,12 @@ static int arm720t_verify_pointer(struct command_context *cmd_ctx,
static
int
arm720t_arch_state
(
struct
target
*
target
)
{
struct
arm720t_common
*
arm720t
=
target_to_arm720
(
target
);
struct
arm
*
armv4_5
;
static
const
char
*
state
[]
=
{
"disabled"
,
"enabled"
};
armv4_5
=
&
arm720t
->
arm7_9_common
.
armv4_5_common
;
arm_arch_state
(
target
);
LOG_USER
(
"MMU: %s, Cache: %s"
,
state
[
arm720t
->
armv4_5_mmu
.
mmu_enabled
],
...
...
@@ -466,13 +463,11 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
int
retval
;
struct
target
*
target
=
get_current_target
(
CMD_CTX
);
struct
arm720t_common
*
arm720t
=
target_to_arm720
(
target
);
struct
arm_jtag
*
jtag_info
;
retval
=
arm720t_verify_pointer
(
CMD_CTX
,
arm720t
);
if
(
retval
!=
ERROR_OK
)
return
retval
;
jtag_info
=
&
arm720t
->
arm7_9_common
.
jtag_info
;
if
(
target
->
state
!=
TARGET_HALTED
)
{
...
...
src/target/arm920t.c
View file @
f6315d5e
...
...
@@ -533,7 +533,6 @@ int arm920t_arch_state(struct target *target)
};
struct
arm920t_common
*
arm920t
=
target_to_arm920
(
target
);
struct
arm
*
armv4_5
;
if
(
arm920t
->
common_magic
!=
ARM920T_COMMON_MAGIC
)
{
...
...
@@ -541,8 +540,6 @@ int arm920t_arch_state(struct target *target)
return
ERROR_TARGET_INVALID
;
}
armv4_5
=
&
arm920t
->
arm7_9_common
.
armv4_5_common
;
arm_arch_state
(
target
);
LOG_USER
(
"MMU: %s, D-Cache: %s, I-Cache: %s"
,
state
[
arm920t
->
armv4_5_mmu
.
mmu_enabled
],
...
...
@@ -898,7 +895,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
uint32_t
C15_C_D_Ind
,
C15_C_I_Ind
;
int
i
;
FILE
*
output
;
struct
arm920t_cache_line
d_cache
[
8
][
64
],
i_cache
[
8
][
64
];
int
segment
,
index_t
;
struct
reg
*
r
;
...
...
@@ -1007,8 +1003,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
return
retval
;
}
d_cache
[
segment
][
index_t
].
cam
=
regs
[
9
];
/* mask LFSR[6] */
regs
[
9
]
&=
0xfffffffe
;
fprintf
(
output
,
"
\n
segment: %i, index: %i, CAM: 0x%8.8"
...
...
@@ -1018,7 +1012,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
for
(
i
=
1
;
i
<
9
;
i
++
)
{
d_cache
[
segment
][
index_t
].
data
[
i
]
=
regs
[
i
];
fprintf
(
output
,
"%i: 0x%8.8"
PRIx32
"
\n
"
,
i
-
1
,
regs
[
i
]);
}
...
...
@@ -1115,8 +1108,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
return
retval
;
}
i_cache
[
segment
][
index_t
].
cam
=
regs
[
9
];
/* mask LFSR[6] */
regs
[
9
]
&=
0xfffffffe
;
fprintf
(
output
,
"
\n
segment: %i, index: %i, "
...
...
@@ -1126,7 +1117,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
for
(
i
=
1
;
i
<
9
;
i
++
)
{
i_cache
[
segment
][
index_t
].
data
[
i
]
=
regs
[
i
];
fprintf
(
output
,
"%i: 0x%8.8"
PRIx32
"
\n
"
,
i
-
1
,
regs
[
i
]);
}
...
...
src/target/arm926ejs.c
View file @
f6315d5e
...
...
@@ -536,7 +536,6 @@ int arm926ejs_arch_state(struct target *target)
};
struct
arm926ejs_common
*
arm926ejs
=
target_to_arm926
(
target
);
struct
arm
*
armv4_5
;
if
(
arm926ejs
->
common_magic
!=
ARM926EJS_COMMON_MAGIC
)
{
...
...
@@ -544,8 +543,6 @@ int arm926ejs_arch_state(struct target *target)
return
ERROR_TARGET_INVALID
;
}
armv4_5
=
&
arm926ejs
->
arm7_9_common
.
armv4_5_common
;
arm_arch_state
(
target
);
LOG_USER
(
"MMU: %s, D-Cache: %s, I-Cache: %s"
,
state
[
arm926ejs
->
armv4_5_mmu
.
mmu_enabled
],
...
...
src/target/arm946e.c
View file @
f6315d5e
...
...
@@ -383,7 +383,6 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
uint32_t
shift
=
0
;
uint32_t
cur_addr
=
0x0
;
uint32_t
cp15_idx
,
set
,
way
,
dtag
;
int
nb_idx
;
uint32_t
i
=
0
;
int
retval
;
...
...
@@ -403,7 +402,6 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
shift
=
csize
-
0x3
;
/* Now 0 = 4KB, 1 = 8KB, ... */
csize
=
1
<<
(
12
+
shift
);
nb_idx
=
(
csize
/
32
);
set
=
(
cur_addr
>>
5
)
&
0xff
;
/* set field is 8 bits long */
...
...
src/target/arm_adi_v5.c
View file @
f6315d5e
...
...
@@ -1088,7 +1088,7 @@ int dap_get_debugbase(struct adiv5_dap *dap, int ap,
{
uint32_t
ap_old
;
int
retval
;
uint32_t
dbgbase
,
apid
,
idcode
;
uint32_t
dbgbase
,
apid
;
/* AP address is in bits 31:24 of DP_SELECT */
if
(
ap
>=
256
)
...
...
@@ -1110,10 +1110,8 @@ int dap_get_debugbase(struct adiv5_dap *dap, int ap,
/* Excavate the device ID code */
struct
jtag_tap
*
tap
=
dap
->
jtag_info
->
tap
;
while
(
tap
!=
NULL
)
{
if
(
tap
->
hasidcode
)
{
idcode
=
tap
->
idcode
;
if
(
tap
->
hasidcode
)
break
;
}
tap
=
tap
->
next_tap
;
}
if
(
tap
==
NULL
||
!
tap
->
hasidcode
)
...
...
src/target/arm_disassembler.c
View file @
f6315d5e
...
...
@@ -300,7 +300,7 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode,
else
/* LDC or STC */
{
uint8_t
CRd
,
Rn
,
offset
;
uint8_t
U
,
N
;
uint8_t
U
;
char
*
mnemonic
;
char
addressing_mode
[
32
];
...
...
@@ -321,7 +321,6 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode,
}
U
=
(
opcode
&
0x00800000
)
>>
23
;
N
=
(
opcode
&
0x00400000
)
>>
22
;
/* addressing modes */
if
((
opcode
&
0x01200000
)
==
0x01000000
)
/* offset */
...
...
src/target/armv4_5.c
View file @
f6315d5e
...
...
@@ -612,7 +612,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
{
struct
target
*
target
=
get_current_target
(
CMD_CTX
);
struct
arm
*
armv4_5
=
target_to_arm
(
target
);
unsigned
num_regs
;
struct
reg
*
regs
;
if
(
!
is_arm
(
armv4_5
))
...
...
@@ -645,7 +644,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
return
ERROR_FAIL
;
}
num_regs
=
armv4_5
->
core_cache
->
num_regs
;
regs
=
armv4_5
->
core_cache
->
reg_list
;
for
(
unsigned
mode
=
0
;
mode
<
ARRAY_SIZE
(
arm_mode_data
);
mode
++
)
{
...
...
src/target/breakpoints.c
View file @
f6315d5e
...
...
@@ -159,13 +159,11 @@ static void breakpoint_free(struct target *target, struct breakpoint *breakpoint
void
breakpoint_remove_internal
(
struct
target
*
target
,
uint32_t
address
)
{
struct
breakpoint
*
breakpoint
=
target
->
breakpoints
;
struct
breakpoint
**
breakpoint_p
=
&
target
->
breakpoints
;
while
(
breakpoint
)
{
if
(
breakpoint
->
address
==
address
)
break
;
breakpoint_p
=
&
breakpoint
->
next
;
breakpoint
=
breakpoint
->
next
;
}
...
...
@@ -332,13 +330,11 @@ static void watchpoint_free(struct target *target, struct watchpoint *watchpoint
void
watchpoint_remove
(
struct
target
*
target
,
uint32_t
address
)
{
struct
watchpoint
*
watchpoint
=
target
->
watchpoints
;
struct
watchpoint
**
watchpoint_p
=
&
target
->
watchpoints
;
while
(
watchpoint
)
{
if
(
watchpoint
->
address
==
address
)
break
;
watchpoint_p
=
&
watchpoint
->
next
;
watchpoint
=
watchpoint
->
next
;
}
...
...
src/target/dsp563xx.c
View file @
f6315d5e
...
...
@@ -349,13 +349,11 @@ static int dsp563xx_get_gdb_reg_list(struct target *target, struct reg **reg_lis
static
int
dsp563xx_read_core_reg
(
struct
target
*
target
,
int
num
)
{
uint32_t
reg_value
;
struct
dsp563xx_core_reg
*
dsp563xx_core_reg
;
struct
dsp563xx_common
*
dsp563xx
=
target_to_dsp563xx
(
target
);
if
((
num
<
0
)
||
(
num
>=
DSP563XX_NUMCOREREGS
))
return
ERROR_INVALID_ARGUMENTS
;
dsp563xx_core_reg
=
dsp563xx
->
core_cache
->
reg_list
[
num
].
arch_info
;
reg_value
=
dsp563xx
->
core_regs
[
num
];
buf_set_u32
(
dsp563xx
->
core_cache
->
reg_list
[
num
].
value
,
0
,
32
,
reg_value
);
dsp563xx
->
core_cache
->
reg_list
[
num
].
valid
=
1
;
...
...
@@ -367,14 +365,12 @@ static int dsp563xx_read_core_reg(struct target *target, int num)
static
int
dsp563xx_write_core_reg
(
struct
target
*
target
,
int
num
)
{
uint32_t
reg_value
;
struct
dsp563xx_core_reg
*
dsp563xx_core_reg
;
struct
dsp563xx_common
*
dsp563xx
=
target_to_dsp563xx
(
target
);
if
((
num
<
0
)
||
(
num
>=
DSP563XX_NUMCOREREGS
))
return
ERROR_INVALID_ARGUMENTS
;
reg_value
=
buf_get_u32
(
dsp563xx
->
core_cache
->
reg_list
[
num
].
value
,
0
,
32
);
dsp563xx_core_reg
=
dsp563xx
->
core_cache
->
reg_list
[
num
].
arch_info
;
dsp563xx
->
core_regs
[
num
]
=
reg_value
;
dsp563xx
->
core_cache
->
reg_list
[
num
].
valid
=
1
;
dsp563xx
->
core_cache
->
reg_list
[
num
].
dirty
=
0
;
...
...
@@ -582,7 +578,7 @@ static int dsp563xx_reg_pc_read(struct target *target)
static
int
dsp563xx_reg_ssh_read
(
struct
target
*
target
)
{
int
err
;
uint32_t
sp
,
sc
,
ep
;
uint32_t
sp
;
struct
dsp563xx_core_reg
*
arch_info
;
struct
dsp563xx_common
*
dsp563xx
=
target_to_dsp563xx
(
target
);
...
...
@@ -598,14 +594,14 @@ static int dsp563xx_reg_ssh_read(struct target *target)
/* get a valid stack count */
if
((
err
=
dsp563xx_read_register
(
target
,
DSP563XX_REG_IDX_SC
,
0
))
!=
ERROR_OK
)
return
err
;
sc
=
dsp563xx
->
core_regs
[
DSP563XX_REG_IDX_SC
];
if
((
err
=
dsp563xx_write_register
(
target
,
DSP563XX_REG_IDX_SC
,
0
))
!=
ERROR_OK
)
return
err
;
/* get a valid extended pointer */
if
((
err
=
dsp563xx_read_register
(
target
,
DSP563XX_REG_IDX_EP
,
0
))
!=
ERROR_OK
)
return
err
;
ep
=
dsp563xx
->
core_regs
[
DSP563XX_REG_IDX_EP
];
if
((
err
=
dsp563xx_write_register
(
target
,
DSP563XX_REG_IDX_EP
,
0
))
!=
ERROR_OK
)
return
err
;
...
...
@@ -1060,7 +1056,6 @@ static int dsp563xx_halt(struct target *target)
static
int
dsp563xx_resume
(
struct
target
*
target
,
int
current
,
uint32_t
address
,
int
handle_breakpoints
,
int
debug_execution
)
{
int
err
;
struct
dsp563xx_core_reg
*
dsp563xx_core_reg
;
struct
dsp563xx_common
*
dsp563xx
=
target_to_dsp563xx
(
target
);
/* check if pc was changed and resume want to execute the next address
...
...
@@ -1072,7 +1067,6 @@ static int dsp563xx_resume(struct target *target, int current, uint32_t address,
if
(
current
&&
dsp563xx
->
core_cache
->
reg_list
[
DSP563XX_REG_IDX_PC
].
dirty
)
{
dsp563xx_write_core_reg
(
target
,
DSP563XX_REG_IDX_PC
);
dsp563xx_core_reg
=
dsp563xx
->
core_cache
->
reg_list
[
DSP563XX_REG_IDX_PC
].
arch_info
;
address
=
dsp563xx
->
core_regs
[
DSP563XX_REG_IDX_PC
];
current
=
0
;
}
...
...
@@ -1112,7 +1106,6 @@ static int dsp563xx_step_ex(struct target *target, int current, uint32_t address
int
err
;
uint32_t
once_status
;
uint32_t
dr_in
,
cnt
;
struct
dsp563xx_core_reg
*
dsp563xx_core_reg
;
struct
dsp563xx_common
*
dsp563xx
=
target_to_dsp563xx
(
target
);
if
(
target
->
state
!=
TARGET_HALTED
)
...
...
@@ -1130,7 +1123,6 @@ static int dsp563xx_step_ex(struct target *target, int current, uint32_t address
if
(
current
&&
dsp563xx
->
core_cache
->
reg_list
[
DSP563XX_REG_IDX_PC
].
dirty
)
{
dsp563xx_write_core_reg
(
target
,
DSP563XX_REG_IDX_PC
);
dsp563xx_core_reg
=
dsp563xx
->
core_cache
->
reg_list
[
DSP563XX_REG_IDX_PC
].
arch_info
;
address
=
dsp563xx
->
core_regs
[
DSP563XX_REG_IDX_PC
];
current
=
0
;
}
...
...
src/target/embeddedice.c
View file @
f6315d5e
...
...
@@ -497,13 +497,12 @@ static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf)
void
embeddedice_write_reg
(
struct
reg
*
reg
,
uint32_t
value
)
{
struct
embeddedice_reg
*
ice_reg
=
reg
->
arch_info
;
int
retval
;
LOG_DEBUG
(
"%i: 0x%8.8"
PRIx32
""
,
ice_reg
->
addr
,
value
);
retval
=
arm_jtag_scann
(
ice_reg
->
jtag_info
,
0x2
,
TAP_IDLE
);
arm_jtag_scann
(
ice_reg
->
jtag_info
,
0x2
,
TAP_IDLE
);
retval
=
arm_jtag_set_instr
(
ice_reg
->
jtag_info
,
ice_reg
->
jtag_info
->
intest_instr
,
NULL
,
TAP_IDLE
);
arm_jtag_set_instr
(
ice_reg
->
jtag_info
,
ice_reg
->
jtag_info
->
intest_instr
,
NULL
,
TAP_IDLE
);
uint8_t
reg_addr
=
ice_reg
->
addr
&
0x1f
;
embeddedice_write_reg_inner
(
ice_reg
->
jtag_info
->
tap
,
reg_addr
,
value
);
...
...
src/target/mips32.c
View file @
f6315d5e
...
...
@@ -143,7 +143,6 @@ static int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
static
int
mips32_read_core_reg
(
struct
target
*
target
,
int
num
)
{
uint32_t
reg_value
;
struct
mips32_core_reg
*
mips_core_reg
;
/* get pointers to arch-specific information */
struct
mips32_common
*
mips32
=
target_to_mips32
(
target
);
...
...
@@ -151,7 +150,6 @@ static int mips32_read_core_reg(struct target *target, int num)
if
((
num
<
0
)
||
(
num
>=
MIPS32NUMCOREREGS
))
return
ERROR_INVALID_ARGUMENTS
;
mips_core_reg
=
mips32
->
core_cache
->
reg_list
[
num
].
arch_info
;
reg_value
=
mips32
->
core_regs
[
num
];
buf_set_u32
(
mips32
->
core_cache
->
reg_list
[
num
].
value
,
0
,
32
,
reg_value
);
mips32
->
core_cache
->
reg_list
[
num
].
valid
=
1
;
...
...
@@ -163,7 +161,6 @@ static int mips32_read_core_reg(struct target *target, int num)
static
int
mips32_write_core_reg
(
struct
target
*
target
,
int
num
)
{
uint32_t
reg_value
;
struct
mips32_core_reg
*
mips_core_reg
;
/* get pointers to arch-specific information */
struct
mips32_common
*
mips32
=
target_to_mips32
(
target
);
...
...
@@ -172,7 +169,6 @@ static int mips32_write_core_reg(struct target *target, int num)
return
ERROR_INVALID_ARGUMENTS
;
reg_value
=
buf_get_u32
(
mips32
->
core_cache
->
reg_list
[
num
].
value
,
0
,
32
);
mips_core_reg
=
mips32
->
core_cache
->
reg_list
[
num
].
arch_info
;
mips32
->
core_regs
[
num
]
=
reg_value
;
LOG_DEBUG
(
"write core reg %i value 0x%"
PRIx32
""
,
num
,
reg_value
);
mips32
->
core_cache
->
reg_list
[
num
].
valid
=
1
;
...
...
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