SimonQian <simonqian@simonqian.com> AVR wip

git-svn-id: svn://svn.berlios.de/openocd/trunk@1540 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/flash/Makefile.am

@@ -7,10 +7,10 @@ libflash_a_SOURCES = \
 	str7x.c str9x.c aduc702x.c nand.c nand_ecc.c \
 	lpc3180_nand_controller.c stellaris.c str9xpec.c stm32x.c tms470.c \
 	ecos.c orion_nand.c s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c \
-	s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c
+	s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c pic32mx.c avrf.c
 noinst_HEADERS = \
 	flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h at91sam7_old.h str7x.h \
 	str9x.h nand.h lpc3180_nand_controller.h stellaris.h str9xpec.h \
 	stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h \
-	mflash.h ocl.h pic32mx.h
+	mflash.h ocl.h pic32mx.h avrf.h
 MAINTAINERCLEANFILES = Makefile.in

src/flash/avrf.c

+/***************************************************************************
+ *   Copyright (C) 2009 by Simon Qian                                      *
+ *   SimonQian@SimonQian.com                                               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+
+#include "avrf.h"
+#include "avrt.h"
+#include "flash.h"
+#include "target.h"
+#include "log.h"
+#include "algorithm.h"
+#include "binarybuffer.h"
+
+#include <stdlib.h>
+#include <string.h>
+
+/* AVR_JTAG_Instructions */
+#define AVR_JTAG_INS_LEN							4
+// Public Instructions:
+#define AVR_JTAG_INS_EXTEST							0x00
+#define AVR_JTAG_INS_IDCODE							0x01
+#define AVR_JTAG_INS_SAMPLE_PRELOAD					0x02
+#define AVR_JTAG_INS_BYPASS							0x0F
+// AVR Specified Public Instructions:
+#define AVR_JTAG_INS_AVR_RESET						0x0C
+#define AVR_JTAG_INS_PROG_ENABLE					0x04
+#define AVR_JTAG_INS_PROG_COMMANDS					0x05
+#define AVR_JTAG_INS_PROG_PAGELOAD					0x06
+#define AVR_JTAG_INS_PROG_PAGEREAD					0x07
+
+// Data Registers:
+#define AVR_JTAG_REG_Bypass_Len						1
+#define AVR_JTAG_REG_DeviceID_Len					32
+
+#define AVR_JTAG_REG_Reset_Len						1
+#define AVR_JTAG_REG_JTAGID_Len						32
+#define AVR_JTAG_REG_ProgrammingEnable_Len			16
+#define AVR_JTAG_REG_ProgrammingCommand_Len			15
+#define AVR_JTAG_REG_FlashDataByte_Len				16
+
+avrf_type_t avft_chips_info[] = 
+{
+//	 name,			chip_id,	flash_page_size,	flash_page_num,	eeprom_page_size,	eeprom_page_num
+	{"atmega128",	0x9702,		256,				512,			8,					512},
+};
+
+static int avrf_register_commands(struct command_context_s *cmd_ctx);
+static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int avrf_erase(struct flash_bank_s *bank, int first, int last);
+static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int avrf_probe(struct flash_bank_s *bank);
+static int avrf_auto_probe(struct flash_bank_s *bank);
+//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int avrf_protect_check(struct flash_bank_s *bank);
+static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);
+
+static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+
+extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
+extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
+
+extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
+extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
+extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
+extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
+extern int mcu_execute_queue(void);
+
+flash_driver_t avr_flash =
+{
+	.name = "avr",
+	.register_commands = avrf_register_commands,
+	.flash_bank_command = avrf_flash_bank_command,
+	.erase = avrf_erase,
+	.protect = avrf_protect,
+	.write = avrf_write,
+	.probe = avrf_probe,
+	.auto_probe = avrf_auto_probe,
+	.erase_check = default_flash_mem_blank_check,
+	.protect_check = avrf_protect_check,
+	.info = avrf_info
+};
+
+/* avr program functions */
+static int avr_jtag_reset(avr_common_t *avr, u32 reset)
+{
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
+	
+	return ERROR_OK;
+}
+
+static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
+{
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
+	avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
+	
+	return ERROR_OK;
+}
+
+static int avr_jtagprg_enterprogmode(avr_common_t *avr)
+{
+	avr_jtag_reset(avr, 1);
+	
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
+	
+	return ERROR_OK;
+}
+
+static int avr_jtagprg_leaveprogmode(avr_common_t *avr)
+{
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
+
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
+
+	avr_jtag_reset(avr, 0);
+	
+	return ERROR_OK;
+}
+
+static int avr_jtagprg_chiperase(avr_common_t *avr)
+{
+	u32 poll_value;
+	
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
+	
+	do{
+		poll_value = 0;
+		avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
+		if (ERROR_OK != mcu_execute_queue())
+		{
+			return ERROR_FAIL;
+		}
+		LOG_DEBUG("poll_value = 0x%04X", poll_value);
+	}while(!(poll_value & 0x0200));
+	
+	return ERROR_OK;
+}
+
+static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
+{
+	u32 i, poll_value;
+	
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
+	
+	// load addr high byte
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
+	
+	// load addr low byte
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
+	
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
+	
+	for (i = 0; i < page_size; i++)
+	{
+		if (i < buf_size)
+		{
+			avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
+		}
+		else
+		{
+			avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
+		}
+	}
+	
+	avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
+	
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
+	avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
+	
+	do{
+		poll_value = 0;
+		avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
+		if (ERROR_OK != mcu_execute_queue())
+		{
+			return ERROR_FAIL;
+		}
+		LOG_DEBUG("poll_value = 0x%04X", poll_value);
+	}while(!(poll_value & 0x0200));
+	
+	return ERROR_OK;
+}
+
+/* interface command */
+static int avrf_register_commands(struct command_context_s *cmd_ctx)
+{
+	command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");
+	
+	register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,
+					 "mass erase device");
+	
+	return ERROR_OK;
+}
+
+static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+{
+	avrf_flash_bank_t *avrf_info;
+	
+	if (argc < 6)
+	{
+		LOG_WARNING("incomplete flash_bank avr configuration");
+		return ERROR_FLASH_BANK_INVALID;
+	}
+	
+	avrf_info = malloc(sizeof(avrf_flash_bank_t));
+	bank->driver_priv = avrf_info;
+	
+	avrf_info->probed = 0;
+	
+	return ERROR_OK;
+}
+
+static int avrf_erase(struct flash_bank_s *bank, int first, int last)
+{
+	LOG_INFO(__FUNCTION__);
+	return ERROR_OK;
+}
+
+static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
+{
+	LOG_INFO(__FUNCTION__);
+	return ERROR_OK;
+}
+
+static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+{
+	target_t *target = bank->target;
+	avr_common_t *avr = target->arch_info;
+	u32 cur_size, cur_buffer_size, page_size;
+	
+	if (bank->target->state != TARGET_HALTED)
+	{
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+	
+	page_size = bank->sectors[0].size;
+	if ((offset % page_size) != 0)
+	{
+		LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);
+		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+	}
+	
+	LOG_DEBUG("offset is 0x%08X", offset);
+	LOG_DEBUG("count is %d", count);
+	
+	if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
+	{
+		return ERROR_FAIL;
+	}
+	
+	cur_size = 0;
+	while(count > 0)
+	{
+		if (count > page_size)
+		{
+			cur_buffer_size = page_size;
+		}
+		else
+		{
+			cur_buffer_size = count;
+		}
+		avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
+		count -= cur_buffer_size;
+		cur_size += cur_buffer_size;
+		
+		keep_alive();
+	}
+	
+	return avr_jtagprg_leaveprogmode(avr);
+}
+
+#define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
+#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
+#define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
+static int avrf_probe(struct flash_bank_s *bank)
+{
+	target_t *target = bank->target;
+	avrf_flash_bank_t *avrf_info = bank->driver_priv;
+	avr_common_t *avr = target->arch_info;
+	avrf_type_t *avr_info;
+	int i;
+	u32 device_id;
+	
+	if (bank->target->state != TARGET_HALTED)
+	{
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+
+	avrf_info->probed = 0;
+	
+	avr_jtag_read_jtagid(avr, &device_id);
+	if (ERROR_OK != mcu_execute_queue())
+	{
+		return ERROR_FAIL;
+	}
+	
+	LOG_INFO( "device id = 0x%08x", device_id );
+	if (EXTRACT_MFG(device_id) != 0x1F)
+	{
+		LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
+	}
+	
+	for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
+	{
+		if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
+		{
+			avr_info = &avft_chips_info[i];
+			LOG_INFO("target device is %s", avr_info->name);
+			break;
+		}
+	}
+	
+	if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
+	{
+		// chip found
+		bank->base = 0x00000000;
+		bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
+		bank->num_sectors = avr_info->flash_page_num;
+		bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);
+		
+		for (i = 0; i < avr_info->flash_page_num; i++)
+		{
+			bank->sectors[i].offset = i * avr_info->flash_page_size;
+			bank->sectors[i].size = avr_info->flash_page_size;
+			bank->sectors[i].is_erased = -1;
+			bank->sectors[i].is_protected = 1;
+		}
+		
+		avrf_info->probed = 1;
+		return ERROR_OK;
+	}
+	else
+	{
+		// chip not supported
+		LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));
+		
+		avrf_info->probed = 1;
+		return ERROR_FAIL;
+	}
+}
+
+static int avrf_auto_probe(struct flash_bank_s *bank)
+{
+	avrf_flash_bank_t *avrf_info = bank->driver_priv;
+	if (avrf_info->probed)
+		return ERROR_OK;
+	return avrf_probe(bank);
+}
+
+static int avrf_protect_check(struct flash_bank_s *bank)
+{
+	LOG_INFO(__FUNCTION__);
+	return ERROR_OK;
+}
+
+static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
+{
+	target_t *target = bank->target;
+	avr_common_t *avr = target->arch_info;
+	avrf_type_t *avr_info;
+	int i;
+	u32 device_id;
+	
+	if (bank->target->state != TARGET_HALTED)
+	{
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+	
+	avr_jtag_read_jtagid(avr, &device_id);
+	if (ERROR_OK != mcu_execute_queue())
+	{
+		return ERROR_FAIL;
+	}
+	
+	LOG_INFO( "device id = 0x%08x", device_id );
+	if (EXTRACT_MFG(device_id) != 0x1F)
+	{
+		LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
+	}
+	
+	for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
+	{
+		if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
+		{
+			avr_info = &avft_chips_info[i];
+			LOG_INFO("target device is %s", avr_info->name);
+			
+			return ERROR_OK;
+		}
+	}
+	
+	if (i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])))
+	{
+		// chip found
+		snprintf(buf, buf_size, "%s - Rev: 0x%X", avr_info->name, EXTRACT_VER(device_id));
+		return ERROR_OK;
+	}
+	else
+	{
+		// chip not supported
+		snprintf(buf, buf_size, "Cannot identify target as a avr\n");
+		return ERROR_FLASH_OPERATION_FAILED;
+	}
+}
+
+static int avrf_mass_erase(struct flash_bank_s *bank)
+{
+	target_t *target = bank->target;
+	avr_common_t *avr = target->arch_info;
+	
+	if (target->state != TARGET_HALTED)
+	{
+		LOG_ERROR("Target not halted");
+		return ERROR_TARGET_NOT_HALTED;
+	}
+	
+	if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
+		|| (ERROR_OK != avr_jtagprg_chiperase(avr))
+		|| (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
+	{
+		return ERROR_FAIL;
+	}
+	
+	return ERROR_OK;
+}
+
+static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+{
+	flash_bank_t *bank;
+	int i;
+	
+	if (argc < 1)
+	{
+		command_print(cmd_ctx, "avr mass_erase <bank>");
+		return ERROR_OK;	
+	}
+	
+	bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
+	if (!bank)
+	{
+		command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
+		return ERROR_OK;
+	}
+	
+	if (avrf_mass_erase(bank) == ERROR_OK)
+	{
+		/* set all sectors as erased */
+		for (i = 0; i < bank->num_sectors; i++)
+		{
+			bank->sectors[i].is_erased = 1;
+		}
+		
+		command_print(cmd_ctx, "avr mass erase complete");
+	}
+	else
+	{
+		command_print(cmd_ctx, "avr mass erase failed");
+	}
+	
+	LOG_DEBUG(__FUNCTION__);
+	return ERROR_OK;
+}

src/flash/avrf.h

+/***************************************************************************
+ *   Copyright (C) 2009 by Simon Qian                                      *
+ *   SimonQian@SimonQian.com                                               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifndef AVRF_H
+#define AVRF_H
+
+typedef struct avrf_type_s
+{
+	char name[15];
+	u16 chip_id;
+	int flash_page_size;
+	int flash_page_num;
+	int eeprom_page_size;
+	int eeprom_page_num;
+} avrf_type_t;
+
+typedef struct avrf_flash_bank_s
+{
+	int ppage_size;
+	int probed;
+} avrf_flash_bank_t;
+
+#endif /* AVRF_H */

src/flash/flash.c

@@ -77,6 +77,7 @@ extern flash_driver_t ecosflash_flash;
 extern flash_driver_t lpc288x_flash;
 extern flash_driver_t ocl_flash;
 extern flash_driver_t pic32mx_flash;
+extern flash_driver_t avr_flash;
 
 flash_driver_t *flash_drivers[] = {
 	&lpc2000_flash,
@@ -94,6 +95,7 @@ flash_driver_t *flash_drivers[] = {
 	&lpc288x_flash,
 	&ocl_flash,
 	&pic32mx_flash,
+	&avr_flash,
 	NULL,
 };
 

src/target/Makefile.am

@@ -13,11 +13,11 @@ libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c
 	arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
 	arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c arm_adi_v5.c \
 	etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c arm11.c arm11_dbgtap.c mips32.c mips_m4k.c \
-	mips32_pracc.c mips32_dmaacc.c mips_ejtag.c
+	mips32_pracc.c mips32_dmaacc.c mips_ejtag.c avrt.c
 noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
 	arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
 	arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h arm_adi_v5.h \
-	etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h
+	etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h avrt.h
 
 nobase_dist_pkglib_DATA =
 nobase_dist_pkglib_DATA += xscale/debug_handler.bin 

src/target/avrt.c

+/***************************************************************************
+ *   Copyright (C) 2009 by Simon Qian                                      *
+ *   SimonQian@SimonQian.com                                               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "replacements.h"
+
+#include "avrt.h"
+
+#include "register.h"
+#include "target.h"
+#include "log.h"
+#include "jtag.h"
+#include "binarybuffer.h"
+#include "time_support.h"
+#include "breakpoints.h"
+#include "fileio.h"
+