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Commit e43979e7 authored by zwelch's avatar zwelch
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- Replace 'if(' with 'if ('. 


git-svn-id: svn://svn.berlios.de/openocd/trunk@2357 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 8591335b
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src/flash/at91sam7.c
View file @ e43979e7
......@@ -890,7 +890,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
at91sam7_read_clock_info(bank);
at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
if(erase_all)
if (erase_all)
{
if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK)
{
......@@ -1027,7 +1027,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o
/* Write one block to the PageWriteBuffer */
buffer_pos = (pagen-first_page)*dst_min_alignment;
wcount = CEIL(count,4);
if((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
if ((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
{
return retval;
}
......
src/flash/cfi.c
View file @ e43979e7
This diff is collapsed.
src/flash/ecos.c
View file @ e43979e7
......@@ -139,7 +139,7 @@ static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char
}
info = malloc(sizeof(ecosflash_flash_bank_t));
if(info == NULL)
if (info == NULL)
{
LOG_ERROR("no memory for flash bank info");
exit(-1);
......
src/flash/flash.c
View file @ e43979e7
......@@ -748,7 +748,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
pattern = strtoul(args[1], NULL, 0);
count = strtoul(args[2], NULL, 0);
if(count == 0)
if (count == 0)
return ERROR_OK;
switch(cmd[4])
......@@ -796,7 +796,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
cur_size = MIN( (count*wordsize - wrote), sizeof(chunk) );
flash_bank_t *bank;
bank = get_flash_bank_by_addr(target, address);
if(bank == NULL)
if (bank == NULL)
{
return ERROR_FAIL;
}
......@@ -826,7 +826,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
return retval;
}
if(err == ERROR_OK)
if (err == ERROR_OK)
{
float speed;
speed=wrote / 1024.0;
......@@ -994,7 +994,7 @@ int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
}
}
if( first == -1 || last == -1 )
if ( first == -1 || last == -1 )
return ERROR_OK;
return flash_driver_erase(c, first, last);
......
src/flash/lpc2000.c
View file @ e43979e7
......@@ -258,7 +258,7 @@ static int lpc2000_iap_call(flash_bank_t *bank, int code, uint32_t param_table[5
/* write IAP code to working area */
target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12));
target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0));
if((retval = target_write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
if ((retval = target_write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
{
return retval;
}
......
src/flash/lpc288x.c
View file @ e43979e7
......@@ -129,7 +129,7 @@ static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
target_read_u32(target, F_STAT, &status);
}while (((status & FS_DONE) == 0) && timeout);
if(timeout == 0)
if (timeout == 0)
{
LOG_DEBUG("Timedout!");
return ERROR_FLASH_OPERATION_FAILED;
......
src/flash/mflash.c
View file @ e43979e7
......@@ -298,7 +298,7 @@ static int mg_dsk_srst(uint8_t on)
if ((ret = target_read_u8(target, mg_task_reg + MG_REG_DRV_CTRL, &value)) != ERROR_OK)
return ret;
if(on) {
if (on) {
value |= (mg_io_rbit_devc_srst);
} else {
value &= ~mg_io_rbit_devc_srst;
......@@ -892,7 +892,7 @@ static int mg_pll_get_NO(unsigned char output_div)
int i, NO;
for (i = 0, NO = 1; i < 2; ++i, output_div >>= 1)
if(output_div & 1)
if (output_div & 1)
NO = NO << 1;
return NO;
......
src/flash/pic32mx.c
View file @ e43979e7
......@@ -151,7 +151,7 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
LOG_DEBUG("status: 0x%" PRIx32, status );
alive_sleep(1);
}
if(timeout <= 0)
if (timeout <= 0)
LOG_DEBUG("timeout: status: 0x%" PRIx32, status );
return status;
......@@ -194,11 +194,11 @@ static int pic32mx_protect_check(struct flash_bank_s *bank)
}
target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
if((devcfg0 & (1<<28)) == 0) /* code protect bit */
if ((devcfg0 & (1<<28)) == 0) /* code protect bit */
num_pages = 0xffff; /* All pages protected */
else if(bank->base == PIC32MX_KSEG1_BOOT_FLASH)
else if (bank->base == PIC32MX_KSEG1_BOOT_FLASH)
{
if(devcfg0 & (1<<24))
if (devcfg0 & (1<<24))
num_pages = 0; /* All pages unprotected */
else
num_pages = 0xffff; /* All pages protected */
......@@ -229,25 +229,25 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
{
LOG_DEBUG("Erasing entire program flash");
status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
return ERROR_OK;
}
for (i = first; i <= last; i++)
{
if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(bank->base + bank->sectors[i].offset));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(bank->base + bank->sectors[i].offset));
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
......@@ -313,7 +313,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -327,7 +327,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -434,12 +434,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
}
#endif
status = pic32mx_write_row(bank, address, source->address);
if( status & NVMCON_NVMERR ) {
if ( status & NVMCON_NVMERR ) {
LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if( status & NVMCON_LVDERR ) {
if ( status & NVMCON_LVDERR ) {
LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
......@@ -458,12 +458,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
memcpy(&value, buffer, sizeof(uint32_t));
uint32_t status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR ) {
if ( status & NVMCON_NVMERR ) {
LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if( status & NVMCON_LVDERR ) {
if ( status & NVMCON_LVDERR ) {
LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
......@@ -481,7 +481,7 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3
{
target_t *target = bank->target;
if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
......@@ -499,11 +499,11 @@ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
if(address >= PIC32MX_KSEG1_PGM_FLASH)
if (address >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
if(srcaddr >= PIC32MX_KSEG1_RAM)
if (srcaddr >= PIC32MX_KSEG1_RAM)
target_write_u32(target, PIC32MX_NVMSRCADDR, KS1Virt2Phys(srcaddr));
else
target_write_u32(target, PIC32MX_NVMSRCADDR, KS0Virt2Phys(srcaddr));
......@@ -564,9 +564,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
bytes_written += 4;
......@@ -580,9 +580,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, bytes_remaining);
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
}
......@@ -609,23 +609,23 @@ static int pic32mx_probe(struct flash_bank_s *bank)
(unsigned)((device_id>>12)&0xff),
(unsigned)((device_id>>20)&0xfff) );
if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
page_size = 4096;
if(bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) {
if (bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) {
/* 0xBFC00000: Boot flash size fixed at 12k */
num_pages = 12;
} else {
/* 0xBD000000: Program flash size varies with device */
for(i=0; pic32mx_devs[i].name != NULL; i++)
if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
num_pages = pic32mx_devs[i].pfm_size;
break;
}
if(pic32mx_devs[i].name == NULL) {
if (pic32mx_devs[i].name == NULL) {
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
......@@ -651,8 +651,8 @@ static int pic32mx_probe(struct flash_bank_s *bank)
/* calculate numbers of pages */
num_pages /= (page_size / 1024);
if(bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH;
if(bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH;
if (bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH;
if (bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH;
bank->size = (num_pages * page_size);
bank->num_sectors = num_pages;
bank->chip_width = 4;
......@@ -697,7 +697,7 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
device_id = ejtag_info->idcode;
if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
snprintf(buf, buf_size,
"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
(unsigned)((device_id>>1)&0x7ff),
......@@ -705,11 +705,11 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
return ERROR_FLASH_OPERATION_FAILED;
}
for(i=0; pic32mx_devs[i].name != NULL; i++)
if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
break;
}
if(pic32mx_devs[i].name == NULL) {
if (pic32mx_devs[i].name == NULL) {
snprintf(buf, buf_size, "Cannot identify target as a PIC32MX family\n");
return ERROR_FLASH_OPERATION_FAILED;
}
......@@ -847,13 +847,13 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank)
target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("pic32mx device protected");
return ERROR_OK;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("pic32mx device programming failed");
return ERROR_OK;
......@@ -931,9 +931,9 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch
res = ERROR_OK;
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
res = ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)
......
src/flash/stellaris.c
View file @ e43979e7
......@@ -468,7 +468,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
did0, did1, stellaris_info->dc0, stellaris_info->dc1);
ver = did0 >> 28;
if((ver != 0) && (ver != 1))
if ((ver != 0) && (ver != 1))
{
LOG_WARNING("Unknown did0 version, cannot identify target");
return ERROR_FLASH_OPERATION_FAILED;
......@@ -482,7 +482,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
ver = did1 >> 28;
fam = (did1 >> 24) & 0xF;
if(((ver != 0) && (ver != 1)) || (fam != 0))
if (((ver != 0) && (ver != 1)) || (fam != 0))
{
LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
}
......@@ -614,7 +614,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
/* Check acess violations */
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
if (flash_cris & (AMASK))
{
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "", banknr, flash_cris);
target_write_u32(target, FLASH_CRIS, 0);
......@@ -691,7 +691,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
/* Check acess violations */
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
if (flash_cris & (AMASK))
{
LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
target_write_u32(target, FLASH_CRIS, 0);
......
src/flash/stm32x.c
View file @ e43979e7
......@@ -182,9 +182,9 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* clear readout protection and complementary option bytes
......@@ -218,9 +218,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 1 */
......@@ -228,9 +228,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 2 */
......@@ -238,9 +238,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 3 */
......@@ -248,9 +248,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 4 */
......@@ -258,9 +258,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write readout protection bit */
......@@ -268,9 +268,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
......@@ -338,7 +338,7 @@ static int stm32x_protect_check(struct flash_bank_s *bank)
{
set = 1;
if( protection & (1 << i))
if ( protection & (1 << i))
set = 0;
for (s = 0; s < stm32x_info->ppage_size; s++)
......@@ -378,9 +378,9 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
......@@ -445,7 +445,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -459,7 +459,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -658,12 +658,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
......@@ -684,12 +684,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
......@@ -1188,13 +1188,13 @@ static int stm32x_mass_erase(struct flash_bank_s *bank)
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("stm32x device protected");
return ERROR_OK;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("stm32x device programming failed");
return ERROR_OK;
......
src/flash/str9x.c
View file @ e43979e7
......@@ -305,7 +305,7 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last)
{
return retval;
}
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}
......@@ -327,7 +327,7 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last)
return retval;
}
if( status & 0x22 )
if ( status & 0x22 )
{
LOG_ERROR("error erasing flash bank, status: 0x%x", status);
return ERROR_FLASH_OPERATION_FAILED;
......@@ -365,7 +365,7 @@ static int str9x_protect(struct flash_bank_s *bank,
adr = bank->base + bank->sectors[i].offset;
target_write_u16(target, adr, 0x60);
if( set )
if ( set )
target_write_u16(target, adr, 0x01);
else
target_write_u16(target, adr, 0xD0);
......@@ -578,7 +578,7 @@ static int str9x_write(struct flash_bank_s *bank,
for (timeout=0; timeout<1000; timeout++)
{
target_read_u8(target, bank_adr, &status);
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}
......@@ -627,7 +627,7 @@ static int str9x_write(struct flash_bank_s *bank,
for (timeout=0; timeout<1000; timeout++)
{
target_read_u8(target, bank_adr, &status);
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}
......
src/flash/str9xpec.c
View file @ e43979e7
......@@ -101,7 +101,7 @@ static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
int str9xpec_set_instr(jtag_tap_t *tap, uint32_t new_instr, tap_state_t end_state)
{
if( tap == NULL ){
if ( tap == NULL ){
return ERROR_TARGET_INVALID;
}
......@@ -575,7 +575,7 @@ static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int l
/* last bank: 0xFF signals a full device protect */
if (last == 0xFF)
{
if( set )
if ( set )
{
status = str9xpec_lock_device(bank);
}
......@@ -589,7 +589,7 @@ static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int l
{
for (i = first; i <= last; i++)
{
if( set )
if ( set )
buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
else
buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
......
src/helper/command.c
View file @ e43979e7
......@@ -348,7 +348,7 @@ int unregister_command(command_context_t *context, char *name)
void command_output_text(command_context_t *context, const char *data)
{
if( context && context->output_handler && data ){
if ( context && context->output_handler && data ){
context->output_handler( context, data );
}
}
......
src/helper/fileio.c
View file @ e43979e7
......@@ -182,7 +182,7 @@ int fileio_read_u32(fileio_t *fileio, uint32_t *data)
static inline int fileio_local_fgets(fileio_t *fileio, uint32_t size, char *buffer)
{
if( fgets(buffer, size, fileio->file) == NULL)
if ( fgets(buffer, size, fileio->file) == NULL)
return ERROR_FILEIO_OPERATION_FAILED;
return ERROR_OK;