Commit e2b6de3d authored by oharboe's avatar oharboe
Browse files

retired reset run_and_init/halt

git-svn-id: svn://svn.berlios.de/openocd/trunk@877 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 9244c600
...@@ -540,11 +540,6 @@ Event is one of the following: ...@@ -540,11 +540,6 @@ Event is one of the following:
@option{pre_resume} or @option{gdb_program_config}. @option{pre_resume} or @option{gdb_program_config}.
@option{post_reset} and @option{reset} will produce the same results. @option{post_reset} and @option{reset} will produce the same results.
@item @b{run_and_halt_time} <@var{target#}> <@var{time_in_ms}>
@cindex run_and_halt_time
The amount of time the debugger should wait after releasing reset before it asserts
a debug request. This is used by the @option{run_and_halt} and @option{run_and_init}
reset modes.
@item @b{working_area} <@var{target#}> <@var{address}> <@var{size}> @item @b{working_area} <@var{target#}> <@var{address}> <@var{size}>
<@var{backup}|@var{nobackup}> <@var{backup}|@var{nobackup}>
@cindex working_area @cindex working_area
...@@ -795,8 +790,7 @@ OpenOCD will wait 5 seconds for the target to resume. ...@@ -795,8 +790,7 @@ OpenOCD will wait 5 seconds for the target to resume.
@cindex step @cindex step
Single-step the target at its current code position, or at an optional address. Single-step the target at its current code position, or at an optional address.
@item @b{reset} [@option{run}|@option{halt}|@option{init}|@option{run_and_halt} @item @b{reset} [@option{run}|@option{halt}|@option{init}]
|@option{run_and_init}]
@cindex reset @cindex reset
Perform a hard-reset. The optional parameter specifies what should happen after the reset. Perform a hard-reset. The optional parameter specifies what should happen after the reset.
...@@ -812,15 +806,7 @@ Immediately halt the target (works only with certain configurations). ...@@ -812,15 +806,7 @@ Immediately halt the target (works only with certain configurations).
@cindex reset init @cindex reset init
Immediately halt the target, and execute the reset script (works only with certain Immediately halt the target, and execute the reset script (works only with certain
configurations) configurations)
@item @b{run_and_halt}
@cindex reset run_and_halt
Let the target run for a certain amount of time, then request a halt.
@item @b{run_and_init}
@cindex reset run_and_init
Let the target run for a certain amount of time, then request a halt. Execute the
reset script once the target enters debug mode.
@end itemize @end itemize
The runtime can be set using the @option{run_and_halt_time} command.
@end itemize @end itemize
@subsection Memory access commands @subsection Memory access commands
......
This diff is collapsed.
...@@ -62,8 +62,6 @@ enum target_reset_mode ...@@ -62,8 +62,6 @@ enum target_reset_mode
RESET_RUN = 0, /* reset and let target run */ RESET_RUN = 0, /* reset and let target run */
RESET_HALT = 1, /* reset and halt target out of reset */ RESET_HALT = 1, /* reset and halt target out of reset */
RESET_INIT = 2, /* reset and halt target out of reset, then run init script */ RESET_INIT = 2, /* reset and halt target out of reset, then run init script */
RESET_RUN_AND_HALT = 3, /* reset and let target run, halt after n milliseconds */
RESET_RUN_AND_INIT = 4, /* reset and let target run, halt after n milliseconds, then run init script */
}; };
enum target_debug_reason enum target_debug_reason
...@@ -202,7 +200,6 @@ typedef struct target_s ...@@ -202,7 +200,6 @@ typedef struct target_s
{ {
target_type_t *type; /* target type definition (name, access functions) */ target_type_t *type; /* target type definition (name, access functions) */
int reset_halt; /* attempt resetting the CPU into the halted mode? */ int reset_halt; /* attempt resetting the CPU into the halted mode? */
int run_and_halt_time; /* how long the target should run after a run_and_halt reset */
u32 working_area; /* working area (initialized RAM). Evaluated u32 working_area; /* working area (initialized RAM). Evaluated
upon first allocation from virtual/physical address. */ upon first allocation from virtual/physical address. */
u32 working_area_virt; /* virtual address */ u32 working_area_virt; /* virtual address */
......
...@@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe ...@@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/at91r40008_reset.script target_script 0 reset event/at91r40008_reset.script
......
...@@ -18,7 +18,7 @@ jtag_ntrst_delay 0 ...@@ -18,7 +18,7 @@ jtag_ntrst_delay 0
target arm926ejs little 0 arm926ejs target arm926ejs little 0 arm926ejs
target_script 0 reset event/at91sam9260_reset.script target_script 0 reset event/at91sam9260_reset.script
run_and_halt_time 0 30
#working area <target#> <address> <size> <backup|nobackup> #working area <target#> <address> <size> <backup|nobackup>
working_area 0 0x00300000 0x1000 backup working_area 0 0x00300000 0x1000 backup
......
...@@ -16,5 +16,5 @@ jtag_ntrst_delay 200 ...@@ -16,5 +16,5 @@ jtag_ntrst_delay 200
#target <type> <endianess> <reset mode> <JTAG pos> <variant> #target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little 0 arm926ejs target arm926ejs little 0 arm926ejs
run_and_halt_time 0 30
...@@ -6,7 +6,7 @@ reset_config srst_only srst_pulls_trst ...@@ -6,7 +6,7 @@ reset_config srst_only srst_pulls_trst
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/eir-sam7se512_reset.script target_script 0 reset event/eir-sam7se512_reset.script
......
...@@ -18,7 +18,7 @@ arm7_9 dcc_downloads enable ...@@ -18,7 +18,7 @@ arm7_9 dcc_downloads enable
target_script 0 reset event/hammer_reset.script target_script 0 reset event/hammer_reset.script
working_area 0 0x30800000 0x20000 nobackup working_area 0 0x30800000 0x20000 nobackup
run_and_halt_time 0 1000
#flash configuration #flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...] #flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
......
...@@ -6,4 +6,4 @@ reset_config srst_only srst_pulls_trst ...@@ -6,4 +6,4 @@ reset_config srst_only srst_pulls_trst
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e jtag_device 7 0x1 0x7f 0x7e
target xscale big 0 IXP42x target xscale big 0 IXP42x
run_and_halt_time 0 30
...@@ -5,7 +5,7 @@ reset_config trst_and_srst srst_pulls_trst ...@@ -5,7 +5,7 @@ reset_config trst_and_srst srst_pulls_trst
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi-s_r4 target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width> #flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
...@@ -16,7 +16,7 @@ jtag_device 4 0x1 0xf 0xe ...@@ -16,7 +16,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi-s_r4 target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
target_script 0 reset event/lpc2148_reset.script target_script 0 reset event/lpc2148_reset.script
......
...@@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe ...@@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi-s_r4 target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup working_area 0 0x40000000 0x4000 nobackup
......
...@@ -12,5 +12,5 @@ jtag_device 5 0x1 0x0 0x1e ...@@ -12,5 +12,5 @@ jtag_device 5 0x1 0x0 0x1e
#target <type> <endianess> <reset mode> #target <type> <endianess> <reset mode>
target arm11 little 1 target arm11 little 1
run_and_halt_time 0 0
...@@ -7,4 +7,4 @@ jtag_device 4 0x1 0xf 0xe ...@@ -7,4 +7,4 @@ jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100 jtag_nsrst_delay 100
jtag_ntrst_delay 100 jtag_ntrst_delay 100
target arm926ejs little 0 arm926ejs target arm926ejs little 0 arm926ejs
run_and_halt_time 0 500
...@@ -7,7 +7,7 @@ jtag_device 7 0x1 0x7f 0x7e ...@@ -7,7 +7,7 @@ jtag_device 7 0x1 0x7f 0x7e
# target configuration # target configuration
target xscale big 0 ixp42x target xscale big 0 ixp42x
run_and_halt_time 0 30
# maps to PXA internal RAM. If you are using a PXA255 # maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off # you must initialize SDRAM or leave this option off
......
...@@ -12,7 +12,7 @@ jtag_device 8 0x0 0x0 0x0 ...@@ -12,7 +12,7 @@ jtag_device 8 0x0 0x0 0x0
target arm926ejs little 1 arm926ejs target arm926ejs little 1 arm926ejs
target_script 0 reset event/omap5912_reset.script target_script 0 reset event/omap5912_reset.script
run_and_halt_time 0 30
# omap5912 lcd frame buffer as working area # omap5912 lcd frame buffer as working area
working_area 0 0x20000000 0x3e800 nobackup working_area 0 0x20000000 0x3e800 nobackup
......
...@@ -11,7 +11,7 @@ jtag_device 5 0x1 0x1 0x1e ...@@ -11,7 +11,7 @@ jtag_device 5 0x1 0x1 0x1e
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target mips_m4k little 0 target mips_m4k little 0
run_and_halt_time 0 30
working_area 0 0xa0000000 16384 nobackup working_area 0 0xa0000000 16384 nobackup
......
...@@ -3,7 +3,7 @@ jtag_nsrst_delay 200 ...@@ -3,7 +3,7 @@ jtag_nsrst_delay 200
jtag_ntrst_delay 200 jtag_ntrst_delay 200
target xscale little 0 pxa255 target xscale little 0 pxa255
reset_config trst_and_srst reset_config trst_and_srst
run_and_halt_time 0 30
target_script 0 reset event/pxa255_reset.script target_script 0 reset event/pxa255_reset.script
......
...@@ -14,7 +14,7 @@ target xscale little 0 pxa27x ...@@ -14,7 +14,7 @@ target xscale little 0 pxa27x
# maps to PXA internal RAM. If you are using a PXA255 # maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off # you must initialize SDRAM or leave this option off
working_area 0 0x5c000000 0x10000 nobackup working_area 0 0x5c000000 0x10000 nobackup
run_and_halt_time 0 30
#flash bank <driver> <base> <size> <chip_width> <bus_width> #flash bank <driver> <base> <size> <chip_width> <bus_width>
# works for P30 flash # works for P30 flash
flash bank cfi 0x00000000 0x1000000 2 4 0 flash bank cfi 0x00000000 0x1000000 2 4 0
...@@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe ...@@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode> #target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant> #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/sam7s256_reset.script target_script 0 reset event/sam7s256_reset.script
......
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