Commit dfbb9f3e authored by oharboe's avatar oharboe
Browse files

- jtag_khz/speed are now single parameter only. These are used
from pre/post_reset event scripts. Adding the second parameter was
a mistake seen in retrospect. this gives precise control in post_reset
for *when* the post reset speed is set. The pre_reset event was
added *after* the second parameter to jtag_khz/speed
- the target implementations no longer gets involved in the reset mode
scheme. Either they reset a target into a halted mode or not.
target_process_reset()
detects if the reset halt failed or not.
- tcl target event names are now target_N_name.  Mainly internal
at this early stage, but best to get the naming right now.
- added hardcoded reset modes from gdb_server.c. I don't know precisely what
these defaults should be or if it should be made configurable. Perhaps some
hardcoded defaults will do for now and it can be made configurable later.
- bugfix in cortex_m3.c for reset_run_and_xxx?
- issue syntax error upon obsolete argument in target command instead of
printing message that will surely drown in the log

git-svn-id: svn://svn.berlios.de/openocd/trunk@849 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent c1ee650a
......@@ -346,6 +346,7 @@ int run_command(command_context_t *context, command_t *c, char *words[], int num
if (!((context->mode == COMMAND_CONFIG) || (c->mode == COMMAND_ANY) || (c->mode == context->mode) ))
{
/* Config commands can not run after the config stage */
LOG_ERROR("Illegal mode for command");
return ERROR_FAIL;
}
......
......@@ -93,20 +93,6 @@ proc help {args} {
add_help_text help "Tcl implementation of help command"
#a bit of backwards compatibility
proc ocd_throw {cmd} {
set ocd_output ""
eval $cmd
return $ocd_output
}
#a bit of backwards compatibility
proc openocd {cmd} {
set ocd_output ""
eval $cmd
return $ocd_output
}
# If a fn is unknown to Tcl, we try to execute it as an OpenOCD command
#
# We also support two level commands. "flash banks" is translated to
......@@ -130,10 +116,13 @@ proc target_script {target_num eventname scriptname} {
}
# This is the script we invoke
proc "target_[set eventname]_[set target_num]" {} "script $scriptname"
proc "target_[set target_num]_[set eventname]" {} "script $scriptname"
}
add_help_text target_script "<target#> <event=reset/pre_reset/post_halt/pre_resume/gdb_program_config> <script_file>"
# Try flipping / and \ to find file if the filename does not
# match the precise spelling
proc find {filename} {
......@@ -162,5 +151,4 @@ proc script {filename} {
add_help_text script "<filename> - filename of OpenOCD script (tcl) to run"
add_help_text target_script "<target#> <event=reset/pre_reset/post_halt/pre_resume/gdb_program_config> <script_file>"
......@@ -140,7 +140,7 @@ int jtag_ntrst_delay = 0; /* default to no nTRST delay */
jtag_event_callback_t *jtag_event_callbacks;
/* speed in kHz*/
static int speed1 = 0, speed2 = 0;
static int speed_khz = 0;
/* flag if the kHz speed was defined */
static int hasKHz = 0;
......@@ -240,7 +240,7 @@ jtag_interface_t *jtag = NULL;
/* configuration */
jtag_interface_t *jtag_interface = NULL;
int jtag_speed = 0;
int jtag_speed_post_reset = 0;
/* forward declarations */
......@@ -1467,7 +1467,7 @@ int jtag_register_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, NULL, "interface", handle_interface_command,
COMMAND_CONFIG, NULL);
register_command(cmd_ctx, NULL, "jtag_speed", handle_jtag_speed_command,
COMMAND_ANY, "set jtag speed (if supported) <reset speed> [<post reset speed, default value is reset speed>]");
COMMAND_ANY, "set jtag speed (if supported)");
register_command(cmd_ctx, NULL, "jtag_khz", handle_jtag_khz_command,
COMMAND_ANY, "same as jtag_speed, except it takes maximum khz as arguments. 0 KHz = RTCK.");
register_command(cmd_ctx, NULL, "jtag_device", handle_jtag_device_command,
......@@ -1510,9 +1510,7 @@ int jtag_interface_init(struct command_context_s *cmd_ctx)
}
if(hasKHz)
{
/*stay on "reset speed"*/
jtag_interface->khz(speed1, &jtag_speed);
jtag_interface->khz(speed2, &jtag_speed_post_reset);
jtag_interface->khz(speed_khz, &jtag_speed);
hasKHz = 0;
}
......@@ -1849,79 +1847,67 @@ int handle_jtag_ntrst_delay_command(struct command_context_s *cmd_ctx, char *cmd
int handle_jtag_speed_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int cur_speed = 0;
int retval=ERROR_OK;
if (argc != 0)
if (argc == 1)
{
if ((argc<1) || (argc>2))
return ERROR_COMMAND_SYNTAX_ERROR;
LOG_DEBUG("handle jtag speed");
if (argc >= 1)
cur_speed = jtag_speed = jtag_speed_post_reset = strtoul(args[0], NULL, 0);
if (argc == 2)
cur_speed = jtag_speed_post_reset = strtoul(args[1], NULL, 0);
int cur_speed = 0;
cur_speed = jtag_speed = strtoul(args[0], NULL, 0);
/* this command can be called during CONFIG,
* in which case jtag isn't initialized */
if (jtag)
{
jtag->speed_div(jtag_speed, &speed1);
jtag->speed_div(jtag_speed_post_reset, &speed2);
jtag->speed(cur_speed);
retval=jtag->speed(cur_speed);
}
}
command_print(cmd_ctx, "jtag_speed: %d, %d", jtag_speed, jtag_speed_post_reset);
} else if (argc == 0)
{
} else
{
retval=ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(cmd_ctx, "jtag_speed: %d", jtag_speed);
return ERROR_OK;
return retval;
}
int handle_jtag_khz_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
int retval=ERROR_OK;
LOG_DEBUG("handle jtag khz");
if (argc>2)
return ERROR_COMMAND_SYNTAX_ERROR;
if(argc != 0)
if(argc == 1)
{
if (argc >= 1)
speed1 = speed2 = strtoul(args[0], NULL, 0);
if (argc == 2)
speed2 = strtoul(args[1], NULL, 0);
speed_khz = strtoul(args[0], NULL, 0);
if (jtag != NULL)
{
int cur_speed = 0;
LOG_DEBUG("have interface set up");
int speed_div1, speed_div2;
if (jtag->khz(speed1, &speed_div1)!=ERROR_OK)
int speed_div1;
if ((retval=jtag->khz(speed_khz, &speed_div1))!=ERROR_OK)
{
speed1 = speed2 = 0;
return ERROR_OK;
}
if (jtag->khz(speed2, &speed_div2)!=ERROR_OK)
{
speed1 = speed2 = 0;
return ERROR_OK;
speed_khz = 0;
return retval;
}
if (argc >= 1)
cur_speed = jtag_speed = jtag_speed_post_reset = speed_div1;
if (argc == 2)
cur_speed = jtag_speed_post_reset = speed_div2;
cur_speed = jtag_speed = speed_div1;
jtag->speed(cur_speed);
retval=jtag->speed(cur_speed);
} else
{
hasKHz = 1;
}
} else if (argc==0)
{
} else
{
retval=ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(cmd_ctx, "jtag_khz: %d, %d", speed1, speed2);
return ERROR_OK;
command_print(cmd_ctx, "jtag_khz: %d", speed_khz);
return retval;
}
int handle_endstate_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
......
......@@ -1807,7 +1807,8 @@ int gdb_detach(connection_t *connection, target_t *target)
break;
case GDB_DETACH_RESET:
target_process_reset(connection->cmd_ctx);
/* FIX?? make this configurable?? */
target_process_reset(connection->cmd_ctx, RESET_HALT);
break;
case GDB_DETACH_HALT:
......@@ -1949,7 +1950,8 @@ int gdb_input_inner(connection_t *connection)
break;
case 'R':
/* handle extended restart packet */
target_process_reset(connection->cmd_ctx);
/* fix?? make this configurable? */
target_process_reset(connection->cmd_ctx, RESET_HALT);
break;
default:
/* ignore unkown packets */
......
......@@ -28,7 +28,7 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script
event/omap5912_reset.script interface/jtagkey-tiny.cfg interface/jtagkey.cfg interface/str9-comstick.cfg \
target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
target/str730.cfg target/stm32stick.cfg event/str912_reset.script event/str710_program.script \
target/str730.cfg target/stm32stick.cfg event/str710_program.script \
target/lm3s811.cfg interface/luminary.cfg interface/luminary-libftdi.cfg interface/luminary-lm3s811.cfg \
interface/stm32-stick.cfg interface/calao-usb-a9260-c01.cfg interface/calao-usb-a9260-c02.cfg \
interface/calao-usb-a9260.cfg target/at91sam9260minimal.cfg event/lpc2148_reset.script \
......
......@@ -704,7 +704,7 @@ int arm7_9_poll(target_t *target)
int check_pc=0;
if (target->state == TARGET_RESET)
{
if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
if (target->reset_halt)
{
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
{
......@@ -772,7 +772,7 @@ int arm7_9_assert_reset(target_t *target)
return ERROR_FAIL;
}
if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
if (target->reset_halt)
{
/*
* Some targets do not support communication while SRST is asserted. We need to
......
......@@ -691,7 +691,7 @@ int cortex_m3_assert_reset(target_t *target)
ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
if (target->reset_mode == RESET_RUN)
if (!target->reset_halt)
{
/* Set/Clear C_MASKINTS in a separate operation */
if (cortex_m3->dcb_dhcsr & C_MASKINTS)
......
......@@ -5,13 +5,19 @@
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
# disable watchdog
mww 0xfffffd44 0x00008000
# enable user reset
mww 0xfffffd08 0xa5000001
# CKGR_MOR : enable the main oscillator
mww 0xfffffc20 0x00000601
sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
# CKGR_PLLR: 96.1097 MHz
mww 0xfffffc2c 0x00481c0e
sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
mww 0xfffffc30 0x00000007
sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
# MC_FMR: flash mode (FWS=1,FMCN=60)
mww 0xffffff60 0x003c0100
sleep 100
......@@ -5,13 +5,19 @@
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
# disable watchdog
mww 0xfffffd44 0x00008000
# enable user reset
mww 0xfffffd08 0xa5000001
# CKGR_MOR : enable the main oscillator
mww 0xfffffc20 0x00000601
sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
# CKGR_PLLR: 96.1097 MHz
mww 0xfffffc2c 0x00481c0e
sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
mww 0xfffffc30 0x00000007
sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
# MC_FMR: flash mode (FWS=1,FMCN=60)
mww 0xffffff60 0x003c0100
sleep 100
# -- Enable 96K RAM */
mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled
str9x flash_config 0 4 2 0 0x80000
flash protect 0 0 7 off
......@@ -284,14 +284,12 @@ int target_resume(struct target_s *target, int current, u32 address, int handle_
return retval;
}
int target_process_reset(struct command_context_s *cmd_ctx)
int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode)
{
int retval = ERROR_OK;
target_t *target;
struct timeval timeout, now;
jtag->speed(jtag_speed);
target = targets;
while (target)
{
......@@ -318,30 +316,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
return retval;
keep_alive(); /* we might be running on a very slow JTAG clk */
/* prepare reset_halt where necessary */
target = targets;
while (target)
{
if (jtag_reset_config & RESET_SRST_PULLS_TRST)
{
switch (target->reset_mode)
{
case RESET_HALT:
command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_halt\"");
target->reset_mode = RESET_RUN_AND_HALT;
break;
case RESET_INIT:
command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_init\"");
target->reset_mode = RESET_RUN_AND_INIT;
break;
default:
break;
}
}
target = target->next;
}
target = targets;
while (target)
{
......@@ -349,6 +324,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
* have to drop working areas
*/
target_free_all_working_areas_restore(target, 0);
target->reset_halt=((reset_mode==RESET_HALT)||(reset_mode==RESET_INIT));
target->type->assert_reset(target);
target = target->next;
}
......@@ -362,7 +338,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
target = targets;
while (target)
{
switch (target->reset_mode)
switch (reset_mode)
{
case RESET_RUN:
/* nothing to do if target just wants to be run */
......@@ -377,10 +353,12 @@ int target_process_reset(struct command_context_s *cmd_ctx)
target_register_event_callback(target_init_handler, cmd_ctx);
break;
case RESET_HALT:
target_halt(target);
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
target_halt(target);
break;
case RESET_INIT:
target_halt(target);
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
target_halt(target);
target_register_event_callback(target_init_handler, cmd_ctx);
break;
default:
......@@ -399,6 +377,14 @@ int target_process_reset(struct command_context_s *cmd_ctx)
while (target)
{
target->type->deassert_reset(target);
/* We can fail to bring the target into the halted state */
target_poll(target);
if (target->reset_halt&&((target->state != TARGET_HALTED)))
{
LOG_WARNING("Failed to reset target into halted mode - issuing halt");
target->type->halt(target);
}
target = target->next;
}
......@@ -415,12 +401,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
return retval;
}
/* post reset scripts can be quite long, increase speed now. If post
* reset scripts needs a different speed, they can set the speed to
* whatever they need.
*/
jtag->speed(jtag_speed_post_reset);
LOG_DEBUG("Waiting for halted stated as approperiate");
/* Wait for reset to complete, maximum 5 seconds. */
......@@ -437,10 +417,10 @@ int target_process_reset(struct command_context_s *cmd_ctx)
{
LOG_DEBUG("Polling target");
target_poll(target);
if ((target->reset_mode == RESET_RUN_AND_INIT) ||
(target->reset_mode == RESET_RUN_AND_HALT) ||
(target->reset_mode == RESET_HALT) ||
(target->reset_mode == RESET_INIT))
if ((reset_mode == RESET_RUN_AND_INIT) ||
(reset_mode == RESET_RUN_AND_HALT) ||
(reset_mode == RESET_HALT) ||
(reset_mode == RESET_INIT))
{
if (target->state != TARGET_HALTED)
{
......@@ -477,7 +457,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
}
target_unregister_event_callback(target_init_handler, cmd_ctx);
return retval;
}
......@@ -1420,23 +1399,28 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
if (strcmp(args[2], "reset_halt") == 0)
{
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
LOG_WARNING("reset_mode argument is obsolete.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "reset_run") == 0)
{
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
LOG_WARNING("reset_mode argument is obsolete.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "reset_init") == 0)
{
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
LOG_WARNING("reset_mode argument is obsolete.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "run_and_halt") == 0)
{
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
LOG_WARNING("reset_mode argument is obsolete.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "run_and_init") == 0)
{
LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
LOG_WARNING("reset_mode argument is obsolete.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
else
{
......@@ -1492,9 +1476,9 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
int target_invoke_script(struct command_context_s *cmd_ctx, target_t *target, char *name)
{
return command_run_linef(cmd_ctx, " if {[catch {info body target_%s_%d} t]==0} {target_%s_%d}",
name, get_num_by_target(target),
name, get_num_by_target(target));
return command_run_linef(cmd_ctx, " if {[catch {info body target_%d_%s} t]==0} {target_%d_%s}",
get_num_by_target(target), name,
get_num_by_target(target), name);
}
int handle_run_and_halt_time_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
......@@ -1848,11 +1832,8 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
}
}
/* temporarily modify mode of current reset target */
target->reset_mode = reset_mode;
/* reset *all* targets */
target_process_reset(cmd_ctx);
target_process_reset(cmd_ctx, reset_mode);
return ERROR_OK;
}
......
......@@ -198,7 +198,7 @@ typedef struct target_type_s
typedef struct target_s
{
target_type_t *type; /* target type definition (name, access functions) */
enum target_reset_mode reset_mode; /* what to do after a reset */
int reset_halt; /* attempt resetting the CPU into the halted mode? */
int run_and_halt_time; /* how long the target should run after a run_and_halt reset */
u32 working_area; /* working area (initialized RAM). Evaluated
upon first allocation from virtual/physical address. */
......@@ -252,7 +252,7 @@ extern int target_register_user_commands(struct command_context_s *cmd_ctx);
extern int target_init(struct command_context_s *cmd_ctx);
extern int target_examine(struct command_context_s *cmd_ctx);
extern int handle_target(void *priv);
extern int target_process_reset(struct command_context_s *cmd_ctx);
extern int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode);
extern int target_register_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
extern int target_unregister_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
......
#start slow, speed up after reset
jtag_khz 10, 6000
jtag_khz 10
proc target_0_pre_reset {} {
jtag_khz 10
}
proc target_0_post_reset {} {
jtag_khz 6000
}
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
......@@ -15,6 +21,7 @@ run_and_halt_time 0 30
target_script 0 gdb_program_config event/str710_program.script
working_area 0 0x2000C000 0x4000 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
......
#STR730 CPU
jtag_khz 10, 3000
jtag_khz 3000
proc target_0_pre_reset {} {
jtag_khz 10
}
proc target_0_post_reset {} {
jtag_khz 3000
}
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
......
#STR750 CPU
# jtag speed
jtag_khz 10, 3000
jtag_khz 10
proc target_0_pre_reset {} {
jtag_khz 10
}
proc target_0_post_reset {} {
jtag_khz 3000
}
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
......@@ -15,9 +21,6 @@ jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
......
# script for str9
# jtag speed
jtag_khz 16 3000
# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_khz 16
proc target_0_pre_reset {} {
jtag_khz 16
}
proc target_0_post_reset {} {
# We can increase speed now that we know the target is halted.
jtag_khz 3000
# -- Enable 96K RAM
# PFQBC enabled / DTCM & AHB wait-states disabled
mww 0x5C002034 0x0191
str9x flash_config 0 4 2 0 0x80000
flash protect 0 0 7 off
}
jtag_nsrst_delay 100
jtag_ntrst_delay 100
......@@ -20,7 +39,6 @@ jtag_device 5 0x1 0x1 0x1e
target arm966e little 1 arm966e
run_and_halt_time 0 30
target_script 0 reset event/str912_reset.script
working_area 0 0x50000000 16384 nobackup
......
......@@ -17,9 +17,9 @@ jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi-s_r4
# at CPU CLK <32kHz this must be disabled
arm7 fast_memory_access enable
arm7_9 fast_memory_access enable