Commit dc575dc5 authored by zwelch's avatar zwelch
Browse files

Remove whitespace that occurs before ')'.

- Replace '[ \t]*[)]' with ')'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2377 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent f90d8fa4
......@@ -257,7 +257,7 @@ MTAB_ENTRY(romfs_mte1,
"/rom",
"romfs",
"",
(CYG_ADDRWORD) &filedata[0] );
(CYG_ADDRWORD) &filedata[0]);
#endif
void openocd_sleep_prelude(void)
......@@ -1156,7 +1156,7 @@ FSTAB_ENTRY(tftpfs_fste, "tftpfs", 0,
// "romfs", // FIlesystem type
// "", // hardware device
// (CYG_ADDRWORD) CYGNUM_FS_ROM_BASE_ADDRESS // Address in ROM
// );
//);
// -------------------------------------------------------------------------
......
......@@ -399,7 +399,7 @@ static int aduc702x_probe(struct flash_bank_s *bank)
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "aduc702x flash driver info" );
snprintf(buf, buf_size, "aduc702x flash driver info");
return ERROR_OK;
}
......
......@@ -187,7 +187,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
}
/* Prescaler adjust */
if ((((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0) )
if ((((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0))
{
at91sam7_info->mck_valid = 0;
at91sam7_info->mck_freq = 0;
......@@ -613,7 +613,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
at91sam7_protect_check(t_bank);
}
LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch );
LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch);
return ERROR_OK;
}
......
......@@ -323,7 +323,7 @@ static int avrf_probe(struct flash_bank_s *bank)
return ERROR_FAIL;
}
LOG_INFO("device id = 0x%08" PRIx32 "", device_id );
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
if (EXTRACT_MFG(device_id) != 0x1F)
{
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
......@@ -402,7 +402,7 @@ static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
return ERROR_FAIL;
}
LOG_INFO("device id = 0x%08" PRIx32 "", device_id );
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
if (EXTRACT_MFG(device_id) != 0x1F)
{
LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
......
......@@ -214,7 +214,7 @@ static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
uint8_t i;
for (i = 0;i < 2;i++)
target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1,
&data[i*bank->bus_width] );
&data[i*bank->bus_width]);
}
else
target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 2, data);
......@@ -236,7 +236,7 @@ static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
uint8_t i;
for (i = 0;i < 4;i++)
target_read_memory(target, flash_address(bank, sector, offset + i), bank->bus_width, 1,
&data[i*bank->bus_width] );
&data[i*bank->bus_width]);
}
else
target_read_memory(target, flash_address(bank, sector, offset), bank->bus_width, 4, data);
......@@ -1154,7 +1154,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
/* flash write code */
if (!cfi_info->write_algorithm)
{
if (target_code_size > sizeof(target_code) )
if (target_code_size > sizeof(target_code))
{
LOG_WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile.");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
......@@ -1206,7 +1206,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
busy_pattern_val = cfi_command_val(bank, 0x80);
error_pattern_val = cfi_command_val(bank, 0x7e);
LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size );
LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size);
/* Programming main loop */
while (count > 0)
......@@ -1227,7 +1227,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val);
buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val);
LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address );
LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address);
/* Execute algorithm, assume breakpoint for last instruction */
retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
......@@ -1883,7 +1883,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
write_p = address & ~(bank->bus_width - 1);
if ((align = address - write_p) != 0)
{
LOG_INFO("Fixup %d unaligned head bytes", align );
LOG_INFO("Fixup %d unaligned head bytes", align);
for (i = 0; i < bank->bus_width; i++)
current_word[i] = 0;
......@@ -2029,7 +2029,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
/* handle unaligned tail bytes */
if (count > 0)
{
LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count );
LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count);
copy_p = write_p;
for (i = 0; i < bank->bus_width; i++)
......
......@@ -675,7 +675,7 @@ static int davinci_nand_device_command(struct command_context_s *cmd_ctx,
if (aemif == 0x01e00000 /* dm6446, dm357 */
|| aemif == 0x01e10000 /* dm335, dm355 */
|| aemif == 0x01d10000 /* dm365 */
) {
) {
if (chip < 0x0200000 || chip >= 0x0a000000) {
LOG_ERROR("NAND address %08lx out of range?", chip);
goto fail;
......
......@@ -281,7 +281,7 @@ static int eCosBoard_erase(ecosflash_flash_bank_t *info, uint32_t address, uint3
0,
&flashErr,
timeout
);
);
if (retval != ERROR_OK)
return retval;
......
......@@ -793,7 +793,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
for (wrote = 0; wrote < (count*wordsize); wrote += cur_size)
{
cur_size = MIN((count*wordsize - wrote), sizeof(chunk) );
cur_size = MIN((count*wordsize - wrote), sizeof(chunk));
flash_bank_t *bank;
bank = get_flash_bank_by_addr(target, address);
if (bank == NULL)
......@@ -994,7 +994,7 @@ int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
}
}
if (first == -1 || last == -1 )
if (first == -1 || last == -1)
return ERROR_OK;
return flash_driver_erase(c, first, last);
......@@ -1076,7 +1076,7 @@ int flash_write(target_t *target, image_t *image, uint32_t *written, int erase)
run_size += pad_bytes;
padding[section_last] = 0;
LOG_INFO("Padding image section %d with %d bytes", section_last-1, pad_bytes );
LOG_INFO("Padding image section %d with %d bytes", section_last-1, pad_bytes);
}
/* fit the run into bank constraints */
......@@ -1127,7 +1127,7 @@ int flash_write(target_t *target, image_t *image, uint32_t *written, int erase)
if (erase)
{
/* calculate and erase sectors */
retval = flash_erase_address_range(target, run_address, run_size );
retval = flash_erase_address_range(target, run_address, run_size);
}
if (retval == ERROR_OK)
......
......@@ -415,7 +415,7 @@ static int mg_probe_cmd(struct command_context_s *cmd_ctx, char *cmd, char **arg
if (ret == ERROR_OK) {
command_print(cmd_ctx, "mflash (total %" PRIu32 " sectors) found at 0x%8.8" PRIx32 "",
mflash_bank->drv_info->tot_sects, mflash_bank->base );
mflash_bank->drv_info->tot_sects, mflash_bank->base);
}
return ret;
......@@ -429,7 +429,7 @@ static int mg_mflash_do_read_sects(void *buff, uint32_t sect_num, uint32_t sect_
uint8_t *buff_ptr = buff;
duration_t duration;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_read)) != ERROR_OK )
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_read)) != ERROR_OK)
return ret;
address = mflash_bank->base + MG_BUFFER_OFFSET;
......@@ -502,7 +502,7 @@ static int mg_mflash_do_write_sects(void *buff, uint32_t sect_num, uint32_t sect
uint8_t *buff_ptr = buff;
duration_t duration;
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, cmd)) != ERROR_OK )
if ((ret = mg_dsk_io_cmd(sect_num, sect_cnt, cmd)) != ERROR_OK)
return ret;
address = mflash_bank->base + MG_BUFFER_OFFSET;
......
......@@ -736,7 +736,7 @@ static int nand_read_plain(struct nand_device_s *device, uint32_t address, uint8
page = malloc(device->page_size);
while (data_size > 0 )
while (data_size > 0)
{
uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
uint32_t page_address;
......@@ -773,7 +773,7 @@ static int nand_write_plain(struct nand_device_s *device, uint32_t address, uint
page = malloc(device->page_size);
while (data_size > 0 )
while (data_size > 0)
{
uint32_t thisrun_size = (data_size > device->page_size) ? device->page_size : data_size;
uint32_t page_address;
......
......@@ -26,10 +26,10 @@ uint32 dcc_rd(void)
volatile uint32 dcc_reg;
do {
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : );
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
} while ((dcc_reg&1) == 0);
asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) : );
asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) :);
return dcc_reg;
}
......@@ -40,7 +40,7 @@ int dcc_wr(uint32 data)
volatile uint32 dcc_reg;
do {
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : );
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
/* operation controled by master, cancel operation
upon reception of data for immediate response */
if (dcc_reg&1) return -1;
......
......@@ -148,11 +148,11 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
/* wait for busy to clear */
while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0))
{
LOG_DEBUG("status: 0x%" PRIx32, status );
LOG_DEBUG("status: 0x%" PRIx32, status);
alive_sleep(1);
}
if (timeout <= 0)
LOG_DEBUG("timeout: status: 0x%" PRIx32, status );
LOG_DEBUG("timeout: status: 0x%" PRIx32, status);
return status;
}
......@@ -229,9 +229,9 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
{
LOG_DEBUG("Erasing entire program flash");
status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
if (status & NVMCON_NVMERR )
if (status & NVMCON_NVMERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR )
if (status & NVMCON_LVDERR)
return ERROR_FLASH_OPERATION_FAILED;
return ERROR_OK;
}
......@@ -245,9 +245,9 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
if (status & NVMCON_NVMERR )
if (status & NVMCON_NVMERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR )
if (status & NVMCON_LVDERR)
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
......@@ -313,7 +313,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if (set )
if (set)
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -327,7 +327,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if (set )
if (set)
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -434,12 +434,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
}
#endif
status = pic32mx_write_row(bank, address, source->address);
if (status & NVMCON_NVMERR ) {
if (status & NVMCON_NVMERR) {
LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if (status & NVMCON_LVDERR ) {
if (status & NVMCON_LVDERR) {
LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
......@@ -458,12 +458,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
memcpy(&value, buffer, sizeof(uint32_t));
uint32_t status = pic32mx_write_word(bank, address, value);
if (status & NVMCON_NVMERR ) {
if (status & NVMCON_NVMERR) {
LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if (status & NVMCON_LVDERR ) {
if (status & NVMCON_LVDERR) {
LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
......@@ -564,9 +564,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
status = pic32mx_write_word(bank, address, value);
if (status & NVMCON_NVMERR )
if (status & NVMCON_NVMERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR )
if (status & NVMCON_LVDERR)
return ERROR_FLASH_OPERATION_FAILED;
bytes_written += 4;
......@@ -580,9 +580,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, bytes_remaining);
status = pic32mx_write_word(bank, address, value);
if (status & NVMCON_NVMERR )
if (status & NVMCON_NVMERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR )
if (status & NVMCON_LVDERR)
return ERROR_FLASH_OPERATION_FAILED;
}
......@@ -607,10 +607,10 @@ static int pic32mx_probe(struct flash_bank_s *bank)
device_id,
(unsigned)((device_id >> 1)&0x7ff),
(unsigned)((device_id >> 12)&0xff),
(unsigned)((device_id >> 20)&0xfff) );
(unsigned)((device_id >> 20)&0xfff));
if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
LOG_WARNING("Cannot identify target as a PIC32MX family." );
LOG_WARNING("Cannot identify target as a PIC32MX family.");
return ERROR_FLASH_OPERATION_FAILED;
}
......@@ -626,7 +626,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
break;
}
if (pic32mx_devs[i].name == NULL) {
LOG_WARNING("Cannot identify target as a PIC32MX family." );
LOG_WARNING("Cannot identify target as a PIC32MX family.");
return ERROR_FLASH_OPERATION_FAILED;
}
}
......@@ -646,7 +646,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
}
#endif
LOG_INFO("flash size = %dkbytes", num_pages );
LOG_INFO("flash size = %dkbytes", num_pages);
/* calculate numbers of pages */
num_pages /= (page_size / 1024);
......@@ -847,13 +847,13 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank)
target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
{
LOG_ERROR("pic32mx device protected");
return ERROR_OK;
}
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
{
LOG_ERROR("pic32mx device programming failed");
return ERROR_OK;
......@@ -931,9 +931,9 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch
res = ERROR_OK;
status = pic32mx_write_word(bank, address, value);
if (status & NVMCON_NVMERR )
if (status & NVMCON_NVMERR)
res = ERROR_FLASH_OPERATION_FAILED;
if (status & NVMCON_LVDERR )
if (status & NVMCON_LVDERR)
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)
......
......@@ -182,9 +182,9 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* clear readout protection and complementary option bytes
......@@ -218,9 +218,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 1 */
......@@ -228,9 +228,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 2 */
......@@ -238,9 +238,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 3 */
......@@ -248,9 +248,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 4 */
......@@ -258,9 +258,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
/* write readout protection bit */
......@@ -268,9 +268,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
......@@ -378,9 +378,9 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
status = stm32x_wait_status_busy(bank, 10);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
return ERROR_FLASH_OPERATION_FAILED;
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
......@@ -445,7 +445,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if (set )
if (set)
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -459,7 +459,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if (set )
if (set)
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
......@@ -658,12 +658,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
......@@ -684,12 +684,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
......@@ -720,7 +720,7 @@ static int stm32x_probe(struct flash_bank_s *bank)
/* read stm32 device id register */
target_read_u32(target, 0xE0042000, &device_id);
LOG_INFO("device id = 0x%08" PRIx32 "", device_id );
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
/* get flash size from target */
if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
......@@ -740,7 +740,7 @@ static int stm32x_probe(struct flash_bank_s *bank)
if (num_pages == 0xffff)
{
/* number of sectors incorrect on revA */
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash" );
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash");
num_pages = 128;
}
}
......@@ -755,7 +755,7 @@ static int stm32x_probe(struct flash_bank_s *bank)
if (num_pages == 0xffff)
{
/* number of sectors incorrect on revA */
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash" );
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash");
num_pages = 32;
}
}
......@@ -770,7 +770,7 @@ static int stm32x_probe(struct flash_bank_s *bank)
if (num_pages == 0xffff)
{
/* number of sectors incorrect on revZ */
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash" );
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash");
num_pages = 512;
}
}
......@@ -785,17 +785,17 @@ static int stm32x_probe(struct flash_bank_s *bank)
if (num_pages == 0xffff)
{
/* number of sectors incorrect on revZ */
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash" );
LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash");
num_pages = 256;
}
}
else
{
LOG_WARNING("Cannot identify target as a STM32 family." );
LOG_WARNING("Cannot identify target as a STM32 family.");
return ERROR_FLASH_OPERATION_FAILED;
}
LOG_INFO("flash size = %dkbytes", num_pages );
LOG_INFO("flash size = %dkbytes", num_pages);
/* calculate numbers of pages */
num_pages /= (page_size / 1024);
......@@ -1188,13 +1188,13 @@ static int stm32x_mass_erase(struct flash_bank_s *bank)
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
if (status & FLASH_WRPRTERR )
if (status & FLASH_WRPRTERR)
{
LOG_ERROR("stm32x device protected");
return ERROR_OK;
}
if (status & FLASH_PGERR )
if (status & FLASH_PGERR)
{
LOG_ERROR("stm32x device programming failed");
return ERROR_OK;
......
......@@ -634,7 +634,7 @@ static int str7x_handle_part_id_command(struct command_context_s *cmd_ctx, char
static int str7x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "str7x flash driver info" );
snprintf(buf, buf_size, "str7x flash driver info");
return ERROR_OK;
}
......