Commit dc1685ca authored by Zachary T Welch's avatar Zachary T Welch
Browse files

move ARRAY_SIZE macro to types.h

The ARRAY_SIZE macro was defined in several target files, so move it
to types.h.

This patch also removes two other identical macros: DIM (from jtag.h)
and asizeof (from arm11.h).
parent 10cce4a5
......@@ -60,6 +60,16 @@ typedef bool _Bool;
#define __stringify(s) #s
/**
* Compute the number of elements of a variable length array.
* <code>
* const char *strs[] = { "a", "b", "c" };
* unsigned num_strs = ARRAY_SIZE(strs);
* </code>
*/
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
/**
* Cast a member of a structure out to the containing structure.
* @param ptr The pointer to the member.
......
......@@ -586,7 +586,7 @@ int jtag_add_statemove(tap_state_t goal_state)
unsigned tms_bits = tap_get_tms_path(cur_state, goal_state);
unsigned tms_count = tap_get_tms_path_len(cur_state, goal_state);
tap_state_t moves[8];
assert(tms_count < DIM(moves));
assert(tms_count < ARRAY_SIZE(moves));
for (unsigned i = 0; i < tms_count; i++, tms_bits >>= 1)
{
......
......@@ -363,7 +363,7 @@ const char *tap_state_name(tap_state_t state)
{
unsigned i;
for (i = 0; i < DIM(tap_name_mapping); i++) {
for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) {
if (tap_name_mapping[i].symbol == state)
return tap_name_mapping[i].name;
}
......@@ -374,7 +374,7 @@ tap_state_t tap_state_by_name(const char *name)
{
unsigned i;
for (i = 0; i < DIM(tap_name_mapping); i++) {
for (i = 0; i < ARRAY_SIZE(tap_name_mapping); i++) {
/* be nice to the human */
if (strcasecmp(name, tap_name_mapping[i].name) == 0)
return tap_name_mapping[i].symbol;
......
......@@ -38,14 +38,6 @@
#define DEBUG_JTAG_IOZ 64
#endif
/*-----<Macros>--------------------------------------------------*/
/**
* When given an array, compute its DIMension; in other words, the
* number of elements in the array
*/
#define DIM(x) (sizeof(x)/sizeof((x)[0]))
/*-----</Macros>-------------------------------------------------*/
/**
......
......@@ -282,7 +282,7 @@ int svf_add_statemove(tap_state_t state_to)
return ERROR_OK;
}
for (index = 0; index < DIM(svf_statemoves); index++)
for (index = 0; index < ARRAY_SIZE(svf_statemoves); index++)
{
if ((svf_statemoves[index].from == state_from)
&& (svf_statemoves[index].to == state_to))
......@@ -783,7 +783,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
*/
command = svf_find_string_in_array(argus[0],
(char **)svf_command_name, DIM(svf_command_name));
(char **)svf_command_name, ARRAY_SIZE(svf_command_name));
switch (command)
{
case ENDDR:
......@@ -1391,7 +1391,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
}
i_tmp = svf_find_string_in_array(argus[1],
(char **)svf_trst_mode_name,
DIM(svf_trst_mode_name));
ARRAY_SIZE(svf_trst_mode_name));
switch (i_tmp)
{
case TRST_ON:
......
......@@ -363,7 +363,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11)
int retval;
FNC_INFO;
for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
for (size_t i = 0; i < ARRAY_SIZE(arm11->reg_values); i++)
{
arm11->reg_list[i].valid = 1;
arm11->reg_list[i].dirty = 0;
......@@ -386,7 +386,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11)
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
}
else
{
......@@ -666,7 +666,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11)
arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1);
arm11_setup_field(arm11, 1, &Valid, NULL, chain5_fields + 2);
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
}
arm11_record_register_history(arm11);
......@@ -877,7 +877,7 @@ static int arm11_resume(struct target *target, int current,
brp[1].address = ARM11_SC7_BCR0 + brp_num;
brp[1].value = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21);
arm11_sc7_run(arm11, brp, asizeof(brp));
arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp));
LOG_DEBUG("Add BP " ZU " at %08" PRIx32 "", brp_num, bp->address);
......@@ -1120,7 +1120,7 @@ static int arm11_step(struct target *target, int current,
brp[1].value = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21);
}
CHECK_RETVAL(arm11_sc7_run(arm11, brp, asizeof(brp)));
CHECK_RETVAL(arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp)));
/* resume */
......@@ -1847,7 +1847,7 @@ static int arm11_examine(struct target *target)
arm11_setup_field(arm11, 32, NULL, &arm11->didr, chain0_fields + 0);
arm11_setup_field(arm11, 8, NULL, &arm11->implementor, chain0_fields + 1);
arm11_add_dr_scan_vc(asizeof(chain0_fields), chain0_fields, TAP_IDLE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain0_fields), chain0_fields, TAP_IDLE);
CHECK_RETVAL(jtag_execute_queue());
......@@ -1975,11 +1975,11 @@ static int arm11_build_reg_cache(struct target *target)
size_t i;
/* Not very elegant assertion */
if (ARM11_REGCACHE_COUNT != asizeof(arm11->reg_values) ||
ARM11_REGCACHE_COUNT != asizeof(arm11_reg_defs) ||
if (ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11->reg_values) ||
ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11_reg_defs) ||
ARM11_REGCACHE_COUNT != ARM11_RC_MAX)
{
LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, ARRAY_SIZE(arm11->reg_values), ARRAY_SIZE(arm11_reg_defs), ARM11_RC_MAX);
exit(-1);
}
......
......@@ -25,8 +25,6 @@
#include "armv4_5.h"
#define asizeof(x) (sizeof(x) / sizeof((x)[0]))
#define NEW(type, variable, items) \
type * variable = calloc(1, sizeof(type) * items)
......
......@@ -50,7 +50,7 @@ static const tap_state_t arm11_move_pi_to_si_via_ci[] =
int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state)
{
if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(asizeof(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
jtag_add_ir_scan(num_fields, fields, state);
return ERROR_OK;
......@@ -64,7 +64,7 @@ static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
int arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state)
{
if (cmd_queue_cur_state == TAP_DRPAUSE)
jtag_add_pathmove(asizeof(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
jtag_add_dr_scan(num_fields, fields, state);
return ERROR_OK;
......@@ -209,7 +209,7 @@ void arm11_add_debug_INST(struct arm11_common * arm11, uint32_t inst, uint8_t *
arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
arm11_add_dr_scan_vc(asizeof(itr), itr, state == ARM11_TAP_DEFAULT ? TAP_IDLE : state);
arm11_add_dr_scan_vc(ARRAY_SIZE(itr), itr, state == ARM11_TAP_DEFAULT ? TAP_IDLE : state);
}
/** Read the Debug Status and Control Register (DSCR)
......@@ -470,7 +470,7 @@ int arm11_run_instr_data_to_core(struct arm11_common * arm11, uint32_t opcode, u
{
Data = *data;
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
CHECK_RETVAL(jtag_execute_queue());
......@@ -505,7 +505,7 @@ int arm11_run_instr_data_to_core(struct arm11_common * arm11, uint32_t opcode, u
{
Data = 0;
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
......@@ -605,13 +605,13 @@ int arm11_run_instr_data_to_core_noack(struct arm11_common * arm11, uint32_t opc
if (count)
{
jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, jtag_set_end_state(TAP_DRPAUSE));
jtag_add_pathmove(asizeof(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_DRPAUSE));
jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
}
else
{
jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
}
}
......@@ -620,7 +620,7 @@ int arm11_run_instr_data_to_core_noack(struct arm11_common * arm11, uint32_t opc
chain5_fields[0].out_value = 0;
chain5_fields[1].in_value = ReadyPos++;
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
int retval = jtag_execute_queue();
if (retval == ERROR_OK)
......@@ -699,7 +699,7 @@ int arm11_run_instr_data_from_core(struct arm11_common * arm11, uint32_t opcode,
int i = 0;
do
{
arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
......@@ -833,7 +833,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions
{
JTAG_DEBUG("SC7 <= Address %02x Data %08x nRW %d", AddressOut, DataOut, nRW);
arm11_add_dr_scan_vc(asizeof(chain7_fields), chain7_fields, TAP_DRPAUSE);
arm11_add_dr_scan_vc(ARRAY_SIZE(chain7_fields), chain7_fields, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
......@@ -880,7 +880,7 @@ void arm11_sc7_clear_vbw(struct arm11_common * arm11)
struct arm11_sc7_action clear_bw[arm11->brp + arm11->wrp + 1];
struct arm11_sc7_action * pos = clear_bw;
for (size_t i = 0; i < asizeof(clear_bw); i++)
for (size_t i = 0; i < ARRAY_SIZE(clear_bw); i++)
{
clear_bw[i].write = true;
clear_bw[i].value = 0;
......@@ -896,7 +896,7 @@ void arm11_sc7_clear_vbw(struct arm11_common * arm11)
(pos++)->address = ARM11_SC7_VCR;
arm11_sc7_run(arm11, clear_bw, asizeof(clear_bw));
arm11_sc7_run(arm11, clear_bw, ARRAY_SIZE(clear_bw));
}
/** Write VCR register
......
......@@ -759,7 +759,7 @@ int arm_checksum_memory(struct target *target,
return retval;
/* convert code into a buffer in target endianness */
for (i = 0; i < DIM(arm_crc_code); i++) {
for (i = 0; i < ARRAY_SIZE(arm_crc_code); i++) {
retval = target_write_u32(target,
crc_algorithm->address + i * sizeof(uint32_t),
arm_crc_code[i]);
......@@ -835,7 +835,7 @@ int arm_blank_check_memory(struct target *target,
return retval;
/* convert code into a buffer in target endianness */
for (i = 0; i < DIM(check_code); i++) {
for (i = 0; i < ARRAY_SIZE(check_code); i++) {
retval = target_write_u32(target,
check_algorithm->address
+ i * sizeof(uint32_t),
......
......@@ -40,8 +40,6 @@
#include "algorithm.h"
#include "register.h"
#define ARRAY_SIZE(x) ((int)(sizeof(x)/sizeof((x)[0])))
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
......@@ -389,7 +387,6 @@ int armv7m_run_algorithm(struct target *target,
struct armv7m_algorithm *armv7m_algorithm_info = arch_info;
enum armv7m_mode core_mode = armv7m->core_mode;
int retval = ERROR_OK;
int i;
uint32_t context[ARMV7M_NUM_REGS];
if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC)
......@@ -406,20 +403,20 @@ int armv7m_run_algorithm(struct target *target,
/* refresh core register cache */
/* Not needed if core register cache is always consistent with target process state */
for (i = 0; i < ARMV7M_NUM_REGS; i++)
for (unsigned i = 0; i < ARMV7M_NUM_REGS; i++)
{
if (!armv7m->core_cache->reg_list[i].valid)
armv7m->read_core_reg(target, i);
context[i] = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
}
for (i = 0; i < num_mem_params; i++)
for (int i = 0; i < num_mem_params; i++)
{
if ((retval = target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
return retval;
}
for (i = 0; i < num_reg_params; i++)
for (int i = 0; i < num_reg_params; i++)
{
struct reg *reg = register_get_by_name(armv7m->core_cache, reg_params[i].reg_name, 0);
// uint32_t regvalue;
......@@ -471,7 +468,7 @@ int armv7m_run_algorithm(struct target *target,
}
/* Read memory values to mem_params[] */
for (i = 0; i < num_mem_params; i++)
for (int i = 0; i < num_mem_params; i++)
{
if (mem_params[i].direction != PARAM_OUT)
if ((retval = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
......@@ -481,7 +478,7 @@ int armv7m_run_algorithm(struct target *target,
}
/* Copy core register values to reg_params[] */
for (i = 0; i < num_reg_params; i++)
for (int i = 0; i < num_reg_params; i++)
{
if (reg_params[i].direction != PARAM_OUT)
{
......@@ -503,7 +500,7 @@ int armv7m_run_algorithm(struct target *target,
}
}
for (i = ARMV7M_NUM_REGS - 1; i >= 0; i--)
for (int i = ARMV7M_NUM_REGS - 1; i >= 0; i--)
{
uint32_t regvalue;
regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
......
......@@ -43,8 +43,6 @@
* Cortex-M0 cores too, although they're ARMv6-M not ARMv7-M.
*/
#define ARRAY_SIZE(x) ((int)(sizeof(x)/sizeof((x)[0])))
/* forward declarations */
static int cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint);
......@@ -1843,8 +1841,6 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t demcr = 0;
int retval;
int i;
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
if (retval != ERROR_OK)
return retval;
......@@ -1865,6 +1861,7 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
}
}
while (argc-- > 0) {
unsigned i;
for (i = 0; i < ARRAY_SIZE(vec_ids); i++) {
if (strcmp(args[argc], vec_ids[i].name) != 0)
continue;
......@@ -1885,7 +1882,7 @@ write:
mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &demcr);
}
for (i = 0; i < ARRAY_SIZE(vec_ids); i++)
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++)
command_print(cmd_ctx, "%9s: %s", vec_ids[i].name,
(demcr & vec_ids[i].mask) ? "catch" : "ignore");
......
......@@ -30,8 +30,6 @@
#include "embeddedice.h"
#include "register.h"
#define ARRAY_SIZE(x) ((int)(sizeof(x)/sizeof((x)[0])))
/**
* @file
*
......
......@@ -50,8 +50,6 @@
* ARM IHI 0014O ... Embedded Trace Macrocell, Architecture Specification
*/
#define ARRAY_SIZE(x) ((int)(sizeof(x)/sizeof((x)[0])))
enum {
RO, /* read/only */
WO, /* write/only */
......
......@@ -470,7 +470,7 @@ COMMAND_HANDLER(handle_xsvf_command)
TAP_IDLE,
};
jtag_add_pathmove(DIM(exception_path), exception_path);
jtag_add_pathmove(ARRAY_SIZE(exception_path), exception_path);
if (verbose)
LOG_USER("%s mismatch, xsdrsize=%d retry=%d", op_name, xsdrsize, attempt);
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment