Commit d5936dc6 authored by Marc Schink's avatar Marc Schink Committed by Tomas Vanek

target/riscv: Free registers to avoid memory leak

Tested with SiFive HiFive1 development board.

Change-Id: I96a9a528057fcf9fc54d3da46a672d2cd54c3d5f
Signed-off-by: default avatarMarc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4885
Tested-by: jenkins
Reviewed-by: default avatarTim Newsome <tim@sifive.com>
Reviewed-by: default avatarTomas Vanek <vanekt@fbl.cz>
parent 6aae614c
......@@ -271,16 +271,8 @@ static int riscv_init_target(struct command_context *cmd_ctx,
return ERROR_OK;
}
static void riscv_deinit_target(struct target *target)
static void riscv_free_registers(struct target *target)
{
LOG_DEBUG("riscv_deinit_target()");
struct target_type *tt = get_target_type(target);
if (tt) {
tt->deinit_target(target);
riscv_info_t *info = (riscv_info_t *) target->arch_info;
free(info->reg_names);
free(info);
}
/* Free the shared structure use for most registers. */
if (target->reg_cache) {
if (target->reg_cache->reg_list) {
......@@ -293,6 +285,21 @@ static void riscv_deinit_target(struct target *target)
}
free(target->reg_cache);
}
}
static void riscv_deinit_target(struct target *target)
{
LOG_DEBUG("riscv_deinit_target()");
struct target_type *tt = get_target_type(target);
if (tt) {
tt->deinit_target(target);
riscv_info_t *info = (riscv_info_t *) target->arch_info;
free(info->reg_names);
free(info);
}
riscv_free_registers(target);
target->arch_info = NULL;
}
......@@ -2503,11 +2510,7 @@ int riscv_init_registers(struct target *target)
{
RISCV_INFO(info);
if (target->reg_cache) {
if (target->reg_cache->reg_list)
free(target->reg_cache->reg_list);
free(target->reg_cache);
}
riscv_free_registers(target);
target->reg_cache = calloc(1, sizeof(*target->reg_cache));
target->reg_cache->name = "RISC-V Registers";
......
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