Commit cb582796 authored by drath's avatar drath
Browse files

- reworked file i/o. every fileaccess (target, flash, nand, in future...

- reworked file i/o. every fileaccess (target, flash, nand, in future configuration, too) should now go through the fileio subsystem
- added support for reading IHEX files (through fileio)
- load/dump_binary renamed to the more generic load/dump_image <file> <address> ['bin'|'ihex']
- added NAND framework (preliminary)
- added support for the LPC3180 SLC and MLC NAND controllers (preliminary)
- fix initialization for parport
- gw16012 fixes/cleanups
- added EmbeddedICE version 7 (preliminary, reported on two LPC23xx devices so far)
- added 'arm7_9 etm <target#>' configuration command to enable access to the ETM registers


git-svn-id: svn://svn.berlios.de/openocd/trunk@132 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent e0c2e306
INCLUDES = -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag -I$(top_srcdir)/src/target $(all_includes)
METASOURCES = AUTO
noinst_LIBRARIES = libflash.a
libflash_a_SOURCES = flash.c lpc2000.c cfi.c at91sam7.c str7x.c str9x.c
noinst_HEADERS = flash.h lpc2000.h cfi.h at91sam7.h str7x.h str9x.h
libflash_a_SOURCES = flash.c lpc2000.c cfi.c at91sam7.c str7x.c str9x.c nand.c lpc3180_nand_controller.c
noinst_HEADERS = flash.h lpc2000.h cfi.h at91sam7.h str7x.h str9x.h nand.h lpc3180_nand_controller.h
......@@ -34,6 +34,8 @@
#include <sys/stat.h>
#include <errno.h>
#include <fileio.h>
/* command handlers */
int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_flash_banks_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
......@@ -486,24 +488,31 @@ int handle_flash_protect_command(struct command_context_s *cmd_ctx, char *cmd, c
int handle_flash_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
FILE *binary;
u32 offset;
struct stat binary_stat;
u32 binary_size;
u8 *buffer;
u32 buf_cnt;
fileio_t file;
fileio_image_t image_info;
enum fileio_sec_type sec_type;
duration_t duration;
char *duration_text;
int retval;
flash_bank_t *p;
struct timeval start, end, duration;
gettimeofday(&start, NULL);
if (argc < 3)
{
command_print(cmd_ctx, "usage: flash write <bank> <file> <offset>");
command_print(cmd_ctx, "usage: flash write <bank> <file> <offset> [type]");
return ERROR_OK;
}
duration_start_measure(&duration);
fileio_identify_image_type(&sec_type, (argc == 4) ? args[3] : NULL);
offset = strtoul(args[2], NULL, 0);
p = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
if (!p)
......@@ -512,36 +521,21 @@ int handle_flash_write_command(struct command_context_s *cmd_ctx, char *cmd, cha
return ERROR_OK;
}
if (stat(args[1], &binary_stat) == -1)
{
ERROR("couldn't stat() %s: %s", args[1], strerror(errno));
return ERROR_OK;
}
image_info.base_address = strtoul(args[2], NULL, 0);
image_info.has_start_address = 0;
if (S_ISDIR(binary_stat.st_mode))
if (fileio_open(&file, args[1], FILEIO_READ,
FILEIO_IMAGE, &image_info, sec_type) != ERROR_OK)
{
ERROR("%s is a directory", args[1]);
command_print(cmd_ctx,"%s is a directory", args[1]);
command_print(cmd_ctx, "flash write error: %s", file.error_str);
return ERROR_OK;
}
if (binary_stat.st_size == 0){
ERROR("Empty file %s", args[1]);
command_print(cmd_ctx,"Empty file %s", args[1]);
return ERROR_OK;
}
if (!(binary = fopen(args[1], "rb")))
{
ERROR("couldn't open %s: %s", args[1], strerror(errno));
command_print(cmd_ctx, "couldn't open %s", args[1]);
return ERROR_OK;
}
binary_size = binary_stat.st_size;
binary_size = file.size;
buffer = malloc(binary_size);
buf_cnt = fread(buffer, 1, binary_size, binary);
fileio_read(&file, binary_size, buffer, &buf_cnt);
if ((retval = p->driver->write(p, buffer, offset, buf_cnt)) != ERROR_OK)
{
command_print(cmd_ctx, "failed writing file %s to flash bank %i at offset 0x%8.8x",
......@@ -575,14 +569,14 @@ int handle_flash_write_command(struct command_context_s *cmd_ctx, char *cmd, cha
}
else
{
gettimeofday(&end, NULL);
timeval_subtract(&duration, &end, &start);
command_print(cmd_ctx, "wrote file %s to flash bank %i at offset 0x%8.8x in %is %ius", args[1], strtoul(args[0], NULL, 0), strtoul(args[2], NULL, 0), duration.tv_sec, duration.tv_usec);
duration_stop_measure(&duration, &duration_text);
command_print(cmd_ctx, "wrote file %s to flash bank %i at offset 0x%8.8x in %s",
file.url, strtoul(args[0], NULL, 0), offset, duration_text);
free(duration_text);
}
free(buffer);
fclose(binary);
fileio_close(&file);
return ERROR_OK;
}
This diff is collapsed.
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef LPC3180_NAND_CONTROLLER_H
#define LPC3180_NAND_CONTROLLER_H
#include "target.h"
enum lpc3180_selected_controller
{
LPC3180_NO_CONTROLLER,
LPC3180_MLC_CONTROLLER,
LPC3180_SLC_CONTROLLER,
};
typedef struct lpc3180_nand_controller_s
{
struct target_s *target;
int osc_freq;
enum lpc3180_selected_controller selected_controller;
int sw_write_protection;
u32 sw_wp_lower_bound;
u32 sw_wp_upper_bound;
} lpc3180_nand_controller_t;
#endif /*LPC3180_NAND_CONTROLLER_H */
This diff is collapsed.
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* partially based on *
* linux/include/linux/mtd/nand.h *
* *
* Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> *
* Steven J. Hill <sjhill@realitydiluted.com> *
* Thomas Gleixner <tglx@linutronix.de> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef NAND_H
#define NAND_H
#include "flash.h"
struct nand_device_s;
typedef struct nand_flash_controller_s
{
char *name;
int (*nand_device_command)(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
int (*register_commands)(struct command_context_s *cmd_ctx);
int (*init)(struct nand_device_s *device);
int (*reset)(struct nand_device_s *device);
int (*command)(struct nand_device_s *device, u8 command);
int (*address)(struct nand_device_s *device, u8 address);
int (*write_data)(struct nand_device_s *device, u16 data);
int (*read_data)(struct nand_device_s *device, void *data);
int (*write_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
int (*read_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
int (*controller_ready)(struct nand_device_s *device, int timeout);
int (*nand_ready)(struct nand_device_s *device, int timeout);
} nand_flash_controller_t;
typedef struct nand_block_s
{
u32 offset;
u32 size;
int is_erased;
int is_bad;
} nand_block_t;
typedef struct nand_device_s
{
nand_flash_controller_t *controller;
void *controller_priv;
struct nand_manufacturer_s *manufacturer;
struct nand_info_s *device;
int bus_width;
int address_cycles;
int page_size;
int erase_size;
int use_raw;
int num_blocks;
nand_block_t *blocks;
struct nand_device_s *next;
} nand_device_t;
/* NAND Flash Manufacturer ID Codes
*/
enum
{
NAND_MFR_TOSHIBA = 0x98,
NAND_MFR_SAMSUNG = 0xec,
NAND_MFR_FUJITSU = 0x04,
NAND_MFR_NATIONAL = 0x8f,
NAND_MFR_RENESAS = 0x07,
NAND_MFR_STMICRO = 0x20,
NAND_MFR_HYNIX = 0xad,
};
typedef struct nand_manufacturer_s
{
int id;
char *name;
} nand_manufacturer_t;
typedef struct nand_info_s
{
char *name;
int id;
int page_size;
int chip_size;
int erase_size;
int options;
} nand_info_t;
/* Option constants for bizarre disfunctionality and real features
*/
enum {
/* Chip can not auto increment pages */
NAND_NO_AUTOINCR = 0x00000001,
/* Buswitdh is 16 bit */
NAND_BUSWIDTH_16 = 0x00000002,
/* Device supports partial programming without padding */
NAND_NO_PADDING = 0x00000004,
/* Chip has cache program function */
NAND_CACHEPRG = 0x00000008,
/* Chip has copy back function */
NAND_COPYBACK = 0x00000010,
/* AND Chip which has 4 banks and a confusing page / block
* assignment. See Renesas datasheet for further information */
NAND_IS_AND = 0x00000020,
/* Chip has a array of 4 pages which can be read without
* additional ready /busy waits */
NAND_4PAGE_ARRAY = 0x00000040,
/* Chip requires that BBT is periodically rewritten to prevent
* bits from adjacent blocks from 'leaking' in altering data.
* This happens with the Renesas AG-AND chips, possibly others. */
BBT_AUTO_REFRESH = 0x00000080,
/* Chip does not require ready check on read. True
* for all large page devices, as they do not support
* autoincrement.*/
NAND_NO_READRDY = 0x00000100,
/* Options valid for Samsung large page devices */
NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK),
/* Options for new chips with large page size. The pagesize and the
* erasesize is determined from the extended id bytes
*/
LP_OPTIONS = (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR),
LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
};
enum
{
/* Standard NAND flash commands */
NAND_CMD_READ0 = 0x0,
NAND_CMD_READ1 = 0x1,
NAND_CMD_RNDOUT = 0x5,
NAND_CMD_PAGEPROG = 0x10,
NAND_CMD_READOOB = 0x50,
NAND_CMD_ERASE1 = 0x60,
NAND_CMD_STATUS = 0x70,
NAND_CMD_STATUS_MULTI = 0x71,
NAND_CMD_SEQIN = 0x80,
NAND_CMD_RNDIN = 0x85,
NAND_CMD_READID = 0x90,
NAND_CMD_ERASE2 = 0xd0,
NAND_CMD_RESET = 0xff,
/* Extended commands for large page devices */
NAND_CMD_READSTART = 0x30,
NAND_CMD_RNDOUTSTART = 0xE0,
NAND_CMD_CACHEDPROG = 0x15,
};
/* Status bits */
enum
{
NAND_STATUS_FAIL = 0x01,
NAND_STATUS_FAIL_N1 = 0x02,
NAND_STATUS_TRUE_READY = 0x20,
NAND_STATUS_READY = 0x40,
NAND_STATUS_WP = 0x80,
};
/* OOB (spare) data formats */
enum oob_formats
{
NAND_OOB_NONE = 0x0, /* no OOB data at all */
NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */
NAND_OOB_ONLY = 0x2, /* only OOB data */
NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
};
/* Function prototypes */
extern nand_device_t *get_nand_device_by_num(int num);
extern int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
extern int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size);
#define ERROR_NAND_DEVICE_INVALID (-1100)
#define ERROR_NAND_OPERATION_FAILED (-1101)
#define ERROR_NAND_OPERATION_TIMEOUT (-1102)
#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103)
#define ERROR_NAND_DEVICE_NOT_PROBED (-1104)
#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105)
#endif /* NAND_H */
INCLUDES = $(all_includes)
METASOURCES = AUTO
noinst_LIBRARIES = libhelper.a
libhelper_a_SOURCES = binarybuffer.c configuration.c log.c interpreter.c command.c time_support.c replacements.c
libhelper_a_SOURCES = binarybuffer.c configuration.c log.c interpreter.c command.c time_support.c \
replacements.c fileio.c
noinst_HEADERS = binarybuffer.h configuration.h types.h log.h command.h \
interpreter.h time_support.h replacements.h
interpreter.h time_support.h replacements.h fileio.h
......@@ -22,6 +22,7 @@
#endif
#include "time_support.h"
#include "log.h"
#include <sys/time.h>
#include <time.h>
......@@ -82,3 +83,26 @@ int timeval_add_time(struct timeval *result, int sec, int usec)
return 0;
}
int duration_start_measure(duration_t *duration)
{
gettimeofday(&duration->start, NULL);
return ERROR_OK;
}
int duration_stop_measure(duration_t *duration, char **text)
{
struct timeval end;
gettimeofday(&end, NULL);
timeval_subtract(&duration->duration, &end, &duration->start);
if (text)
{
*text = malloc(16);
snprintf(*text, 16, "%is %ius", duration->duration.tv_sec, duration->duration.tv_usec);
}
return ERROR_OK;
}
......@@ -27,4 +27,13 @@ extern int timeval_subtract(struct timeval *result, struct timeval *x, struct ti
extern int timeval_add(struct timeval *result, struct timeval *x, struct timeval *y);
extern int timeval_add_time(struct timeval *result, int sec, int usec);
typedef struct duration_s
{
struct timeval start;
struct timeval duration;
} duration_t;
extern int duration_start_measure(duration_t *duration);
extern int duration_stop_measure(duration_t *duration, char **text);
#endif /* TIME_SUPPORT_H */
......@@ -34,6 +34,10 @@ typedef unsigned short u16;
typedef unsigned int u32;
#endif
#ifndef u64
typedef unsigned long long u64;
#endif
#ifdef WORDS_BIGENDIAN /* big endian host */
#define le_to_h_u32(x) (u32)(x[0] | x[1] << 8 | x[2] << 16 | x[3] << 24)
......@@ -61,8 +65,8 @@ typedef unsigned int u32;
#else /* little endian host */
#define le_to_h_u32(x) (*(u32*)(x))
#define le_to_h_u16(x) (*(u16*)(x))
#define be_to_h_u32(x) (u32)(x[3] | x[2] << 8 | x[1] << 16 | x[0] << 24)
#define be_to_h_u16(x) (u16)(x[1] | x[0] << 8)
#define be_to_h_u32(x) (u32)((x)[3] | (x)[2] << 8 | (x)[1] << 16 | (x)[0] << 24)
#define be_to_h_u16(x) (u16)((x)[1] | (x)[0] << 8)
#define h_u32_to_le(buf, val) do { *(u32*)(buf) = (val); } while (0)
#define h_u16_to_le(buf, val) do { *(u16*)(buf) = (val); } while (0)
......
......@@ -288,13 +288,17 @@ void gw16012_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
enum tap_state saved_end_state = end_state;
u8 scan_out, scan_in;
if (ir_scan)
gw16012_end_state(TAP_SI);
else
gw16012_end_state(TAP_SD);
/* only if we're not already in the correct Shift state */
if (!((!ir_scan && (cur_state == TAP_SD)) || (ir_scan && (cur_state == TAP_SI))))
{
if (ir_scan)
gw16012_end_state(TAP_SI);
else
gw16012_end_state(TAP_SD);
gw16012_state_move();
gw16012_end_state(saved_end_state);
gw16012_state_move();
gw16012_end_state(saved_end_state);
}
while (type == SCAN_OUT && ((bits_left - 1) > 7))
{
......@@ -309,6 +313,9 @@ void gw16012_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
while (bits_left-- > 0)
{
u8 tms = 0;
scan_out = buf_get_u32(buffer, bit_count, 1);
if (bits_left == 0) /* last bit */
{
if ((ir_scan && (end_state == TAP_SI))
......@@ -321,14 +328,15 @@ void gw16012_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
tms = 2;
}
}
scan_out = buf_get_u32(buffer, bit_count, 1);
gw16012_data(scan_out | tms);
if (type != SCAN_OUT)
{
gw16012_input(&scan_in);
buf_set_u32(buffer, bit_count, 1, ((scan_in & 0x08) >> 3));
}
}
bit_count++;
}
......@@ -530,6 +538,13 @@ int gw16012_init(void)
return ERROR_JTAG_INIT_FAILED;
}
DEBUG("...privileges granted");
/* make sure parallel port is in right mode (clear tristate and interrupt */
#ifdef __FreeBSD__
outb(gw16012_port + 2, 0x0);
#else
outb(0x0, gw16012_port + 2);
#endif
#endif /* PARPORT_USE_PPDEV */
gw16012_input(&status_port);
......
......@@ -1143,6 +1143,7 @@ void jtag_sleep(u32 us)
*/
int jtag_examine_chain()
{
jtag_device_t *device = jtag_devices;
scan_field_t field;
u8 idcode_buffer[JTAG_MAX_CHAIN_SIZE * 4];
int i;
......@@ -1204,6 +1205,11 @@ int jtag_examine_chain()
break;
}
if (device)
{
device->idcode = idcode;
device = device->next;
}
device_count++;
manufacturer = (idcode & 0xffe) >> 1;
......
......@@ -25,7 +25,7 @@
#include "command.h"
#if 1
#if 0
#define _DEBUG_JTAG_IO_
#endif
......
......@@ -94,6 +94,7 @@ cable_t cables[] =
{
/* name tdo trst tms tck tdi srst o_inv i_inv init */
{ "wiggler", 0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x01, 0x80, 0x80 },
{ "wiggler_ntrst_inverted", 0x80, 0x10, 0x02, 0x04, 0x08, 0x01, 0x11, 0x80, 0x80 },
{ "old_amt_wiggler", 0x80, 0x01, 0x02, 0x04, 0x08, 0x10, 0x11, 0x80, 0x80 },
{ "chameleon", 0x80, 0x00, 0x04, 0x01, 0x02, 0x00, 0x00, 0x80, 0x00 },
{ "dlc5", 0x10, 0x00, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00, 0x10 },
......@@ -390,7 +391,7 @@ int parport_init(void)
#ifdef __FreeBSD__
outb(parport_port + 2, 0x0);
#else
outb(0x0, dataport);
outb(0x0, parport_port + 2);
#endif
#endif /* PARPORT_USE_PPDEV */
......
......@@ -18,7 +18,7 @@
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#define OPENOCD_VERSION "Open On-Chip Debugger (2007-01-31 12:00 CET)"
#define OPENOCD_VERSION "Open On-Chip Debugger (2007-03-15 14:30 CET)"
#ifdef HAVE_CONFIG_H
#include "config.h"
......@@ -75,6 +75,7 @@ int main(int argc, char *argv[])
xsvf_register_commands(cmd_ctx);
target_register_commands(cmd_ctx);
flash_register_commands(cmd_ctx);
nand_register_commands(cmd_ctx);
pld_register_commands(cmd_ctx);
if (log_init(cmd_ctx) != ERROR_OK)
......@@ -109,6 +110,10 @@ int main(int argc, char *argv[])
return EXIT_FAILURE;
DEBUG("flash init complete");
if (nand_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("NAND init complete");
if (pld_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
DEBUG("pld init complete");
......
......@@ -54,6 +54,7 @@ int handle_arm7_9_force_hw_bkpts_command(struct command_context_s *cmd_ctx, char
int handle_arm7_9_dbgrq_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_arm7_9_fast_memory_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_arm7_9_etm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int arm7_9_reinit_embeddedice(target_t *target)
{
......@@ -2049,6 +2050,8 @@ int arm7_9_register_commands(struct command_context_s *cmd_ctx)
command_t *arm7_9_cmd;
arm7_9_cmd = register_command(cmd_ctx, NULL, "arm7_9", NULL, COMMAND_ANY, "arm7/9 specific commands");
register_command(cmd_ctx, arm7_9_cmd, "etm", handle_arm7_9_etm_command, COMMAND_CONFIG, NULL);
register_command(cmd_ctx, arm7_9_cmd, "write_xpsr", handle_arm7_9_write_xpsr_command, COMMAND_EXEC, "write program status register <value> <not cpsr|spsr>");
register_command(cmd_ctx, arm7_9_cmd, "write_xpsr_im8", handle_arm7_9_write_xpsr_im8_command, COMMAND_EXEC, "write program status register <8bit immediate> <rotate> <not cpsr|spsr>");
......@@ -2376,6 +2379,37 @@ int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char
return ERROR_OK;
}