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Commit c8feb1b5 authored by Kevin Gillespie's avatar Kevin Gillespie Committed by Kevin
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Adding flc_base parameter to RAM algorithm. 

Change-Id: Ie09a08787aa9c4e368ada47c42dda3ce620aa204
parent defb68fc
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contrib/loaders/flash/max32xxx/max32xxx_write.c
View file @ c8feb1b5
......@@ -53,8 +53,6 @@
#define MXC_TPU ((mxc_tpu_regs_t*)MXC_BASE_TPU)
#define MXC_BASE_GCR ((uint32_t)0x40000000UL)
#define MXC_GCR ((mxc_gcr_regs_t*)MXC_BASE_GCR)
#define MXC_BASE_FLC ((uint32_t)0x40029000UL)
#define MXC_FLC ((mxc_flc_regs_t*)MXC_BASE_FLC)
/******************************************************************************/
#define getbyte(temp8) \
......@@ -63,7 +61,7 @@
temp8 = **read_ptr; \
\
/* Increment and wrap around the read pointer */ \
if ((*read_ptr + 1) >= (uint8_t*)(work_end - 4 - 256)) { \
if ((*read_ptr + 1) >= (uint8_t*)(work_end - 8 - 256)) { \
*read_ptr = (uint8_t *)(work_start + 8); \
} else { \
(*read_ptr)++; \
......@@ -82,16 +80,33 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
uint8_t * volatile *write_ptr = (uint8_t **)work_start;
uint8_t * volatile *read_ptr = (uint8_t **)(work_start + 4);
uint32_t options = *(uint32_t *)(work_end - 4 - 128);
uint32_t *enc_buffer = (uint32_t *)(work_end - 4 - 256);
uint32_t *flc_base = (uint32_t *)(work_end - 4 - 128);
uint32_t *options = (uint32_t *)(work_end - 8 - 128);
uint32_t *enc_buffer = (uint32_t *)(work_end - 8 - 256);
uint8_t temp8;
uint32_t addr_save;
int i;
mxc_flc_regs_t * MXC_FLC=(mxc_flc_regs_t*)*flc_base;
printf(" > w%08x r%08x o%08x b%08x b%08x\n",
(uint32_t)write_ptr, (uint32_t)read_ptr, (uint32_t)options, (uint32_t)enc_buffer, (uint32_t)(enc_buffer + 256));
printf(" > w%08x r%08x o%08x f%08x b%08x b%08x\n",
(uint32_t)write_ptr, (uint32_t)read_ptr, (uint32_t)*options, (uint32_t)*flc_base, (uint32_t)enc_buffer, (uint32_t)(enc_buffer + 256));
if(options & OPTIONS_ENC) {
if(*options & OPTIONS_ENC) {
/* Enable Memory Protection */
MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_EN;
/* Set the keysize */
if(*options & OPTIONS_KEYSIZE) {
MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_KEYSZ;
} else {
MXC_GCR->scon &= ~(MXC_F_GCR_SCON_MEMPROT_KEYSZ);
}
} else {
/* Disable memory protection */
MXC_GCR->scon &= ~MXC_F_GCR_SCON_MEMPROT_EN;
}
if(*options & OPTIONS_ENC) {
// Setup the AES
/* Enable CRYPTO clock */
......@@ -117,7 +132,7 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
while(len) {
if((options & OPTIONS_128) == 0) {
if((*options & OPTIONS_128) == 0) {
// Save the current address before we read from the working area
addr_save = addr;
......@@ -139,6 +154,9 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
// Unlock the flash
MXC_FLC->cn = (MXC_FLC->cn & ~MXC_F_FLC_CN_UNLOCK) | MXC_S_FLC_CN_UNLOCK_UNLOCKED;
// 32-bit write
MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
MXC_FLC->addr = addr_save;
MXC_FLC->data[0] = enc_buffer[0];
......@@ -199,11 +217,11 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
enc_buffer[i] |= (temp8 << (24));
}
if(options & OPTIONS_ENC) {
if(*options & OPTIONS_ENC) {
// XOR data with the address
for(i = 0; i < 4; i++) {
if(options & OPTIONS_RELATIVE_XOR) {
if(*options & OPTIONS_RELATIVE_XOR) {
enc_buffer[i] ^= ((addr_save & 0x00FFFFFF) + i*4);
} else {
enc_buffer[i] ^= (addr_save + i*4);
......@@ -217,7 +235,7 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
MXC_TPU->cipher_ctrl = ((0x0 << MXC_F_TPU_CIPHER_CTRL_MODE_POS) |
(0x0 << MXC_F_TPU_CIPHER_CTRL_ENC_POS));
if(options & OPTIONS_KEYSIZE) {
if(*options & OPTIONS_KEYSIZE) {
// ECB, AES-256, encrypt
MXC_TPU->cipher_ctrl |= (0x3 << MXC_F_TPU_CIPHER_CTRL_CIPHER_POS);
} else {
......@@ -278,18 +296,6 @@ void algo_write(uint8_t *work_start, uint8_t *work_end, uint32_t len, uint32_t a
}
}
}
if(options & OPTIONS_ENC) {
/* Setup the memory protection */
MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_EN;
/* Set the keysize */
if(options & OPTIONS_KEYSIZE) {
MXC_GCR->scon |= MXC_F_GCR_SCON_MEMPROT_KEYSZ;
} else {
MXC_GCR->scon &= ~(MXC_F_GCR_SCON_MEMPROT_KEYSZ);
}
}
#ifndef ALGO_TEST
__asm("bkpt\n");
......
contrib/loaders/flash/max32xxx/max32xxx_write.inc
View file @ c8feb1b5
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src/flash/nor/max32xxx.c
View file @ c8feb1b5
......@@ -391,7 +391,7 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
struct working_area *write_algorithm;
uint32_t address = bank->base + offset;
struct reg_param reg_params[5];
struct mem_param mem_param[1];
struct mem_param mem_param[2];
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
/* power of two, and multiple of word size */
......@@ -445,12 +445,14 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
buf_set_u32(reg_params[4].value, 0, 32, source->address + source->size);
/* mem_params for options */
init_mem_param(&mem_param[0], source->address + (source->size - 4 - 128), 4, PARAM_OUT);
init_mem_param(&mem_param[0], source->address + (source->size - 8 - 128), 4, PARAM_OUT);
init_mem_param(&mem_param[1], source->address + (source->size - 4 - 128), 4, PARAM_OUT);
buf_set_u32(mem_param[0].value, 0, 32, info->options);
buf_set_u32(mem_param[1].value, 0, 32, info->flc_base);
/* leave room for stack, 32-bit options and encryption buffer */
retval = target_run_flash_async_algorithm(target, buffer, wcount*4, 1, 1, mem_param,
5, reg_params, source->address, (source->size - 4 - 256), write_algorithm->address, 0, &armv7m_info);
retval = target_run_flash_async_algorithm(target, buffer, wcount*4, 1, 2, mem_param,
5, reg_params, source->address, (source->size - 8 - 256), write_algorithm->address, 0, &armv7m_info);
if (retval == ERROR_FLASH_OPERATION_FAILED)
LOG_ERROR("error %d executing max32xxx flash write algorithm", retval);
......
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