Commit c3b90c05 authored by Tim Newsome's avatar Tim Newsome Committed by Matthias Welwarsky
Browse files

flash/nor: use target_addr_t for flash bank base



This should allow users to configure flash at >32-bit addresses.

Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: default avatarTim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919


Tested-by: jenkins
Reviewed-by: default avatarTomas Vanek <vanekt@fbl.cz>
parent 57e30102
...@@ -2598,7 +2598,7 @@ static int sam4_info(struct flash_bank *bank, char *buf, int buf_size) ...@@ -2598,7 +2598,7 @@ static int sam4_info(struct flash_bank *bank, char *buf, int buf_size)
} }
snprintf(buf, buf_size, snprintf(buf, buf_size,
"%s bank %d: %d kB at 0x%08" PRIx32, "%s bank %d: %d kB at " TARGET_ADDR_FMT,
pPrivate->pChip->details.name, pPrivate->pChip->details.name,
pPrivate->bank_number, pPrivate->bank_number,
k, k,
...@@ -2642,7 +2642,9 @@ static int sam4_probe(struct flash_bank *bank) ...@@ -2642,7 +2642,9 @@ static int sam4_probe(struct flash_bank *bank)
for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) { for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) {
if (bank->base == pPrivate->pChip->details.bank[x].base_address) { if (bank->base == pPrivate->pChip->details.bank[x].base_address) {
bank->size = pPrivate->pChip->details.bank[x].size_bytes; bank->size = pPrivate->pChip->details.bank[x].size_bytes;
LOG_DEBUG("SAM4 Set flash bank to %08X - %08X, idx %d", bank->base, bank->base + bank->size, x); LOG_DEBUG("SAM4 Set flash bank to " TARGET_ADDR_FMT " - "
TARGET_ADDR_FMT ", idx %d", bank->base,
bank->base + bank->size, x);
break; break;
} }
} }
......
...@@ -203,7 +203,8 @@ static int sam4l_flash_command(struct target *target, uint8_t cmd, int page) ...@@ -203,7 +203,8 @@ static int sam4l_flash_command(struct target *target, uint8_t cmd, int page)
FLASH_BANK_COMMAND_HANDLER(sam4l_flash_bank_command) FLASH_BANK_COMMAND_HANDLER(sam4l_flash_bank_command)
{ {
if (bank->base != SAM4L_FLASH) { if (bank->base != SAM4L_FLASH) {
LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32 LOG_ERROR("Address " TARGET_ADDR_FMT
" invalid bank address (try 0x%08" PRIx32
"[at91sam4l series] )", "[at91sam4l series] )",
bank->base, SAM4L_FLASH); bank->base, SAM4L_FLASH);
return ERROR_FAIL; return ERROR_FAIL;
......
...@@ -906,7 +906,8 @@ free_pb: ...@@ -906,7 +906,8 @@ free_pb:
FLASH_BANK_COMMAND_HANDLER(samd_flash_bank_command) FLASH_BANK_COMMAND_HANDLER(samd_flash_bank_command)
{ {
if (bank->base != SAMD_FLASH) { if (bank->base != SAMD_FLASH) {
LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32 LOG_ERROR("Address " TARGET_ADDR_FMT
" invalid bank address (try 0x%08" PRIx32
"[at91samd series] )", "[at91samd series] )",
bank->base, SAMD_FLASH); bank->base, SAMD_FLASH);
return ERROR_FAIL; return ERROR_FAIL;
......
...@@ -794,7 +794,7 @@ static int ath79_probe(struct flash_bank *bank) ...@@ -794,7 +794,7 @@ static int ath79_probe(struct flash_bank *bank)
ath79_info->io_base = target_device->io_base; ath79_info->io_base = target_device->io_base;
LOG_DEBUG("Found device %s at address 0x%" PRIx32, LOG_DEBUG("Found device %s at address " TARGET_ADDR_FMT,
target_device->name, bank->base); target_device->name, bank->base);
retval = read_flash_id(bank, &id); retval = read_flash_id(bank, &id);
......
...@@ -730,9 +730,8 @@ free_pb: ...@@ -730,9 +730,8 @@ free_pb:
FLASH_BANK_COMMAND_HANDLER(same5_flash_bank_command) FLASH_BANK_COMMAND_HANDLER(same5_flash_bank_command)
{ {
if (bank->base != SAMD_FLASH) { if (bank->base != SAMD_FLASH) {
LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32 LOG_ERROR("Address " TARGET_ADDR_FMT " invalid bank address (try "
"[same5] )", "0x%08" PRIx32 "[same5] )", bank->base, SAMD_FLASH);
bank->base, SAMD_FLASH);
return ERROR_FAIL; return ERROR_FAIL;
} }
......
...@@ -404,9 +404,9 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer, ...@@ -404,9 +404,9 @@ static int bluenrgx_write(struct flash_bank *bank, const uint8_t *buffer,
/* Stack pointer for program working area */ /* Stack pointer for program working area */
buf_set_u32(reg_params[4].value, 0, 32, write_algorithm_sp->address); buf_set_u32(reg_params[4].value, 0, 32, write_algorithm_sp->address);
LOG_DEBUG("source->address = %08" TARGET_PRIxADDR, source->address); LOG_DEBUG("source->address = " TARGET_ADDR_FMT, source->address);
LOG_DEBUG("source->address+ source->size = %08" TARGET_PRIxADDR, source->address+source->size); LOG_DEBUG("source->address+ source->size = " TARGET_ADDR_FMT, source->address+source->size);
LOG_DEBUG("write_algorithm_sp->address = %08" TARGET_PRIxADDR, write_algorithm_sp->address); LOG_DEBUG("write_algorithm_sp->address = " TARGET_ADDR_FMT, write_algorithm_sp->address);
LOG_DEBUG("address = %08x", address+pre_size); LOG_DEBUG("address = %08x", address+pre_size);
LOG_DEBUG("count = %08x", count); LOG_DEBUG("count = %08x", count);
......
...@@ -889,8 +889,8 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) ...@@ -889,8 +889,8 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" LOG_ERROR("couldn't erase block %i of flash bank at base "
PRIx32, i, bank->base); TARGET_ADDR_FMT, i, bank->base);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
} }
...@@ -937,8 +937,8 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) ...@@ -937,8 +937,8 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" LOG_ERROR("couldn't erase block %i of flash bank at base "
PRIx32, i, bank->base); TARGET_ADDR_FMT, i, bank->base);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
} }
...@@ -2001,8 +2001,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t ...@@ -2001,8 +2001,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address 0x%" PRIx32, LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT
bank->base, address); ", address 0x%" PRIx32,
bank->base, address);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
...@@ -2026,9 +2027,9 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, ...@@ -2026,9 +2027,9 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
/* Check for valid range */ /* Check for valid range */
if (address & buffermask) { if (address & buffermask) {
LOG_ERROR("Write address at base 0x%" PRIx32 ", address 0x%" PRIx32 LOG_ERROR("Write address at base " TARGET_ADDR_FMT ", address 0x%"
" not aligned to 2^%d boundary", PRIx32 " not aligned to 2^%d boundary",
bank->base, address, cfi_info->max_buf_write_size); bank->base, address, cfi_info->max_buf_write_size);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
...@@ -2056,7 +2057,8 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, ...@@ -2056,7 +2057,8 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
return retval; return retval;
LOG_ERROR( LOG_ERROR(
"couldn't start buffer write operation at base 0x%" PRIx32 ", address 0x%" PRIx32, "couldn't start buffer write operation at base " TARGET_ADDR_FMT
", address 0x%" PRIx32,
bank->base, bank->base,
address); address);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
...@@ -2085,7 +2087,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word, ...@@ -2085,7 +2087,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("Buffer write at base 0x%" PRIx32 LOG_ERROR("Buffer write at base " TARGET_ADDR_FMT
", address 0x%" PRIx32 " failed.", bank->base, address); ", address 0x%" PRIx32 " failed.", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
...@@ -2121,7 +2123,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3 ...@@ -2121,7 +2123,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("couldn't write word at base 0x%" PRIx32 LOG_ERROR("couldn't write word at base " TARGET_ADDR_FMT
", address 0x%" PRIx32, bank->base, address); ", address 0x%" PRIx32, bank->base, address);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
} }
...@@ -2147,7 +2149,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word ...@@ -2147,7 +2149,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word
/* Check for valid range */ /* Check for valid range */
if (address & buffermask) { if (address & buffermask) {
LOG_ERROR("Write address at base 0x%" PRIx32 LOG_ERROR("Write address at base " TARGET_ADDR_FMT
", address 0x%" PRIx32 " not aligned to 2^%d boundary", ", address 0x%" PRIx32 " not aligned to 2^%d boundary",
bank->base, address, cfi_info->max_buf_write_size); bank->base, address, cfi_info->max_buf_write_size);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
...@@ -2193,7 +2195,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word ...@@ -2193,7 +2195,7 @@ static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
LOG_ERROR("couldn't write block at base 0x%" PRIx32 LOG_ERROR("couldn't write block at base " TARGET_ADDR_FMT
", address 0x%" PRIx32 ", size 0x%" PRIx32, bank->base, address, ", address 0x%" PRIx32 ", size 0x%" PRIx32, bank->base, address,
bufferwsize); bufferwsize);
return ERROR_FLASH_OPERATION_FAILED; return ERROR_FLASH_OPERATION_FAILED;
......
...@@ -99,7 +99,8 @@ int flash_driver_write(struct flash_bank *bank, ...@@ -99,7 +99,8 @@ int flash_driver_write(struct flash_bank *bank,
retval = bank->driver->write(bank, buffer, offset, count); retval = bank->driver->write(bank, buffer, offset, count);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR( LOG_ERROR(
"error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32, "error writing to flash at address " TARGET_ADDR_FMT
" at offset 0x%8.8" PRIx32,
bank->base, bank->base,
offset); offset);
} }
...@@ -117,7 +118,8 @@ int flash_driver_read(struct flash_bank *bank, ...@@ -117,7 +118,8 @@ int flash_driver_read(struct flash_bank *bank,
retval = bank->driver->read(bank, buffer, offset, count); retval = bank->driver->read(bank, buffer, offset, count);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR( LOG_ERROR(
"error reading to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32, "error reading to flash at address " TARGET_ADDR_FMT
" at offset 0x%8.8" PRIx32,
bank->base, bank->base,
offset); offset);
} }
...@@ -268,7 +270,7 @@ int get_flash_bank_by_num(int num, struct flash_bank **bank) ...@@ -268,7 +270,7 @@ int get_flash_bank_by_num(int num, struct flash_bank **bank)
/* lookup flash bank by address, bank not found is success, but /* lookup flash bank by address, bank not found is success, but
* result_bank is set to NULL. */ * result_bank is set to NULL. */
int get_flash_bank_by_addr(struct target *target, int get_flash_bank_by_addr(struct target *target,
uint32_t addr, target_addr_t addr,
bool check, bool check,
struct flash_bank **result_bank) struct flash_bank **result_bank)
{ {
...@@ -294,7 +296,7 @@ int get_flash_bank_by_addr(struct target *target, ...@@ -294,7 +296,7 @@ int get_flash_bank_by_addr(struct target *target,
} }
*result_bank = NULL; *result_bank = NULL;
if (check) { if (check) {
LOG_ERROR("No flash at address 0x%08" PRIx32, addr); LOG_ERROR("No flash at address " TARGET_ADDR_FMT, addr);
return ERROR_FAIL; return ERROR_FAIL;
} }
return ERROR_OK; return ERROR_OK;
...@@ -414,13 +416,13 @@ int default_flash_blank_check(struct flash_bank *bank) ...@@ -414,13 +416,13 @@ int default_flash_blank_check(struct flash_bank *bank)
* warning about those additions. * warning about those additions.
*/ */
static int flash_iterate_address_range_inner(struct target *target, static int flash_iterate_address_range_inner(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length, char *pad_reason, target_addr_t addr, uint32_t length,
bool iterate_protect_blocks, bool iterate_protect_blocks,
int (*callback)(struct flash_bank *bank, int first, int last)) int (*callback)(struct flash_bank *bank, int first, int last))
{ {
struct flash_bank *c; struct flash_bank *c;
struct flash_sector *block_array; struct flash_sector *block_array;
uint32_t last_addr = addr + length; /* first address AFTER end */ target_addr_t last_addr = addr + length; /* first address AFTER end */
int first = -1; int first = -1;
int last = -1; int last = -1;
int i; int i;
...@@ -491,10 +493,10 @@ static int flash_iterate_address_range_inner(struct target *target, ...@@ -491,10 +493,10 @@ static int flash_iterate_address_range_inner(struct target *target,
else if (addr < end && pad_reason) { else if (addr < end && pad_reason) {
/* FIXME say how many bytes (e.g. 80 KB) */ /* FIXME say how many bytes (e.g. 80 KB) */
LOG_WARNING("Adding extra %s range, " LOG_WARNING("Adding extra %s range, "
"%#8.8x to %#8.8x", "%#8.8x to " TARGET_ADDR_FMT,
pad_reason, pad_reason,
(unsigned) f->offset, (unsigned) f->offset,
(unsigned) addr - 1); addr - 1);
first = i; first = i;
} else } else
continue; continue;
...@@ -527,10 +529,10 @@ static int flash_iterate_address_range_inner(struct target *target, ...@@ -527,10 +529,10 @@ static int flash_iterate_address_range_inner(struct target *target,
/* invalid start or end address? */ /* invalid start or end address? */
if (first == -1 || last == -1) { if (first == -1 || last == -1) {
LOG_ERROR("address range 0x%8.8x .. 0x%8.8x " LOG_ERROR("address range " TARGET_ADDR_FMT " .. " TARGET_ADDR_FMT
"is not sector-aligned", " is not sector-aligned",
(unsigned) (c->base + addr), c->base + addr,
(unsigned) (c->base + last_addr - 1)); c->base + last_addr - 1);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT; return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
} }
...@@ -545,7 +547,7 @@ static int flash_iterate_address_range_inner(struct target *target, ...@@ -545,7 +547,7 @@ static int flash_iterate_address_range_inner(struct target *target,
* multiple chips. * multiple chips.
*/ */
static int flash_iterate_address_range(struct target *target, static int flash_iterate_address_range(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length, char *pad_reason, target_addr_t addr, uint32_t length,
bool iterate_protect_blocks, bool iterate_protect_blocks,
int (*callback)(struct flash_bank *bank, int first, int last)) int (*callback)(struct flash_bank *bank, int first, int last))
{ {
...@@ -579,7 +581,7 @@ static int flash_iterate_address_range(struct target *target, ...@@ -579,7 +581,7 @@ static int flash_iterate_address_range(struct target *target,
} }
int flash_erase_address_range(struct target *target, int flash_erase_address_range(struct target *target,
bool pad, uint32_t addr, uint32_t length) bool pad, target_addr_t addr, uint32_t length)
{ {
return flash_iterate_address_range(target, pad ? "erase" : NULL, return flash_iterate_address_range(target, pad ? "erase" : NULL,
addr, length, false, &flash_driver_erase); addr, length, false, &flash_driver_erase);
...@@ -590,7 +592,8 @@ static int flash_driver_unprotect(struct flash_bank *bank, int first, int last) ...@@ -590,7 +592,8 @@ static int flash_driver_unprotect(struct flash_bank *bank, int first, int last)
return flash_driver_protect(bank, 0, first, last); return flash_driver_protect(bank, 0, first, last);
} }
int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t length) int flash_unlock_address_range(struct target *target, target_addr_t addr,
uint32_t length)
{ {
/* By default, pad to sector boundaries ... the real issue here /* By default, pad to sector boundaries ... the real issue here
* is that our (only) caller *permanently* removes protection, * is that our (only) caller *permanently* removes protection,
......
...@@ -91,7 +91,7 @@ struct flash_bank { ...@@ -91,7 +91,7 @@ struct flash_bank {
void *driver_priv; /**< Private driver storage pointer */ void *driver_priv; /**< Private driver storage pointer */
int bank_number; /**< The 'bank' (or chip number) of this instance. */ int bank_number; /**< The 'bank' (or chip number) of this instance. */
uint32_t base; /**< The base address of this bank */ target_addr_t base; /**< The base address of this bank */
uint32_t size; /**< The size of this chip bank, in bytes */ uint32_t size; /**< The size of this chip bank, in bytes */
int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */ int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */
...@@ -149,9 +149,9 @@ int flash_register_commands(struct command_context *cmd_ctx); ...@@ -149,9 +149,9 @@ int flash_register_commands(struct command_context *cmd_ctx);
* @returns ERROR_OK if successful; otherwise, an error code. * @returns ERROR_OK if successful; otherwise, an error code.
*/ */
int flash_erase_address_range(struct target *target, int flash_erase_address_range(struct target *target,
bool pad, uint32_t addr, uint32_t length); bool pad, target_addr_t addr, uint32_t length);
int flash_unlock_address_range(struct target *target, uint32_t addr, int flash_unlock_address_range(struct target *target, target_addr_t addr,
uint32_t length); uint32_t length);
/** /**
...@@ -263,7 +263,7 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num); ...@@ -263,7 +263,7 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num);
* @param check return ERROR_OK and result_bank NULL if the bank does not exist * @param check return ERROR_OK and result_bank NULL if the bank does not exist
* @returns The struct flash_bank located at @a addr, or NULL. * @returns The struct flash_bank located at @a addr, or NULL.
*/ */
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check, int get_flash_bank_by_addr(struct target *target, target_addr_t addr, bool check,
struct flash_bank **result_bank); struct flash_bank **result_bank);
/** /**
* Allocate and fill an array of sectors or protection blocks. * Allocate and fill an array of sectors or protection blocks.
......
...@@ -162,7 +162,7 @@ FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command) ...@@ -162,7 +162,7 @@ FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command)
int temp; int temp;
COMMAND_PARSE_NUMBER(int, CMD_ARGV[6], temp); COMMAND_PARSE_NUMBER(int, CMD_ARGV[6], temp);
fespi_info->ctrl_base = (uint32_t) temp; fespi_info->ctrl_base = (uint32_t) temp;
LOG_DEBUG("ASSUMING FESPI device at ctrl_base = 0x%" TARGET_PRIxADDR, LOG_DEBUG("ASSUMING FESPI device at ctrl_base = " TARGET_ADDR_FMT,
fespi_info->ctrl_base); fespi_info->ctrl_base);
} }
...@@ -176,7 +176,7 @@ static int fespi_read_reg(struct flash_bank *bank, uint32_t *value, target_addr_ ...@@ -176,7 +176,7 @@ static int fespi_read_reg(struct flash_bank *bank, uint32_t *value, target_addr_
int result = target_read_u32(target, fespi_info->ctrl_base + address, value); int result = target_read_u32(target, fespi_info->ctrl_base + address, value);
if (result != ERROR_OK) { if (result != ERROR_OK) {
LOG_ERROR("fespi_read_reg() error at 0x%" TARGET_PRIxADDR, LOG_ERROR("fespi_read_reg() error at " TARGET_ADDR_FMT,
fespi_info->ctrl_base + address); fespi_info->ctrl_base + address);
return result; return result;
} }
...@@ -190,7 +190,7 @@ static int fespi_write_reg(struct flash_bank *bank, target_addr_t address, uint3 ...@@ -190,7 +190,7 @@ static int fespi_write_reg(struct flash_bank *bank, target_addr_t address, uint3
int result = target_write_u32(target, fespi_info->ctrl_base + address, value); int result = target_write_u32(target, fespi_info->ctrl_base + address, value);
if (result != ERROR_OK) { if (result != ERROR_OK) {
LOG_ERROR("fespi_write_reg() error writing 0x%x to 0x%" TARGET_PRIxADDR, LOG_ERROR("fespi_write_reg() error writing 0x%x to " TARGET_ADDR_FMT,
value, fespi_info->ctrl_base + address); value, fespi_info->ctrl_base + address);
return result; return result;
} }
...@@ -709,7 +709,7 @@ static int steps_execute(struct algorithm_steps *as, ...@@ -709,7 +709,7 @@ static int steps_execute(struct algorithm_steps *as,
data_buf); data_buf);
free(data_buf); free(data_buf);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR("Failed to write data to 0x%" TARGET_PRIxADDR ": %d", LOG_ERROR("Failed to write data to " TARGET_ADDR_FMT ": %d",
data_wa->address, retval); data_wa->address, retval);
goto exit; goto exit;
} }
...@@ -718,7 +718,7 @@ static int steps_execute(struct algorithm_steps *as, ...@@ -718,7 +718,7 @@ static int steps_execute(struct algorithm_steps *as,
algorithm_wa->address, algorithm_wa->address + 4, algorithm_wa->address, algorithm_wa->address + 4,
10000, NULL); 10000, NULL);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d", LOG_ERROR("Failed to execute algorithm at " TARGET_ADDR_FMT ": %d",
algorithm_wa->address, retval); algorithm_wa->address, retval);
goto exit; goto exit;
} }
...@@ -775,7 +775,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer, ...@@ -775,7 +775,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_write_buffer(target, algorithm_wa->address, retval = target_write_buffer(target, algorithm_wa->address,
sizeof(algorithm_bin), algorithm_bin); sizeof(algorithm_bin), algorithm_bin);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR("Failed to write code to 0x%" TARGET_PRIxADDR ": %d", LOG_ERROR("Failed to write code to " TARGET_ADDR_FMT ": %d",
algorithm_wa->address, retval); algorithm_wa->address, retval);
target_free_working_area(target, algorithm_wa); target_free_working_area(target, algorithm_wa);
algorithm_wa = NULL; algorithm_wa = NULL;
...@@ -935,12 +935,13 @@ static int fespi_probe(struct flash_bank *bank) ...@@ -935,12 +935,13 @@ static int fespi_probe(struct flash_bank *bank)
fespi_info->ctrl_base = target_device->ctrl_base; fespi_info->ctrl_base = target_device->ctrl_base;
LOG_DEBUG("Valid FESPI on device %s at address 0x%" PRIx32, LOG_DEBUG("Valid FESPI on device %s at address " TARGET_ADDR_FMT,
target_device->name, bank->base); target_device->name, bank->base);
} else { } else {
LOG_DEBUG("Assuming FESPI as specified at address 0x%" TARGET_PRIxADDR LOG_DEBUG("Assuming FESPI as specified at address " TARGET_ADDR_FMT
" with ctrl at 0x%x", fespi_info->ctrl_base, bank->base); " with ctrl at " TARGET_ADDR_FMT, fespi_info->ctrl_base,
bank->base);
} }
/* read and decode flash ID; returns in SW mode */ /* read and decode flash ID; returns in SW mode */
......
...@@ -272,7 +272,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, ...@@ -272,7 +272,7 @@ static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2); uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2);
uint32_t addr = bank->base + offset; uint32_t addr = bank->base + offset;
LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" TARGET_PRIxADDR, LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT,
MIN(halfwords * 2, byte_count), data_workarea->address); MIN(halfwords * 2, byte_count), data_workarea->address);
retval = target_write_buffer(target, data_workarea->address, retval = target_write_buffer(target, data_workarea->address,
......
...@@ -1755,13 +1755,15 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer ...@@ -1755,13 +1755,15 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer
result = target_write_memory(bank->target, k_chip->progr_accel_ram, result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer_aligned); 4, size_aligned / 4, buffer_aligned);
LOG_DEBUG("section @ %08" PRIx32 " aligned begin %" PRIu32 ", end %" PRIu32, LOG_DEBUG("section @ " TARGET_ADDR_FMT " aligned begin %" PRIu32
", end %" PRIu32,
bank->base + offset, align_begin, align_end); bank->base + offset, align_begin, align_end);
} else } else
result = target_write_memory(bank->target, k_chip->progr_accel_ram, result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer); 4, size_aligned / 4, buffer);
LOG_DEBUG("write section @ %08" PRIx32 " with length %" PRIu32 " bytes", LOG_DEBUG("write section @ " TARGET_ADDR_FMT " with length %" PRIu32
" bytes",
bank->base + offset, size); bank->base + offset, size);
if (result != ERROR_OK) { if (result != ERROR_OK) {
...@@ -1776,12 +1778,14 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer ...@@ -1776,12 +1778,14 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer
0, 0, 0, 0, &ftfx_fstat); 0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) { if (result != ERROR_OK) {
LOG_ERROR("Error writing section at %08" PRIx32, bank->base + offset); LOG_ERROR("Error writing section at " TARGET_ADDR_FMT,
bank->base + offset);
break; break;
} }