Commit aea22bdb authored by Aaron Carroll's avatar Aaron Carroll Committed by Øyvind Harboe
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Add '-coreid' target option to support multiple cores per TAP.



ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
to both cores.  The '-coreid' option selects which core the target
should connect to.

Note that at present, OpenOCD can connect to either core, but not both
simulatenously, until ADI contexts can be shared.
Signed-off-by: default avatarAaron Carroll <aaronc@cse.unsw.edu.au>
parent 3fa99ed2
......@@ -3660,6 +3660,7 @@ enum target_cfg_param {
TCFG_WORK_AREA_BACKUP,
TCFG_ENDIAN,
TCFG_VARIANT,
TCFG_COREID,
TCFG_CHAIN_POSITION,
};
......@@ -3672,6 +3673,7 @@ static Jim_Nvp nvp_config_opts[] = {
{ .name = "-work-area-backup", .value = TCFG_WORK_AREA_BACKUP },
{ .name = "-endian" , .value = TCFG_ENDIAN },
{ .name = "-variant", .value = TCFG_VARIANT },
{ .name = "-coreid", .value = TCFG_COREID },
{ .name = "-chain-position", .value = TCFG_CHAIN_POSITION },
{ .name = NULL, .value = -1 }
......@@ -3924,6 +3926,23 @@ static int target_configure(Jim_GetOptInfo *goi, struct target *target)
Jim_SetResultString(goi->interp, target->variant,-1);
/* loop for more */
break;
case TCFG_COREID:
if (goi->isconfigure) {
e = Jim_GetOpt_Wide(goi, &w);
if (e != JIM_OK) {
return e;
}
target->coreid = (int)w;
} else {
if (goi->argc != 0) {
goto no_params;
}
}
Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, target->working_area_size));
/* loop for more */
break;
case TCFG_CHAIN_POSITION:
if (goi->isconfigure) {
Jim_Obj *o_t;
......@@ -4634,6 +4653,9 @@ static int target_create(Jim_GetOptInfo *goi)
/* will be set by "-endian" */
target->endianness = TARGET_ENDIAN_UNKNOWN;
/* default to first core, override with -coreid */
target->coreid = 0;
target->working_area = 0x0;
target->working_area_size = 0x0;
target->working_areas = NULL;
......
......@@ -107,6 +107,7 @@ struct target
const char *cmd_name; /* tcl Name of target */
int target_number; /* DO NOT USE! field to be removed in 2010 */
struct jtag_tap *tap; /* where on the jtag chain is this */
int coreid; /* which device on the TAP? */
const char *variant; /* what variant of this chip is it? */
/**
......
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