Commit a3035243 authored by oharboe's avatar oharboe
Browse files

unsik Kim <donari75@gmail.com> - mflash support

git-svn-id: svn://svn.berlios.de/openocd/trunk@1067 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 2d07883d
......@@ -717,6 +717,26 @@ Use the standard str9 driver for programming.
@b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
@*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
@section mFlash configuration
@cindex mFlash configuration
@itemize @bullet
@item @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
<@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
@cindex mflash bank
Configures a mflash for <@var{soc}> host bank at <@var{base}>. <@var{chip_width}> and
<@var{bus_width}> are bytes order. Pin number format is dependent on host GPIO calling convention.
If WP or DPD pin was not used, write -1. Currently, mflash bank support s3c2440 and pxa270.
@end itemize
(ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
@smallexample
mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
@end smallexample
(ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
@smallexample
mflash bank pxa270 0x08000000 2 2 43 -1 51 0
@end smallexample
@node Target library
@chapter Target library
@cindex Target library
......@@ -944,6 +964,22 @@ if the @option{erase} parameter is given.
<@var{last}> of @option{flash bank} <@var{num}>.
@end itemize
@subsection mFlash commands
@cindex mFlash commands
@itemize @bullet
@item @b{mflash probe}
@cindex mflash probe
Probe mflash.
@item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
@cindex mflash write
Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
<@var{offset}> bytes from the beginning of the bank.
@item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
@cindex mflash dump
Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
to a <@var{file}>.
@end itemize
@page
@section Target Specific Commands
@cindex Target Specific Commands
......@@ -1049,7 +1085,7 @@ These are flash specific commands when using the stm32x driver.
@subsection Stellaris specific commands
@cindex Stellaris specific commands
These are flash specific commands when using the Stellaris driver.
@itemize @bullet
@item @b{stellaris mass_erase} <@var{num}>
......
......@@ -4,6 +4,6 @@ METASOURCES = AUTO
noinst_LIBRARIES = libflash.a
libflash_a_SOURCES = flash.c lpc2000.c cfi.c non_cfi.c at91sam7.c at91sam7_old.c str7x.c str9x.c aduc702x.c nand.c lpc3180_nand_controller.c \
stellaris.c str9xpec.c stm32x.c tms470.c ecos.c \
s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c
s3c24xx_nand.c s3c2410_nand.c s3c2412_nand.c s3c2440_nand.c s3c2443_nand.c lpc288x.c ocl.c mflash.c
noinst_HEADERS = flash.h lpc2000.h cfi.h non_cfi.h at91sam7.h at91sam7_old.h str7x.h str9x.h nand.h lpc3180_nand_controller.h \
stellaris.h str9xpec.h stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h
stellaris.h str9xpec.h stm32x.h tms470.h s3c24xx_nand.h s3c24xx_regs_nand.h lpc288x.h mflash.h
This diff is collapsed.
/***************************************************************************
* Copyright (C) 2007-2008 by unsik Kim <donari75@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef _MFLASH_H
#define _MFLASH_H
typedef unsigned long mg_io_uint32;
typedef unsigned short mg_io_uint16;
typedef unsigned char mg_io_uint8;
typedef struct mflash_gpio_num_s
{
char port[2];
signed short num;
} mflash_gpio_num_t;
typedef struct mflash_gpio_drv_s
{
char *name;
int (*set_gpio_to_output) (mflash_gpio_num_t gpio);
int (*set_gpio_output_val) (mflash_gpio_num_t gpio, u8 val);
} mflash_gpio_drv_t;
typedef struct _mg_io_type_drv_info {
mg_io_uint16 general_configuration; // 00
mg_io_uint16 number_of_cylinders; // 01
mg_io_uint16 reserved1; // 02
mg_io_uint16 number_of_heads; // 03
mg_io_uint16 unformatted_bytes_per_track; // 04
mg_io_uint16 unformatted_bytes_per_sector; // 05
mg_io_uint16 sectors_per_track; // 06
mg_io_uint8 vendor_unique1[6]; // 07/08/09
mg_io_uint8 serial_number[20]; // 10~19
mg_io_uint16 buffer_type; // 20
mg_io_uint16 buffer_sector_size; // 21
mg_io_uint16 number_of_ecc_bytes; // 22
mg_io_uint8 firmware_revision[8]; // 23~26
mg_io_uint8 model_number[40]; // 27
mg_io_uint8 maximum_block_transfer; // 47 low byte
mg_io_uint8 vendor_unique2; // 47 high byte
mg_io_uint16 dword_io; // 48
mg_io_uint16 capabilities; // 49
mg_io_uint16 reserved2; // 50
mg_io_uint8 vendor_unique3; // 51 low byte
mg_io_uint8 pio_cycle_timing_mode; // 51 high byte
mg_io_uint8 vendor_unique4; // 52 low byte
mg_io_uint8 dma_cycle_timing_mode; // 52 high byte
mg_io_uint16 translation_fields_valid; // 53 (low bit)
mg_io_uint16 number_of_current_cylinders; // 54
mg_io_uint16 number_of_current_heads; // 55
mg_io_uint16 current_sectors_per_track; // 56
mg_io_uint16 current_sector_capacity_lo; // 57 & 58
mg_io_uint16 current_sector_capacity_hi; // 57 & 58
mg_io_uint8 multi_sector_count; // 59 low
mg_io_uint8 multi_sector_setting_valid; // 59 high (low bit)
mg_io_uint16 total_user_addressable_sectors_lo; // 60 & 61
mg_io_uint16 total_user_addressable_sectors_hi; // 60 & 61
mg_io_uint8 single_dma_modes_supported; // 62 low byte
mg_io_uint8 single_dma_transfer_active; // 62 high byte
mg_io_uint8 multi_dma_modes_supported; // 63 low byte
mg_io_uint8 multi_dma_transfer_active; // 63 high byte
mg_io_uint16 adv_pio_mode;
mg_io_uint16 min_dma_cyc;
mg_io_uint16 recommend_dma_cyc;
mg_io_uint16 min_pio_cyc_no_iordy;
mg_io_uint16 min_pio_cyc_with_iordy;
mg_io_uint8 reserved3[22];
mg_io_uint16 major_ver_num;
mg_io_uint16 minor_ver_num;
mg_io_uint16 feature_cmd_set_suprt0;
mg_io_uint16 feature_cmd_set_suprt1;
mg_io_uint16 feature_cmd_set_suprt2;
mg_io_uint16 feature_cmd_set_en0;
mg_io_uint16 feature_cmd_set_en1;
mg_io_uint16 feature_cmd_set_en2;
mg_io_uint16 reserved4;
mg_io_uint16 req_time_for_security_er_done;
mg_io_uint16 req_time_for_enhan_security_er_done;
mg_io_uint16 adv_pwr_mgm_lvl_val;
mg_io_uint16 reserved5;
mg_io_uint16 re_of_hw_rst;
mg_io_uint8 reserved6[68];
mg_io_uint16 security_stas;
mg_io_uint8 vendor_uniq_bytes[62];
mg_io_uint16 cfa_pwr_mode;
mg_io_uint8 reserved7[186];
mg_io_uint16 scts_per_secure_data_unit;
mg_io_uint16 integrity_word;
} mg_io_type_drv_info;
typedef struct mg_drv_info_s {
mg_io_type_drv_info drv_id;
u32 tot_sects;
} mg_drv_info_t;
typedef struct mflash_bank_s
{
u32 base;
u32 chip_width;
u32 bus_width;
mflash_gpio_num_t rst_pin;
mflash_gpio_num_t wp_pin;
mflash_gpio_num_t dpd_pin;
mflash_gpio_drv_t *gpio_drv;
target_t *target;
mg_drv_info_t *drv_info;
u8 proved;
} mflash_bank_t;
extern int mflash_register_commands(struct command_context_s *cmd_ctx);
extern int mflash_init_drivers(struct command_context_s *cmd_ctx);
#define MG_MFLASH_SECTOR_SIZE (0x200) //512Bytes = 2^9
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
#define MG_BUFFER_OFFSET 0x8000
#define MG_REG_OFFSET 0xC000
#define MG_REG_FEATURE 0x2 // write case
#define MG_REG_ERROR 0x2 // read case
#define MG_REG_SECT_CNT 0x4
#define MG_REG_SECT_NUM 0x6
#define MG_REG_CYL_LOW 0x8
#define MG_REG_CYL_HIGH 0xA
#define MG_REG_DRV_HEAD 0xC
#define MG_REG_COMMAND 0xE // write case
#define MG_REG_STATUS 0xE // read case
#define MG_REG_DRV_CTRL 0x10
#define MG_REG_BURST_CTRL 0x12
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 // msec
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 // msec
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 // msec
typedef enum _mg_io_type_wait{
mg_io_wait_bsy = 1,
mg_io_wait_not_bsy = 2,
mg_io_wait_rdy = 3,
mg_io_wait_drq = 4, // wait for data request
mg_io_wait_drq_noerr = 5, // wait for DRQ but ignore the error status bit
mg_io_wait_rdy_noerr = 6 // wait for ready, but ignore error status bit
} mg_io_type_wait;
//= "Status Register" bit masks.
typedef enum _mg_io_type_rbit_status{
mg_io_rbit_status_error = 0x01, // error bit in status register
mg_io_rbit_status_corrected_error = 0x04, // corrected error in status register
mg_io_rbit_status_data_req = 0x08, // data request bit in status register
mg_io_rbit_status_seek_done = 0x10, // DSC - Drive Seek Complete
mg_io_rbit_status_write_fault = 0x20, // DWF - Drive Write Fault
mg_io_rbit_status_ready = 0x40,
mg_io_rbit_status_busy = 0x80
} mg_io_type_rbit_status;
//= "Error Register" bit masks.
typedef enum _mg_io_type_rbit_error{
mg_io_rbit_err_general = 0x01,
mg_io_rbit_err_aborted = 0x04,
mg_io_rbit_err_bad_sect_num = 0x10,
mg_io_rbit_err_uncorrectable = 0x40,
mg_io_rbit_err_bad_block = 0x80
} mg_io_type_rbit_error;
//= "Device Control Register" bit.
typedef enum _mg_io_type_rbit_devc{
mg_io_rbit_devc_intr = 0x02,// interrupt enable bit (1:disable, 0:enable)
mg_io_rbit_devc_srst = 0x04 // softwrae reset bit (1:assert, 0:de-assert)
} mg_io_type_rbit_devc;
// "Drive Select/Head Register" values.
typedef enum _mg_io_type_rval_dev{
mg_io_rval_dev_must_be_on = 0x80, // These 1 bits are always on
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on),// Master
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on),// Slave0
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on),// Slave1
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on),// Slave2
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
} mg_io_type_rval_dev;
typedef enum _mg_io_type_cmd
{
mg_io_cmd_read =0x20,
mg_io_cmd_write =0x30,
mg_io_cmd_setmul =0xC6,
mg_io_cmd_readmul =0xC4,
mg_io_cmd_writemul =0xC5,
mg_io_cmd_idle =0x97,//0xE3
mg_io_cmd_idle_immediate =0x95,//0xE1
mg_io_cmd_setsleep =0x99,//0xE6
mg_io_cmd_stdby =0x96,//0xE2
mg_io_cmd_stdby_immediate =0x94,//0xE0
mg_io_cmd_identify =0xEC,
mg_io_cmd_set_feature =0xEF,
mg_io_cmd_confirm_write =0x3C,
mg_io_cmd_confirm_read =0x40,
mg_io_cmd_wakeup =0xC3
} mg_io_type_cmd;
#endif
......@@ -39,6 +39,7 @@
#include "flash.h"
#include "nand.h"
#include "pld.h"
#include "mflash.h"
#include "command.h"
#include "server.h"
......@@ -70,7 +71,7 @@ void print_version(void)
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */
/* DANGER!!! make sure that the line below does not appear in a patch, do not remove */
LOG_OUTPUT("$URL$\n");
LOG_OUTPUT( "$URL$\n");
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */
......@@ -78,6 +79,14 @@ void print_version(void)
/* DANGER!!! make sure that the line above does not appear in a patch, do not remove */
}
/* Give TELNET a way to find out what version this is */
int handle_version_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
......@@ -145,6 +154,10 @@ int handle_init_command(struct command_context_s *cmd_ctx, char *cmd, char **arg
return ERROR_FAIL;
LOG_DEBUG("flash init complete");
if (mflash_init_drivers(cmd_ctx) != ERROR_OK)
return ERROR_FAIL;
LOG_DEBUG("mflash init complete");
if (nand_init(cmd_ctx) != ERROR_OK)
return ERROR_FAIL;
LOG_DEBUG("NAND init complete");
......@@ -189,7 +202,8 @@ command_context_t *setup_command_handler(void)
flash_register_commands(cmd_ctx);
nand_register_commands(cmd_ctx);
pld_register_commands(cmd_ctx);
mflash_register_commands(cmd_ctx);
if (log_init(cmd_ctx) != ERROR_OK)
{
exit(-1);
......@@ -216,7 +230,7 @@ int openocd_main(int argc, char *argv[])
cmd_ctx = setup_command_handler();
LOG_OUTPUT("\n\nBUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS\n\n\n");
LOG_OUTPUT( "\n\nBUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS\n\n\n");
print_version();
......
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