Commit 9ab9786f authored by duane's avatar duane
Browse files

Refactor code, create target_state_name()

git-svn-id: svn://svn.berlios.de/openocd/trunk@2409 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 78c0e873
...@@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target) ...@@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target)
arm11_common_t * arm11 = target->arch_info; arm11_common_t * arm11 = target->arch_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state == TARGET_UNKNOWN) if (target->state == TARGET_UNKNOWN)
{ {
...@@ -789,7 +789,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han ...@@ -789,7 +789,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
arm11_common_t * arm11 = target->arch_info; arm11_common_t * arm11 = target->arch_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state != TARGET_HALTED) if (target->state != TARGET_HALTED)
...@@ -889,7 +889,7 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl ...@@ -889,7 +889,7 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
FNC_INFO; FNC_INFO;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state != TARGET_HALTED) if (target->state != TARGET_HALTED)
{ {
...@@ -1035,7 +1035,7 @@ int arm11_deassert_reset(struct target_s *target) ...@@ -1035,7 +1035,7 @@ int arm11_deassert_reset(struct target_s *target)
#if 0 #if 0
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
/* deassert reset lines */ /* deassert reset lines */
......
...@@ -992,7 +992,7 @@ int arm7_9_assert_reset(target_t *target) ...@@ -992,7 +992,7 @@ int arm7_9_assert_reset(target_t *target)
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name); target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config(); enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST)) if (!(jtag_reset_config & RESET_HAS_SRST))
...@@ -1062,7 +1062,7 @@ int arm7_9_deassert_reset(target_t *target) ...@@ -1062,7 +1062,7 @@ int arm7_9_deassert_reset(target_t *target)
{ {
int retval = ERROR_OK; int retval = ERROR_OK;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name); target_state_name(target));
/* deassert reset lines */ /* deassert reset lines */
jtag_add_reset(0, 0); jtag_add_reset(0, 0);
...@@ -1275,7 +1275,7 @@ int arm7_9_halt(target_t *target) ...@@ -1275,7 +1275,7 @@ int arm7_9_halt(target_t *target)
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name); target_state_name(target));
if (target->state == TARGET_HALTED) if (target->state == TARGET_HALTED)
{ {
......
...@@ -444,7 +444,7 @@ int cortex_m3_debug_entry(target_t *target) ...@@ -444,7 +444,7 @@ int cortex_m3_debug_entry(target_t *target)
LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s", LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
armv7m_mode_strings[armv7m->core_mode], armv7m_mode_strings[armv7m->core_mode],
*(uint32_t*)(armv7m->core_cache->reg_list[15].value), *(uint32_t*)(armv7m->core_cache->reg_list[15].value),
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (armv7m->post_debug_entry) if (armv7m->post_debug_entry)
armv7m->post_debug_entry(target); armv7m->post_debug_entry(target);
...@@ -520,7 +520,7 @@ int cortex_m3_poll(target_t *target) ...@@ -520,7 +520,7 @@ int cortex_m3_poll(target_t *target)
#if 0 #if 0
/* Read Debug Fault Status Register, added to figure out the lockup when running flashtest.script */ /* Read Debug Fault Status Register, added to figure out the lockup when running flashtest.script */
mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr); mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, target_state_name(target));
#endif #endif
return ERROR_OK; return ERROR_OK;
...@@ -529,7 +529,7 @@ int cortex_m3_poll(target_t *target) ...@@ -529,7 +529,7 @@ int cortex_m3_poll(target_t *target)
int cortex_m3_halt(target_t *target) int cortex_m3_halt(target_t *target)
{ {
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state == TARGET_HALTED) if (target->state == TARGET_HALTED)
{ {
...@@ -753,7 +753,7 @@ int cortex_m3_assert_reset(target_t *target) ...@@ -753,7 +753,7 @@ int cortex_m3_assert_reset(target_t *target)
int assert_srst = 1; int assert_srst = 1;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config(); enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST)) if (!(jtag_reset_config & RESET_HAS_SRST))
...@@ -864,7 +864,7 @@ int cortex_m3_assert_reset(target_t *target) ...@@ -864,7 +864,7 @@ int cortex_m3_assert_reset(target_t *target)
int cortex_m3_deassert_reset(target_t *target) int cortex_m3_deassert_reset(target_t *target)
{ {
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
/* deassert reset lines */ /* deassert reset lines */
jtag_add_reset(0, 0); jtag_add_reset(0, 0);
......
...@@ -148,7 +148,7 @@ int mips_m4k_debug_entry(target_t *target) ...@@ -148,7 +148,7 @@ int mips_m4k_debug_entry(target_t *target)
LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s", LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
*(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value), *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
return ERROR_OK; return ERROR_OK;
} }
...@@ -220,7 +220,7 @@ int mips_m4k_halt(struct target_s *target) ...@@ -220,7 +220,7 @@ int mips_m4k_halt(struct target_s *target)
mips_ejtag_t *ejtag_info = &mips32->ejtag_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state == TARGET_HALTED) if (target->state == TARGET_HALTED)
{ {
...@@ -265,7 +265,7 @@ int mips_m4k_assert_reset(target_t *target) ...@@ -265,7 +265,7 @@ int mips_m4k_assert_reset(target_t *target)
mips_ejtag_t *ejtag_info = &mips32->ejtag_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config(); enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST)) if (!(jtag_reset_config & RESET_HAS_SRST))
...@@ -324,7 +324,7 @@ int mips_m4k_assert_reset(target_t *target) ...@@ -324,7 +324,7 @@ int mips_m4k_assert_reset(target_t *target)
int mips_m4k_deassert_reset(target_t *target) int mips_m4k_deassert_reset(target_t *target)
{ {
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
/* deassert reset lines */ /* deassert reset lines */
jtag_add_reset(0, 0); jtag_add_reset(0, 0);
......
...@@ -237,6 +237,18 @@ const Jim_Nvp nvp_reset_modes[] = { ...@@ -237,6 +237,18 @@ const Jim_Nvp nvp_reset_modes[] = {
{ .name = NULL , .value = -1 }, { .name = NULL , .value = -1 },
}; };
const char *
target_state_name( target_t *t )
{
const char *cp;
cp = Jim_Nvp_value2name_simple(nvp_target_state, t->state)->name;
if( !cp ){
LOG_ERROR("Invalid target state: %d", (int)(t->state));
cp = "(*BUG*unknown*BUG*)";
}
return cp;
}
static int max_target_number(void) static int max_target_number(void)
{ {
target_t *t; target_t *t;
...@@ -1085,8 +1097,7 @@ int target_arch_state(struct target_s *target) ...@@ -1085,8 +1097,7 @@ int target_arch_state(struct target_s *target)
return ERROR_OK; return ERROR_OK;
} }
LOG_USER("target state: %s", LOG_USER("target state: %s", target_state_name( target ));
Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name);
if (target->state != TARGET_HALTED) if (target->state != TARGET_HALTED)
return ERROR_OK; return ERROR_OK;
...@@ -1544,8 +1555,7 @@ DumpTargets: ...@@ -1544,8 +1555,7 @@ DumpTargets:
char marker = ' '; char marker = ' ';
if (target->tap->enabled) if (target->tap->enabled)
state = Jim_Nvp_value2name_simple(nvp_target_state, state = target_state_name( target );
target->state)->name;
else else
state = "tap-disabled"; state = "tap-disabled";
...@@ -4079,7 +4089,8 @@ static int tcl_target_func(Jim_Interp *interp, int argc, Jim_Obj *const *argv) ...@@ -4079,7 +4089,8 @@ static int tcl_target_func(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
return JIM_ERR; return JIM_ERR;
} }
Jim_SetResultString(goi.interp, Jim_SetResultString(goi.interp,
Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name,-1); target_state_name( target ),
-1);
return JIM_OK; return JIM_OK;
case TS_CMD_INVOKE_EVENT: case TS_CMD_INVOKE_EVENT:
if (goi.argc != 1) { if (goi.argc != 1) {
......
...@@ -42,7 +42,11 @@ struct command_context_s; ...@@ -42,7 +42,11 @@ struct command_context_s;
* TARGET_RESET = 3: the target is being held in reset (only a temporary state, * TARGET_RESET = 3: the target is being held in reset (only a temporary state,
* not sure how this is used with all the recent changes) * not sure how this is used with all the recent changes)
* TARGET_DEBUG_RUNNING = 4: the target is running, but it is executing code on * TARGET_DEBUG_RUNNING = 4: the target is running, but it is executing code on
* behalf of the debugger (e.g. algorithm for flashing) */ * behalf of the debugger (e.g. algorithm for flashing)
*
* also see: target_state_name();
*/
enum target_state enum target_state
{ {
...@@ -131,6 +135,7 @@ typedef struct target_s ...@@ -131,6 +135,7 @@ typedef struct target_s
struct working_area_s *working_areas;/* list of allocated working areas */ struct working_area_s *working_areas;/* list of allocated working areas */
enum target_debug_reason debug_reason;/* reason why the target entered debug state */ enum target_debug_reason debug_reason;/* reason why the target entered debug state */
enum target_endianess endianness; /* target endianess */ enum target_endianess endianness; /* target endianess */
// also see: target_state_name()
enum target_state state; /* the current backend-state (running, halted, ...) */ enum target_state state; /* the current backend-state (running, halted, ...) */
struct reg_cache_s *reg_cache; /* the first register cache of the target (core regs) */ struct reg_cache_s *reg_cache; /* the first register cache of the target (core regs) */
struct breakpoint_s *breakpoints; /* list of breakpoints */ struct breakpoint_s *breakpoints; /* list of breakpoints */
...@@ -357,6 +362,9 @@ extern int target_checksum_memory(struct target_s *target, uint32_t address, uin ...@@ -357,6 +362,9 @@ extern int target_checksum_memory(struct target_s *target, uint32_t address, uin
extern int target_blank_check_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t* blank); extern int target_blank_check_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t* blank);
extern int target_wait_state(target_t *target, enum target_state state, int ms); extern int target_wait_state(target_t *target, enum target_state state, int ms);
/** Return the *name* of this targets current state */
const char *target_state_name( target_t *target );
/* DANGER!!!!! /* DANGER!!!!!
* *
* if "area" passed in to target_alloc_working_area() points to a memory * if "area" passed in to target_alloc_working_area() points to a memory
......
...@@ -1202,7 +1202,7 @@ int xscale_halt(target_t *target) ...@@ -1202,7 +1202,7 @@ int xscale_halt(target_t *target)
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
if (target->state == TARGET_HALTED) if (target->state == TARGET_HALTED)
{ {
...@@ -1568,7 +1568,7 @@ int xscale_assert_reset(target_t *target) ...@@ -1568,7 +1568,7 @@ int xscale_assert_reset(target_t *target)
xscale_common_t *xscale = armv4_5->arch_info; xscale_common_t *xscale = armv4_5->arch_info;
LOG_DEBUG("target->state: %s", LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); target_state_name(target));
/* select DCSR instruction (set endstate to R-T-I to ensure we don't /* select DCSR instruction (set endstate to R-T-I to ensure we don't
* end up in T-L-R, which would reset JTAG * end up in T-L-R, which would reset JTAG
......
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