Commit 96f47822 authored by ntfreak's avatar ntfreak
Browse files

- added svn props for newly added files

git-svn-id: svn://svn.berlios.de/openocd/trunk@610 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent f8701ea7
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_speed 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#
# Calao Systems USB-A9260-C01
#
# http://www.calao-systems.com/
#
interface ft2232
ft2232_layout jtagkey
ft2232_device_desc "USB-A9260"
ft2232_vid_pid 0x0403 0x6010
script interface/calao-usb-a9260.cfg
script target/at91sam9260minimal.cfg
#
# Calao Systems USB-A9260-C01
#
# http://www.calao-systems.com/
#
interface ft2232
ft2232_layout jtagkey
ft2232_device_desc "USB-A9260"
ft2232_vid_pid 0x0403 0x6010
script interface/calao-usb-a9260.cfg
script target/at91sam9260minimal.cfg
#
# Calao Systems USB-A9260-C02
#
# http://www.calao-systems.com/
#
interface ft2232
ft2232_layout jtagkey
ft2232_device_desc "USB-A9260 A"
ft2232_vid_pid 0x0403 0x6001
script interface/calao-usb-a9260.cfg
script target/at91sam9260minimal.cfg
#
# Calao Systems USB-A9260-C02
#
# http://www.calao-systems.com/
#
interface ft2232
ft2232_layout jtagkey
ft2232_device_desc "USB-A9260 A"
ft2232_vid_pid 0x0403 0x6001
script interface/calao-usb-a9260.cfg
script target/at91sam9260minimal.cfg
#
# Calao Systems USB-A9260 common -C01 -C02 setup
#
# http://www.calao-systems.com/
#
# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg
#
# note: you must have an openocd version where jtag_speed sets two values
# trunk ver 606 contains the fix for this particular issue which can
# be seen if jtag_speed does not set two separate values
#
jtag_speed 1200 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#
# Calao Systems USB-A9260 common -C01 -C02 setup
#
# http://www.calao-systems.com/
#
# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg
#
# note: you must have an openocd version where jtag_speed sets two values
# trunk ver 606 contains the fix for this particular issue which can
# be seen if jtag_speed does not set two separate values
#
jtag_speed 1200 0
jtag_nsrst_delay 200
jtag_ntrst_delay 200
interface ft2232
ft2232_device_desc "STR9-comStick A"
ft2232_layout comstick
interface ft2232
ft2232_device_desc "STR9-comStick A"
ft2232_layout comstick
######################################
# Target: Atmel AT91SAM9260
######################################
reset_config trst_and_srst
#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 200
jtag_ntrst_delay 200
######################
# Target configuration
######################
#target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little reset_run 0 arm926ejs
run_and_halt_time 0 30
######################################
# Target: Atmel AT91SAM9260
######################################
reset_config trst_and_srst
#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 200
jtag_ntrst_delay 200
######################
# Target configuration
######################
#target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little reset_run 0 arm926ejs
run_and_halt_time 0 30
# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#target configuration
daemon_startup attach
#target <type> <endianess> <reset mode>
target arm920t little reset_halt 0
working_area 0 0x80014000 0x1000 backup
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x60000000 0x1000000 2 2 0
# Cirrus Logic EP9301 processor on an Olimex CS-E9301 board.
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#target configuration
daemon_startup attach
#target <type> <endianess> <reset mode>
target arm920t little reset_halt 0
working_area 0 0x80014000 0x1000 backup
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x60000000 0x1000000 2 2 0
#xscale ixp42x CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target xscale big run_and_halt 0 IXP42x
run_and_halt_time 0 30
#xscale ixp42x CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config srst_only srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target xscale big run_and_halt 0 IXP42x
run_and_halt_time 0 30
#LPC-2129 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
#LPC-2129 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum
#Hilscher netX 500 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#target configuration
daemon_startup reset
#target <type> <endianness> <startup mode> <chainpos> <variant>
target arm926ejs little run_and_halt 0 arm926ejs
run_and_halt_time 0 500
#Hilscher netX 500 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#target configuration
daemon_startup reset
#target <type> <endianness> <startup mode> <chainpos> <variant>
target arm926ejs little run_and_halt 0 arm926ejs
run_and_halt_time 0 500
#TI OMAP5912 dual core processor - http://www.ti.com
#on a OMAP5912 OSK board http://www.spectrumdigital.com.
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 38 0x0 0x0 0x0
jtag_device 4 0x1 0x0 0xe
jtag_device 8 0x0 0x0 0x0
#target configuration
daemon_startup reset
#target <type> <endianness> <reset mode> <chainpos> <variant>
target arm926ejs little run_and_init 1 arm926ejs
target_script 0 reset event/omap5912_reset.script
run_and_halt_time 0 30
# omap5912 lcd frame buffer as working area
working_area 0 0x20000000 0x3e800 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank cfi 0x00000000 0x1000000 2 2 0
#TI OMAP5912 dual core processor - http://www.ti.com
#on a OMAP5912 OSK board http://www.spectrumdigital.com.
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 38 0x0 0x0 0x0
jtag_device 4 0x1 0x0 0xe
jtag_device 8 0x0 0x0 0x0
#target configuration
daemon_startup reset
#target <type> <endianness> <reset mode> <chainpos> <variant>
target arm926ejs little run_and_init 1 arm926ejs
target_script 0 reset event/omap5912_reset.script
run_and_halt_time 0 30
# omap5912 lcd frame buffer as working area
working_area 0 0x20000000 0x3e800 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank cfi 0x00000000 0x1000000 2 2 0
#Marvell/Intel PXA270 Script
# set jtag_nsrst_delay to the delay introduced by your reset circuit
# the rest of the needed delays are built into the openocd program
jtag_nsrst_delay 260
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
# the rest of the needed delays are built into the openocd program
jtag_ntrst_delay 0
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst separate
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e
#target configuration
daemon_startup reset
target xscale little reset_halt 0 pxa27x
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off
working_area 0 0x5c000000 0x10000 nobackup
run_and_halt_time 0 30
#flash bank <driver> <base> <size> <chip_width> <bus_width>
# works for P30 flash
flash bank cfi 0x00000000 0x1000000 2 4 0
#Marvell/Intel PXA270 Script
# set jtag_nsrst_delay to the delay introduced by your reset circuit
# the rest of the needed delays are built into the openocd program
jtag_nsrst_delay 260
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
# the rest of the needed delays are built into the openocd program
jtag_ntrst_delay 0
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst separate
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 7 0x1 0x7f 0x7e
#target configuration
daemon_startup reset
target xscale little reset_halt 0 pxa27x
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off
working_area 0 0x5c000000 0x10000 nobackup
run_and_halt_time 0 30
#flash bank <driver> <base> <size> <chip_width> <bus_width>
# works for P30 flash
flash bank cfi 0x00000000 0x1000000 2 4 0
# Hitex stm32 performance stick
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target cortex_m3 little reset_halt 0
run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank stm32x 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
# Hitex stm32 performance stick
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target cortex_m3 little reset_halt 0
run_and_halt_time 0 30
working_area 0 0x20000000 16384 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
flash bank stm32x 0 0 0 0 0
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
#STR730 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x
#STR730 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x
#STR750 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
#STR750 CPU
#use combined on interfaces or targets that cant set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#jtag nTRST and nSRST delay
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
#Hitex STR9 Comstick
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 8 0x1 0x1 0xfe
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm966e <endianness> <reset mode> <chainpos> <variant>
target arm966e little reset_halt 1 arm966e
run_and_halt_time 0 30
working_area 0 0x50000000 16384 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0
#Hitex STR9 Comstick
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that cant set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 8 0x1 0x1 0xfe
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm966e <endianness> <reset mode> <chainpos> <variant>
target arm966e little reset_halt 1 arm966e
run_and_halt_time 0 30
working_area 0 0x50000000 16384 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0
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