Commit 95e13054 authored by zwelch's avatar zwelch
Browse files

Add target_write_memory wrapper:

- replaces all calls to target->type->write_memory.
- add documentation in target_s to warn not to invoke callback directly.


git-svn-id: svn://svn.berlios.de/openocd/trunk@1960 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent b6db182c
......@@ -1027,7 +1027,7 @@ static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
/* Write one block to the PageWriteBuffer */
buffer_pos = (pagen-first_page)*dst_min_alignment;
wcount = CEIL(count,4);
if((retval = target->type->write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
if((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
{
return retval;
}
......
......@@ -260,7 +260,7 @@ static void cfi_intel_clear_status_register(flash_bank_t *bank)
}
cfi_command(bank, 0x50, command);
target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
......@@ -356,12 +356,12 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -419,7 +419,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -492,7 +492,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank)
if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -688,13 +688,13 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
for (i = first; i <= last; i++)
{
cfi_command(bank, 0x20, command);
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xd0, command);
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -704,7 +704,7 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
else
{
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -715,7 +715,7 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
}
cfi_command(bank, 0xff, command);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
......@@ -731,37 +731,37 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
for (i = first; i <= last; i++)
{
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x80, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x30, command);
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -771,7 +771,7 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
else
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -782,7 +782,7 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
}
cfi_command(bank, 0xf0, command);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
static int cfi_erase(struct flash_bank_s *bank, int first, int last)
......@@ -842,7 +842,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0x60, command);
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -850,7 +850,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0x01, command);
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -860,7 +860,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0xd0, command);
LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -878,7 +878,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
u8 block_status;
/* read block lock bit, to verify status */
cfi_command(bank, 0x90, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -888,7 +888,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
cfi_command(bank, 0x70, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -917,13 +917,13 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
cfi_intel_clear_status_register(bank);
cfi_command(bank, 0x60, command);
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x01, command);
if((retval = target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -934,7 +934,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
}
cfi_command(bank, 0xff, command);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last)
......@@ -1554,12 +1554,12 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address
cfi_intel_clear_status_register(bank);
cfi_command(bank, 0x40, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
{
return retval;
}
......@@ -1567,7 +1567,7 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -1622,14 +1622,14 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco
/* Initiate buffer operation _*/
cfi_command(bank, 0xE8, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -1640,26 +1640,26 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordco
/* Write buffer wordcount-1 and data words */
cfi_command(bank, bufferwsize-1, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
{
return retval;
}
/* Commit write operation */
cfi_command(bank, 0xd0, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -1680,24 +1680,24 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 addr
u8 command[8];
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xa0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
{
return retval;
}
......@@ -1705,7 +1705,7 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 addr
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -1757,39 +1757,39 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor
// Unlock
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
// Buffer load command
cfi_command(bank, 0x25, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
/* Write buffer wordcount-1 and data words */
cfi_command(bank, bufferwsize-1, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target->type->write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
{
return retval;
}
/* Commit write operation */
cfi_command(bank, 0x29, command);
if((retval = target->type->write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -1797,7 +1797,7 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, u8 *word, u32 wor
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2012,12 +2012,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* return to read array mode, so we can read from flash again for padding */
cfi_command(bank, 0xf0, current_word);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, current_word);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
......@@ -2052,12 +2052,12 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* return to read array mode */
cfi_command(bank, 0xf0, current_word);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, current_word);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word);
}
static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *bank, void *param)
......@@ -2133,17 +2133,17 @@ static int cfi_probe(struct flash_bank_s *bank)
/* switch to read identifier codes mode ("AUTOSELECT") */
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x90, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2177,12 +2177,12 @@ static int cfi_probe(struct flash_bank_s *bank)
LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id);
/* switch back to read array mode */
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2203,7 +2203,7 @@ static int cfi_probe(struct flash_bank_s *bank)
* SST flashes clearly violate this, and we will consider them incompatbile for now
*/
cfi_command(bank, 0x98, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2217,12 +2217,12 @@ static int cfi_probe(struct flash_bank_s *bank)
if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
{
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2307,12 +2307,12 @@ static int cfi_probe(struct flash_bank_s *bank)
* we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command
*/
cfi_command(bank, 0xf0, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2410,7 +2410,7 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank)
return ERROR_FLASH_OPERATION_FAILED;
cfi_command(bank, 0x90, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2426,7 +2426,7 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank)
}
cfi_command(bank, 0xff, command);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
static int cfi_spansion_protect_check(struct flash_bank_s *bank)
......@@ -2439,19 +2439,19 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank)
int i;
cfi_command(bank, 0xaa, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x90, command);
if((retval = target->type->write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
......@@ -2467,7 +2467,7 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank)
}
cfi_command(bank, 0xf0, command);
return target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command);
}
static int cfi_protect_check(struct flash_bank_s *bank)
......
......@@ -258,7 +258,7 @@ static int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u3
/* write IAP code to working area */
target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12));
target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0));
if((retval = target->type->write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
if((retval = target_write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
{
return retval;
}
......
......@@ -406,7 +406,7 @@ static int lpc288x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
* it seems not to be a LOT slower....
* bulk_write_memory() is no quicker :(*/
#if 1
if (target->type->write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
if (target_write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
{
LOG_ERROR("Write failed s %x p %x", sector, page);
return ERROR_FLASH_OPERATION_FAILED;
......
......@@ -602,8 +602,8 @@ static int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data,
/* write MLC_ECC_ENC_REG to start encode cycle */
target_write_u32(target, 0x200b8008, 0x0);
target->type->write_memory(target, 0x200a8000, 4, 128, page_buffer + (quarter * 512));
target->type->write_memory(target, 0x200a8000, 1, 6, oob_buffer + (quarter * 6));
target_write_memory(target, 0x200a8000, 4, 128, page_buffer + (quarter * 512));
target_write_memory(target, 0x200a8000, 1, 6, oob_buffer + (quarter * 6));
/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
target_write_u32(target, 0x200b8010, 0x0);
......
......@@ -494,7 +494,7 @@ static int mg_mflash_do_write_sects(void *buff, u32 sect_num, u32 sect_cnt,
if (ret != ERROR_OK)
LOG_ERROR("mg_io_wait_drq time out");
ret = target->type->write_memory(target, address, 2, MG_MFLASH_SECTOR_SIZE / 2, buff_ptr);
ret = target_write_memory(target, address, 2, MG_MFLASH_SECTOR_SIZE / 2, buff_ptr);
if (ret != ERROR_OK)
LOG_ERROR("mem write error");
buff_ptr += MG_MFLASH_SECTOR_SIZE;
......@@ -927,7 +927,7 @@ static int mg_verify_interface(void)
for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++)
buff[i] = i;
target->type->write_memory(target, address, 2,
target_write_memory(target, address, 2,
MG_MFLASH_SECTOR_SIZE / 2, (u8 *)buff);
memset(buff, 0xff, MG_MFLASH_SECTOR_SIZE);
......
......@@ -131,7 +131,7 @@ static int orion_nand_fast_block_write(struct nand_device_s *device, u8 *data, i
target_buffer_set_u32(target,