Commit 94fa8fd3 authored by Freddie Chopin's avatar Freddie Chopin Committed by Øyvind Harboe
Browse files

Add common LPC2xxx setup procedure, use in all LPC2xxx files.



Signed-off-by: default avatarFreddie Chopin <freddie_chopin@op.pl>
parent aa61a3b3
# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal # NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal
if { [info exists CHIPNAME] } { source [find target/lpc2xxx.cfg]
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2103
}
if { [info exists CPUTAPID ] } { proc init_targets {} {
set _CPUTAPID $CPUTAPID # 32kB flash and 8kB SRAM, clocked with 12MHz crystal
} else { # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
set _CPUTAPID 0x4f1f0f0f setup_lpc2xxx lpc2103 0x4f1f0f0f 0x8000 lpc2000_v2 0x2000 12000 1500
} }
reset_config trst_and_srst
# reset delays
adapter_nsrst_delay 100
jtag_ntrst_delay 100
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
# 8kB of internal SRAM
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0
# 32kB of internal Flash, core clocked with 12MHz crystal
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
# NXP LPC2124 # NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
if { [info exists CHIPNAME] } { source [find target/lpc2xxx.cfg]
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2124
}
if { [info exists CPUTAPID ] } { proc init_targets {} {
set _CPUTAPID $CPUTAPID # 256kB flash and 16kB SRAM, clocked with 12MHz crystal
} else { # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
set _CPUTAPID 0x4f1f0f0f setup_lpc2xxx lpc2124 0x4f1f0f0f 0x40000 lpc2000_v1 0x4000 12000 1500
} }
reset_config trst_and_srst
# reset delays
adapter_nsrst_delay 100
jtag_ntrst_delay 100
adapter_khz 1000
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum
# NXP LPC2129 # NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
if { [info exists CHIPNAME] } { source [find target/lpc2xxx.cfg]
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2129
}
if { [info exists CPUTAPID ] } { proc init_targets {} {
set _CPUTAPID $CPUTAPID # 256kB flash and 16kB SRAM, clocked with 12MHz crystal
} else { # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
set _CPUTAPID 0xcf1f0f0f setup_lpc2xxx lpc2129 0xcf1f0f0f 0x40000 lpc2000_v1 0x4000 12000 1500
} }
reset_config trst_and_srst
# reset delays
adapter_nsrst_delay 100
jtag_ntrst_delay 100
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
# Proc that can be invoked to create a special version of # NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal
# the LPC2148
proc setup_lpc2148 {chipname tapids} {
# Use RCLK. If RCLK is not available fall back to 500kHz.
#
# Depending on cabling you might be able to eek this up to 2000kHz.
jtag_rclk 500
adapter_nsrst_delay 200 source [find target/lpc2xxx.cfg]
jtag_ntrst_delay 200
# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
# JTAG, power-on reset is not enough, i.e. you need to perform a
# reset before being able to talk to the LPC2148, attach is not possible.
reset_config trst_and_srst
eval "jtag newtap $chipname cpu -irlen 4 -ircapture 0x1 -irmask 0xf $tapids"
target create $chipname.cpu arm7tdmi -chain-position $chipname.cpu
$chipname.cpu configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
$chipname.cpu configure -event reset-init {
# Force target into ARM state
arm core_state arm
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
# and reside in flash instead).
#
# See section 7.1 on page 32 ("Memory Mapping control register") in
# "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
# http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
mwb 0xE01FC040 0x01
}
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
flash bank $chipname.flash lpc2000 0x0 0x7d000 0 0 $chipname.cpu lpc2000_v2 14765 calc_checksum
}
# Default settings
proc init_targets {} { proc init_targets {} {
setup_lpc2148 lpc2148 "-expected-id 0x3f0f0f0f -expected-id 0x4f1f0f0f" # 500kB flash and 32kB SRAM, clocked with 12MHz crystal
# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
setup_lpc2xxx lpc2148 "0x3f0f0f0f 0x4f1f0f0f" 0x7d000 lpc2000_v2 0x8000 12000 1500
} }
if { [info exists CHIPNAME] } { # NXP LPC2294 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2294
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0xffffffff
}
adapter_nsrst_delay 200 source [find target/lpc2xxx.cfg]
jtag_ntrst_delay 200
reset_config trst_and_srst proc init_targets {} {
# 256kB flash and 16kB SRAM, clocked with 12MHz crystal
# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
#jtag scan chain # !! TAPID unknown !!
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID setup_lpc2xxx lpc2294 0xffffffff 0x40000 lpc2000_v1 0x4000 12000 1500
}
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
#flash configuration
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator # NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator
if { [info exists CHIPNAME] } { source [find target/lpc2xxx.cfg]
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2378
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4f1f0f0f
}
#delays on reset lines
adapter_nsrst_delay 200
jtag_ntrst_delay 200
reset_config trst_and_srst
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID proc init_targets {} {
# 504kB flash and 32kB SRAM, clocked with 4MHz internal oscillator
set _TARGETNAME $_CHIPNAME.cpu # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME setup_lpc2xxx lpc2378 0x4f1f0f0f 0x7e000 lpc2000_v2 0x8000 4000 500
# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
$_TARGETNAME configure -event reset-init {
# Force target into ARM state
arm core_state arm
#do not remap 0x0000-0x0020 to anything but the flash
mwb 0xE01FC040 0x01
} }
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# After reset the chip uses its internal 4MHz RC oscillator
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
adapter_khz 500
# NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local On-Chip SRAM (98kB total), clocked with 4MHz internal RC oscillator # NXP LPC2478 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
if { [info exists CHIPNAME] } { source [find target/lpc2xxx.cfg]
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2478
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4f1f0f0f
}
if { [info exists CCLK ] } {
set _CCLK $CCLK
} else {
error "You must specify the CCLK that will be used for flash programming!"
}
#delays on reset lines
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst proc init_targets {} {
# 504kB flash and 64kB SRAM, clocked with 4MHz internal oscillator
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID # setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
setup_lpc2xxx lpc2478 0x4f1f0f0f 0x7e000 lpc2000_v2 0x10000 4000 500
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
$_TARGETNAME configure -event reset-init {
# Force target into ARM state
arm core_state arm
# Do not remap 0x0000-0x0020 to anything but the Flash
mwb 0xE01FC040 0x01
} }
# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x7E000 0 0 $_TARGETNAME lpc2000_v2 $_CCLK calc_checksum
# Common setup for the LPC2xxx parts
# parameters:
# - chip_name - name of the chip, e.g. lpc2103
# - cputapids - TAP IDs of the core, should be quoted if more than one, e.g. 0x4f1f0f0f or "0x3f0f0f0f 0x4f1f0f0f"
# - flash_size - size of on-chip flash (available for code, not including the bootloader) in bytes, e.g. 0x8000
# - flash_variant - "type" of LPC2xxx device, lpc2000_v1 (LPC22xx and older LPC21xx) or lpc2000_v2 (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx)
# - workarea_size - size of work-area in RAM for flashing procedures, must not exceed the size of RAM available at 0x40000000, e.g. 0x2000
# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000
proc setup_lpc2xxx {chip_name cputapids flash_size flash_variant workarea_size core_freq_khz adapter_freq_khz} {
reset_config trst_and_srst
# reset delays
adapter_nsrst_delay 100
jtag_ntrst_delay 100
adapter_khz $adapter_freq_khz
foreach i $cputapids {
append expected_ids "-expected-id " $i " "
}
eval "jtag newtap $chip_name cpu -irlen 4 -ircapture 0x1 -irmask 0xf $expected_ids"
set _TARGETNAME $chip_name.cpu
target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size $workarea_size -work-area-backup 0
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $chip_name.flash
flash bank $_FLASHNAME lpc2000 0x0 $flash_size 0 0 $_TARGETNAME $flash_variant $core_freq_khz calc_checksum
}
proc init_targets {} {
# FIX!!! read out CPUTAPID here and choose right setup. In addition to the
# CPUTAPID some querying of the target would be required.
return -error "This is a generic LPC2xxx configuration file, use a specific target file."
}
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment