Commit 86173cdb authored by zwelch's avatar zwelch
Browse files

Transform 'u8' to 'uint8_t' in src/target

- Replace '\([^_]\)u8' with '\1uint8_t'.
- Replace '^u8' with 'uint8_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 8f9f5c18
...@@ -33,7 +33,7 @@ typedef struct mem_param_s ...@@ -33,7 +33,7 @@ typedef struct mem_param_s
{ {
u32 address; u32 address;
u32 size; u32 size;
u8 *value; uint8_t *value;
enum param_direction direction; enum param_direction direction;
} mem_param_t; } mem_param_t;
...@@ -41,7 +41,7 @@ typedef struct reg_param_s ...@@ -41,7 +41,7 @@ typedef struct reg_param_s
{ {
char *reg_name; char *reg_name;
u32 size; u32 size;
u8 *value; uint8_t *value;
enum param_direction direction; enum param_direction direction;
} reg_param_t; } reg_param_t;
......
...@@ -288,14 +288,14 @@ enum arm11_regcache_ids ...@@ -288,14 +288,14 @@ enum arm11_regcache_ids
#define ARM11_GDB_REGISTER_COUNT 26 #define ARM11_GDB_REGISTER_COUNT 26
u8 arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
reg_t arm11_gdb_dummy_fp_reg = reg_t arm11_gdb_dummy_fp_reg =
{ {
"GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 "GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
}; };
u8 arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0}; uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
reg_t arm11_gdb_dummy_fps_reg = reg_t arm11_gdb_dummy_fps_reg =
{ {
...@@ -630,8 +630,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11) ...@@ -630,8 +630,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u8 Ready = 0; /* ignored */ uint8_t Ready = 0; /* ignored */
u8 Valid = 0; /* ignored */ uint8_t Valid = 0; /* ignored */
arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0); arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1); arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1);
...@@ -717,7 +717,7 @@ int arm11_arch_state(struct target_s *target) ...@@ -717,7 +717,7 @@ int arm11_arch_state(struct target_s *target)
} }
/* target request support */ /* target request support */
int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer) int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer)
{ {
FNC_INFO_NOTIMPLEMENTED; FNC_INFO_NOTIMPLEMENTED;
...@@ -1090,7 +1090,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i ...@@ -1090,7 +1090,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
/** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */ /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */
...@@ -1173,7 +1173,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, ...@@ -1173,7 +1173,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
return ERROR_OK; return ERROR_OK;
} }
int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
FNC_INFO; FNC_INFO;
...@@ -1285,7 +1285,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count ...@@ -1285,7 +1285,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */ /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer) int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer)
{ {
FNC_INFO; FNC_INFO;
...@@ -1395,11 +1395,11 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t ...@@ -1395,11 +1395,11 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
// Save regs // Save regs
for (size_t i = 0; i < 16; i++) for (size_t i = 0; i < 16; i++)
{ {
context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32); context[i] = buf_get_u32((uint8_t*)(&arm11->reg_values[i]),0,32);
LOG_DEBUG("Save %zi: 0x%x",i,context[i]); LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
} }
cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32); cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
LOG_DEBUG("Save CPSR: 0x%x", cpsr); LOG_DEBUG("Save CPSR: 0x%x", cpsr);
for (int i = 0; i < num_mem_params; i++) for (int i = 0; i < num_mem_params; i++)
...@@ -1521,10 +1521,10 @@ restore: ...@@ -1521,10 +1521,10 @@ restore:
{ {
LOG_DEBUG("restoring register %s with value 0x%8.8x", LOG_DEBUG("restoring register %s with value 0x%8.8x",
arm11->reg_list[i].name, context[i]); arm11->reg_list[i].name, context[i]);
arm11_set_reg(&arm11->reg_list[i], (u8*)&context[i]); arm11_set_reg(&arm11->reg_list[i], (uint8_t*)&context[i]);
} }
LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr); LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr);
arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (u8*)&cpsr); arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (uint8_t*)&cpsr);
// arm11->core_state = core_state; // arm11->core_state = core_state;
// arm11->core_mode = core_mode; // arm11->core_mode = core_mode;
...@@ -1668,7 +1668,7 @@ int arm11_get_reg(reg_t *reg) ...@@ -1668,7 +1668,7 @@ int arm11_get_reg(reg_t *reg)
} }
/** Change a value in the register cache */ /** Change a value in the register cache */
int arm11_set_reg(reg_t *reg, u8 *buf) int arm11_set_reg(reg_t *reg, uint8_t *buf)
{ {
FNC_INFO; FNC_INFO;
...@@ -1730,7 +1730,7 @@ int arm11_build_reg_cache(target_t *target) ...@@ -1730,7 +1730,7 @@ int arm11_build_reg_cache(target_t *target)
r->name = rd->name; r->name = rd->name;
r->size = 32; r->size = 32;
r->value = (u8 *)(arm11->reg_values + i); r->value = (uint8_t *)(arm11->reg_values + i);
r->dirty = 0; r->dirty = 0;
r->valid = 0; r->valid = 0;
r->bitfield_desc = NULL; r->bitfield_desc = NULL;
......
...@@ -66,7 +66,7 @@ do { \ ...@@ -66,7 +66,7 @@ do { \
typedef struct arm11_register_history_s typedef struct arm11_register_history_s
{ {
u32 value; u32 value;
u8 valid; uint8_t valid;
}arm11_register_history_t; }arm11_register_history_t;
enum arm11_debug_version enum arm11_debug_version
...@@ -86,7 +86,7 @@ typedef struct arm11_common_s ...@@ -86,7 +86,7 @@ typedef struct arm11_common_s
u32 device_id; /**< IDCODE readout */ u32 device_id; /**< IDCODE readout */
u32 didr; /**< DIDR readout (debug capabilities) */ u32 didr; /**< DIDR readout (debug capabilities) */
u8 implementor; /**< DIDR Implementor readout */ uint8_t implementor; /**< DIDR Implementor readout */
size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */ size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */
size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */ size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */
...@@ -191,7 +191,7 @@ int arm11_poll(struct target_s *target); ...@@ -191,7 +191,7 @@ int arm11_poll(struct target_s *target);
int arm11_arch_state(struct target_s *target); int arm11_arch_state(struct target_s *target);
/* target request support */ /* target request support */
int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer); int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer);
/* target execution control */ /* target execution control */
int arm11_halt(struct target_s *target); int arm11_halt(struct target_s *target);
...@@ -211,11 +211,11 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i ...@@ -211,11 +211,11 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
* count: number of items of <size> * count: number of items of <size>
*/ */
int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
/* write target memory in multiples of 4 byte, optimized for writing large quantities of data */ /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer); int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer);
int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
...@@ -237,7 +237,7 @@ int arm11_quit(void); ...@@ -237,7 +237,7 @@ int arm11_quit(void);
/* helpers */ /* helpers */
int arm11_build_reg_cache(target_t *target); int arm11_build_reg_cache(target_t *target);
int arm11_set_reg(reg_t *reg, u8 *buf); int arm11_set_reg(reg_t *reg, uint8_t *buf);
int arm11_get_reg(reg_t *reg); int arm11_get_reg(reg_t *reg);
void arm11_record_register_history(arm11_common_t * arm11); void arm11_record_register_history(arm11_common_t * arm11);
...@@ -246,9 +246,9 @@ void arm11_dump_reg_changes(arm11_common_t * arm11); ...@@ -246,9 +246,9 @@ void arm11_dump_reg_changes(arm11_common_t * arm11);
/* internals */ /* internals */
void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field); void arm11_setup_field (arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
void arm11_add_IR (arm11_common_t * arm11, u8 instr, tap_state_t state); void arm11_add_IR (arm11_common_t * arm11, uint8_t instr, tap_state_t state);
void arm11_add_debug_SCAN_N (arm11_common_t * arm11, u8 chain, tap_state_t state); void arm11_add_debug_SCAN_N (arm11_common_t * arm11, uint8_t chain, tap_state_t state);
void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state); void arm11_add_debug_INST (arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state);
int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr); int arm11_read_DSCR (arm11_common_t * arm11, u32 *dscr);
int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr); int arm11_write_DSCR (arm11_common_t * arm11, u32 dscr);
...@@ -275,7 +275,7 @@ int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state ...@@ -275,7 +275,7 @@ int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state
typedef struct arm11_sc7_action_s typedef struct arm11_sc7_action_s
{ {
bool write; /**< Access mode: true for write, false for read. */ bool write; /**< Access mode: true for write, false for read. */
u8 address; /**< Register address mode. Use enum #arm11_sc7 */ uint8_t address; /**< Register address mode. Use enum #arm11_sc7 */
u32 value; /**< If write then set this to value to be written. u32 value; /**< If write then set this to value to be written.
In read mode this receives the read value when the In read mode this receives the read value when the
function returns. */ function returns. */
......
...@@ -97,7 +97,7 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo ...@@ -97,7 +97,7 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
* *
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state) void arm11_add_IR(arm11_common_t * arm11, uint8_t instr, tap_state_t state)
{ {
jtag_tap_t *tap; jtag_tap_t *tap;
tap = arm11->target->tap; tap = arm11->target->tap;
...@@ -122,10 +122,10 @@ void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state) ...@@ -122,10 +122,10 @@ void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state)
* arm11_add_debug_SCAN_N(). * arm11_add_debug_SCAN_N().
* *
*/ */
static void arm11_in_handler_SCAN_N(u8 *in_value) static void arm11_in_handler_SCAN_N(uint8_t *in_value)
{ {
/** \todo TODO: clarify why this isnt properly masked in core.c jtag_read_buffer() */ /** \todo TODO: clarify why this isnt properly masked in core.c jtag_read_buffer() */
u8 v = *in_value & 0x1F; uint8_t v = *in_value & 0x1F;
if (v != 0x10) if (v != 0x10)
{ {
...@@ -160,7 +160,7 @@ static void arm11_in_handler_SCAN_N(u8 *in_value) ...@@ -160,7 +160,7 @@ static void arm11_in_handler_SCAN_N(u8 *in_value)
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state) void arm11_add_debug_SCAN_N(arm11_common_t * arm11, uint8_t chain, tap_state_t state)
{ {
JTAG_DEBUG("SCREG <= 0x%02x", chain); JTAG_DEBUG("SCREG <= 0x%02x", chain);
...@@ -168,7 +168,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state) ...@@ -168,7 +168,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
scan_field_t field; scan_field_t field;
u8 tmp[1]; uint8_t tmp[1];
arm11_setup_field(arm11, 5, &chain, &tmp, &field); arm11_setup_field(arm11, 5, &chain, &tmp, &field);
arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state); arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
...@@ -195,7 +195,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state) ...@@ -195,7 +195,7 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
* *
* \remarks This adds to the JTAG command queue but does \em not execute it. * \remarks This adds to the JTAG command queue but does \em not execute it.
*/ */
void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, u8 * flag, tap_state_t state) void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, uint8_t * flag, tap_state_t state)
{ {
JTAG_DEBUG("INST <= 0x%08x", inst); JTAG_DEBUG("INST <= 0x%08x", inst);
...@@ -374,7 +374,7 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count) ...@@ -374,7 +374,7 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count)
while (1) while (1)
{ {
u8 flag; uint8_t flag;
arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE); arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
...@@ -426,8 +426,8 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data, ...@@ -426,8 +426,8 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data,
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u32 Data; u32 Data;
u8 Ready; uint8_t Ready;
u8 nRetry; uint8_t nRetry;
arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0); arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
...@@ -516,8 +516,8 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 * ...@@ -516,8 +516,8 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
u8 Readies[count + 1]; uint8_t Readies[count + 1];
u8 * ReadyPos = Readies; uint8_t * ReadyPos = Readies;
while (count--) while (count--)
{ {
...@@ -603,8 +603,8 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * dat ...@@ -603,8 +603,8 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * dat
scan_field_t chain5_fields[3]; scan_field_t chain5_fields[3];
u32 Data; u32 Data;
u8 Ready; uint8_t Ready;
u8 nRetry; uint8_t nRetry;
arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0); arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0);
arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
...@@ -685,12 +685,12 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c ...@@ -685,12 +685,12 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
scan_field_t chain7_fields[3]; scan_field_t chain7_fields[3];
u8 nRW; uint8_t nRW;
u32 DataOut; u32 DataOut;
u8 AddressOut; uint8_t AddressOut;
u8 Ready; uint8_t Ready;
u32 DataIn; u32 DataIn;
u8 AddressIn; uint8_t AddressIn;
arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0); arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1); arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);
......
...@@ -43,8 +43,8 @@ int arm720t_target_create(struct target_s *target,Jim_Interp *interp); ...@@ -43,8 +43,8 @@ int arm720t_target_create(struct target_s *target,Jim_Interp *interp);
int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target); int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm720t_quit(void); int arm720t_quit(void);
int arm720t_arch_state(struct target_s *target); int arm720t_arch_state(struct target_s *target);
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
int arm720t_soft_reset_halt(struct target_s *target); int arm720t_soft_reset_halt(struct target_s *target);
target_type_t arm720t_target = target_type_t arm720t_target =
...@@ -91,8 +91,8 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c ...@@ -91,8 +91,8 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info;
scan_field_t fields[2]; scan_field_t fields[2];
u8 out_buf[4]; uint8_t out_buf[4];
u8 instruction_buf = instruction; uint8_t instruction_buf = instruction;
buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); buf_set_u32(out_buf, 0, 32, flip_u32(out, 32));
...@@ -118,9 +118,9 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c ...@@ -118,9 +118,9 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
if (in) if (in)
{ {
fields[1].in_value = (u8 *)in; fields[1].in_value = (uint8_t *)in;
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm7flip32, (u8 *)in); jtag_add_callback(arm7flip32, (uint8_t *)in);
} else } else
{ {
jtag_add_dr_scan(2, fields, jtag_get_end_state()); jtag_add_dr_scan(2, fields, jtag_get_end_state());
...@@ -329,7 +329,7 @@ int arm720t_arch_state(struct target_s *target) ...@@ -329,7 +329,7 @@ int arm720t_arch_state(struct target_s *target)
return ERROR_OK; return ERROR_OK;
} }
int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
...@@ -349,7 +349,7 @@ int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 coun ...@@ -349,7 +349,7 @@ int arm720t_read_memory(struct target_s *target, u32 address, u32 size, u32 coun
return retval; return retval;
} }
int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm720t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
int retval; int retval;
......
...@@ -373,7 +373,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) ...@@ -373,7 +373,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{ {
u32 current_instr; u32 current_instr;
/* check that user program as not modified breakpoint instruction */ /* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
...@@ -387,7 +387,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) ...@@ -387,7 +387,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{ {
u16 current_instr; u16 current_instr;
/* check that user program as not modified breakpoint instruction */ /* check that user program as not modified breakpoint instruction */
if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK) if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
{ {
return retval; return retval;
} }
...@@ -739,7 +739,7 @@ int arm7_9_execute_sys_speed(struct target_s *target) ...@@ -739,7 +739,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
int arm7_9_execute_fast_sys_speed(struct target_s *target) int arm7_9_execute_fast_sys_speed(struct target_s *target)
{ {
static int set=0; static int set=0;
static u8 check_value[4], check_mask[4]; static uint8_t check_value[4], check_mask[4];
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
...@@ -781,7 +781,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target) ...@@ -781,7 +781,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
* @param buffer Pointer to the buffer that will hold the data * @param buffer Pointer to the buffer that will hold the data
* @return The result of receiving data from the Embedded ICE unit * @return The result of receiving data from the Embedded ICE unit
*/ */
int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer) int arm7_9_target_request_data(target_t *target, u32 size, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
...@@ -2208,7 +2208,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo ...@@ -2208,7 +2208,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo
return jtag_execute_queue(); return jtag_execute_queue();
} }
int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
...@@ -2384,7 +2384,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count ...@@ -2384,7 +2384,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
return ERROR_OK; return ERROR_OK;
} }
int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
{ {
armv4_5_common_t *armv4_5 = target->arch_info; armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info;
...@@ -2568,7 +2568,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun ...@@ -2568,7 +2568,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
} }
static int dcc_count; static int dcc_count;
static u8 *dcc_buffer; static uint8_t *dcc_buffer;