Commit 6319ea33 authored by zwelch's avatar zwelch
Browse files

- Fixes '<=' whitespace

- Replace '\(\w\)\(<=\)\(\w\)' with '\1 \2 \3'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2368 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 4ce93ac4
......@@ -916,7 +916,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
}
/* mark erased sectors */
for (sec=first; sec<=last; sec++)
for (sec=first; sec <= last; sec++)
{
bank->sectors[sec].is_erased = 1;
}
......@@ -952,7 +952,7 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l
at91sam7_read_clock_info(bank);
at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
for (sector=first; sector<=last; sector++)
for (sector=first; sector <= last; sector++)
{
if (set)
cmd = SLB;
......
......@@ -6955,7 +6955,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
case JIM_EXPROP_MUL: wC = wA*wB; break;
case JIM_EXPROP_LT: wC = wA<wB; break;
case JIM_EXPROP_GT: wC = wA>wB; break;
case JIM_EXPROP_LTE: wC = wA<=wB; break;
case JIM_EXPROP_LTE: wC = wA <= wB; break;
case JIM_EXPROP_GTE: wC = wA >= wB; break;
case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
......@@ -7060,7 +7060,7 @@ trydouble:
case JIM_EXPROP_MUL: dC = dA*dB; break;
case JIM_EXPROP_LT: dC = dA<dB; break;
case JIM_EXPROP_GT: dC = dA>dB; break;
case JIM_EXPROP_LTE: dC = dA<=dB; break;
case JIM_EXPROP_LTE: dC = dA <= dB; break;
case JIM_EXPROP_GTE: dC = dA >= dB; break;
case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
case JIM_EXPROP_NUMNE: dC = dA != dB; break;
......
......@@ -175,7 +175,7 @@ void bitq_path_move(pathmove_command_t* cmd)
{
int i;
for (i = 0; i<=cmd->num_states; i++)
for (i = 0; i <= cmd->num_states; i++)
{
if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
bitq_io(0, 0, 0);
......
......@@ -1428,7 +1428,7 @@ int arm7_9_debug_entry(target_t *target)
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
for (i=0; i<=15; i++)
for (i=0; i <= 15; i++)
{
LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);
......@@ -2362,7 +2362,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size,
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
for (i=0; i<=last_reg; i++)
for (i=0; i <= last_reg; i++)
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
arm7_9->read_xpsr(target, &cpsr, 0);
......@@ -2545,7 +2545,7 @@ int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
for (i=0; i<=last_reg; i++)
for (i=0; i <= last_reg; i++)
ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
arm7_9->read_xpsr(target, &cpsr, 0);
......
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