- add support for Marvell Feroceon (thanks to Nicolas Pitre for this patch)

git-svn-id: svn://svn.berlios.de/openocd/trunk@315 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/Makefile.am

@@ -11,7 +11,7 @@ AM_CPPFLAGS = -DPKGLIBDIR=\"$(pkglibdir)\" @CPPFLAGS@
 noinst_LIBRARIES = libtarget.a
 libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c etm.c arm7tdmi.c arm9tdmi.c \
 	arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
-	arm966e.c arm926ejs.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_swjdp.c \
+	arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_swjdp.c \
 	etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c
 noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
 	arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \

src/target/arm7_9_common.h

@@ -115,6 +115,7 @@ int arm7_9_prepare_reset_halt(struct target_s *target);
 int arm7_9_halt(target_t *target);
 int arm7_9_debug_entry(target_t *target);
 int arm7_9_full_context(target_t *target);
+int arm7_9_restore_context(target_t *target);
 int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
 int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);

src/target/arm926ejs.h

@@ -41,4 +41,10 @@ typedef struct arm926ejs_common_s
 	u32 d_far;
 } arm926ejs_common_t;
 
+extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, char *variant);
+extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx); 
+extern int arm926ejs_arch_state(struct target_s *target, char *buf, int buf_size); 
+extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); 
+extern int arm926ejs_soft_reset_halt(struct target_s *target);
+
 #endif /* ARM926EJS_H */

src/target/arm9tdmi.h

@@ -61,6 +61,7 @@ extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
 
 extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed);
 extern int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in);
+extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be); 
 extern void arm9tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16]);
 extern void arm9tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]);
 

src/target/target.c

@@ -84,6 +84,7 @@ extern target_type_t arm9tdmi_target;
 extern target_type_t arm920t_target;
 extern target_type_t arm966e_target;
 extern target_type_t arm926ejs_target;
+extern target_type_t feroceon_target;
 extern target_type_t xscale_target;
 extern target_type_t cortexm3_target;
 
@@ -95,6 +96,7 @@ target_type_t *target_types[] =
 	&arm720t_target,
 	&arm966e_target,
 	&arm926ejs_target,
+	&feroceon_target,
 	&xscale_target,
 	&cortexm3_target,
 	NULL,