Commit 58699923 authored by David Brownell's avatar David Brownell
Browse files

LPC1768.cfg -- partial fixes for bogus reset-init handler



Cortex-M targets don't support ARM instructions.

Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...

Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
parent 52d4ba34
......@@ -33,11 +33,11 @@ target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNA
# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0
# REVISIT is there any good reason to have this reset-init event handler??
# Normally they should set up (board-specific) clocking then probe the flash...
$_TARGETNAME configure -event reset-init {
# Force target into ARM state
arm core_state arm
#do not remap 0x0000-0x0020 to anything but the flash
# mwb 0xE01FC040 0x01
# Force NVIC.VTOR to point to flash at 0 ...
# WHY? This is it's reset value; we run right after reset!!
mwb 0xE000ED08 0x00
}
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment