Commit 53d605e1 authored by zwelch's avatar zwelch
Browse files

- Fixes '!=' whitespace

- Replace ')\(!=\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(!=\)(' with '\1 \2 ('.
- Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 5e98c714
......@@ -614,7 +614,7 @@ void jtag_add_clocks(int num_cycles);
* matter if the operation was executed *before* jtag_execute_queue(),
* jtag_execute_queue() will still return an error code.
*
* All jtag_add_xxx() calls that have in_handler!=NULL will have been
* All jtag_add_xxx() calls that have in_handler != NULL will have been
* executed when this fn returns, but if what has been queued only
* clocks data out, without reading anything back, then JTAG could
* be running *after* jtag_execute_queue() returns. The API does
......
......@@ -279,7 +279,7 @@ static int presto_open_ftd2xx(char *req_serial)
if ((presto->status = FT_Read(presto->handle, &presto_data, 1, &ftbytes)) != FT_OK)
return ERROR_JTAG_DEVICE_ERROR;
if (ftbytes!=1)
if (ftbytes != 1)
{
LOG_DEBUG("PRESTO reset");
......@@ -313,7 +313,7 @@ static int presto_open_ftd2xx(char *req_serial)
if ((presto->status = FT_Read(presto->handle, &presto_data, 1, &ftbytes)) != FT_OK)
return ERROR_JTAG_DEVICE_ERROR;
if (ftbytes!=1)
if (ftbytes != 1)
{
LOG_DEBUG("PRESTO not responding");
return ERROR_JTAG_DEVICE_ERROR;
......
......@@ -1262,7 +1262,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args
* args[N-2] = "-endstate"
* args[N-1] = statename
*/
if ((argc < 4) || ((argc % 2)!=0))
if ((argc < 4) || ((argc % 2) != 0))
{
Jim_WrongNumArgs(interp, 1, args, "wrong arguments");
return JIM_ERR;
......
......@@ -79,7 +79,7 @@ static void setCurrentState(enum tap_state state)
}
/*
* Enter state and cause repeat transitions *out* of that state. So if the endState!=state, then
* Enter state and cause repeat transitions *out* of that state. So if the endState != state, then
* the transition from state to endState counts as a transition out of state.
*/
static __inline__ void shiftValueInner(const enum tap_state state, const enum tap_state endState, int repeat, cyg_uint32 value)
......@@ -92,7 +92,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
#if 1
#if TEST_MANUAL()
if ((state==TAP_DRSHIFT)&&(endState!=TAP_DRSHIFT))
if ((state==TAP_DRSHIFT)&&(endState != TAP_DRSHIFT))
{
int i;
setCurrentState(state);
......@@ -100,7 +100,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
{
int tms;
tms=0;
if ((i==repeat-1)&&(state!=endState))
if ((i==repeat-1)&&(state != endState))
{
tms=1;
}
......
......@@ -133,7 +133,7 @@ void zy1000_reset(int trst, int srst)
}
else
{
/* Danger!!! if clk!=0 when in
/* Danger!!! if clk != 0 when in
* idle in TAP_IDLE, reset halt on str912 will fail.
*/
ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000001);
......@@ -309,7 +309,7 @@ zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
cyg_uint32 status;
ZY1000_PEEK(ZY1000_JTAG_BASE+0x10, status);
Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80)!=0));
Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
return JIM_OK;
}
......@@ -363,7 +363,7 @@ int interface_jtag_execute_queue(void)
/* clear JTAG error register */
ZY1000_POKE(ZY1000_JTAG_BASE+0x14, 0x400);
if ((empty&0x400)!=0)
if ((empty&0x400) != 0)
{
LOG_WARNING("RCLK timeout");
/* the error is informative only as we don't want to break the firmware if there
......@@ -427,7 +427,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_
// figure out where to store the input data
int num_bits=fields[i].num_bits;
if (fields[i].in_value!=NULL)
if (fields[i].in_value != NULL)
{
inBuffer=fields[i].in_value;
}
......@@ -453,7 +453,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_
// we have (num_bits+7)/8 bytes of bits to toggle out.
// bits are pushed out LSB to MSB
value=0;
if (fields[i].out_value!=NULL)
if (fields[i].out_value != NULL)
{
for (l=0; l<k; l+=8)
{
......@@ -465,7 +465,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_
shiftValueInner(shiftState, pause_state, k, value);
if (inBuffer!=NULL)
if (inBuffer != NULL)
{
// data in, LSB to MSB
value=getShiftValue();
......
......@@ -69,7 +69,7 @@ static void print_version(void)
/* Give TELNET a way to find out what version this is */
static int handle_version_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc!=0)
if (argc != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(cmd_ctx, OPENOCD_VERSION);
......@@ -112,7 +112,7 @@ int ioutil_init(struct command_context_s *cmd_ctx);
static int handle_init_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
if (argc!=0)
if (argc != 0)
return ERROR_COMMAND_SYNTAX_ERROR;
int retval;
......@@ -268,14 +268,14 @@ int openocd_main(int argc, char *argv[])
return EXIT_FAILURE;
#if BUILD_HTTPD
if (httpd_start()!=ERROR_OK)
if (httpd_start() != ERROR_OK)
return EXIT_FAILURE;
#endif
if (ret != ERROR_COMMAND_CLOSE_CONNECTION)
{
command_context_mode(cmd_ctx, COMMAND_EXEC);
if (command_run_line(cmd_ctx, "init")!=ERROR_OK)
if (command_run_line(cmd_ctx, "init") != ERROR_OK)
return EXIT_FAILURE;
/* handle network connections */
......
......@@ -133,7 +133,7 @@ int check_pending(connection_t *connection, int timeout_s, int *got_data)
return ERROR_OK;
}
}
*got_data=FD_ISSET(connection->fd, &read_fds)!=0;
*got_data=FD_ISSET(connection->fd, &read_fds) != 0;
return ERROR_OK;
}
......@@ -313,7 +313,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
int gotdata;
for (;;)
{
if ((retval=check_pending(connection, 0, &gotdata))!=ERROR_OK)
if ((retval=check_pending(connection, 0, &gotdata)) != ERROR_OK)
return retval;
if (!gotdata)
break;
......@@ -600,11 +600,11 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len)
*/
if (gdb_con->noack_mode)
{
if ((retval=fetch_packet(connection, &checksum_ok, 1, len, buffer))!=ERROR_OK)
if ((retval=fetch_packet(connection, &checksum_ok, 1, len, buffer)) != ERROR_OK)
return retval;
} else
{
if ((retval=fetch_packet(connection, &checksum_ok, 0, len, buffer))!=ERROR_OK)
if ((retval=fetch_packet(connection, &checksum_ok, 0, len, buffer)) != ERROR_OK)
return retval;
}
......@@ -1190,7 +1190,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac
retval = target_read_buffer(target, addr, len, buffer);
if ((retval!=ERROR_OK)&&!gdb_report_data_abort)
if ((retval != ERROR_OK)&&!gdb_report_data_abort)
{
/* TODO : Here we have to lie and send back all zero's lest stack traces won't work.
* At some point this might be fixed in GDB, in which case this code can be removed.
......@@ -1738,7 +1738,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i
p->base, p->size, blocksize);
ram_start=p->base+p->size;
}
if (ram_start!=0)
if (ram_start != 0)
{
xml_printf(&retval, &xml, &pos, &size, "<memory type=\"ram\" start=\"0x%x\" length=\"0x%x\"/>\n",
ram_start, 0-ram_start);
......@@ -2109,7 +2109,7 @@ int gdb_input_inner(connection_t *connection)
log_add_callback(gdb_log_callback, connection);
target_call_event_callbacks(target, TARGET_EVENT_GDB_START);
int retval=gdb_step_continue_packet(connection, target, packet, packet_size);
if (retval!=ERROR_OK)
if (retval != ERROR_OK)
{
/* we'll never receive a halted condition... issue a false one.. */
gdb_frontend_halted(target, connection);
......
......@@ -142,7 +142,7 @@ httpd_Jim_Command_formfetch(Jim_Interp *interp,
int argc,
Jim_Obj *const *argv)
{
if (argc!=2)
if (argc != 2)
{
Jim_WrongNumArgs(interp, 1, argv, "method ?args ...?");
return JIM_ERR;
......@@ -202,7 +202,7 @@ static void append_key(struct httpd_request *r, const char *key,
Jim_Obj *dict = Jim_GetVariableStr(interp, "httppostdata", 0);
if (dict!=NULL)
if (dict != NULL)
{
if (Jim_DictKey(interp, dict, keyObj, &value, 0) != JIM_OK)
{
......
......@@ -263,7 +263,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
}
else if (breakpoint->type == BKPT_SOFT)
{
if ((retval=arm7_9_set_software_breakpoints(arm7_9))!=ERROR_OK)
if ((retval=arm7_9_set_software_breakpoints(arm7_9)) != ERROR_OK)
return retval;
/* did we already set this breakpoint? */
......@@ -922,7 +922,7 @@ int arm7_9_poll(target_t *target)
{
reg_t *reg = register_get_by_name(target->reg_cache, "pc", 1);
uint32_t t=*((uint32_t *)reg->value);
if (t!=0)
if (t != 0)
{
LOG_ERROR("PC was not 0. Does this target need srst_pulls_trst?");
}
......@@ -1050,19 +1050,19 @@ int arm7_9_deassert_reset(target_t *target)
jtag_add_reset(0, 0);
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST)!=0)
if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
{
LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
/* set up embedded ice registers again */
if ((retval = target_examine_one(target)) != ERROR_OK)
return retval;
if ((retval=target_poll(target))!=ERROR_OK)
if ((retval=target_poll(target)) != ERROR_OK)
{
return retval;
}
if ((retval=target_halt(target))!=ERROR_OK)
if ((retval=target_halt(target)) != ERROR_OK)
{
return retval;
}
......@@ -1147,7 +1147,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
int i;
int retval;
if ((retval=target_halt(target))!=ERROR_OK)
if ((retval=target_halt(target)) != ERROR_OK)
return retval;
long long then=timeval_ms();
......@@ -1157,7 +1157,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) != 0)
break;
embeddedice_read_reg(dbg_stat);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
if (debug_level>=3)
{
......@@ -2576,7 +2576,7 @@ static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, i
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
if ((retval=target_wait_state(target, TARGET_DEBUG_RUNNING, 500))!=ERROR_OK)
if ((retval=target_wait_state(target, TARGET_DEBUG_RUNNING, 500)) != ERROR_OK)
return retval;
int little=target->endianness==TARGET_LITTLE_ENDIAN;
......@@ -2677,7 +2677,7 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count,
if (retval==ERROR_OK)
{
uint32_t endaddress=buf_get_u32(reg_params[0].value, 0, 32);
if (endaddress!=(address+count*4))
if (endaddress != (address+count*4))
{
LOG_ERROR("DCC write failed, expected end address 0x%08" PRIx32 " got 0x%0" PRIx32 "", (address+count*4), endaddress);
retval=ERROR_FAIL;
......@@ -2734,7 +2734,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
/* convert flash writing code into a buffer in target endianness */
for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(uint32_t)); i++)
{
if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i]))!=ERROR_OK)
if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i])) != ERROR_OK)
{
return retval;
}
......
......@@ -739,13 +739,13 @@ int arm7tdmi_examine(struct target_s *target)
}
target_set_examined(target);
}
if ((retval=embeddedice_setup(target))!=ERROR_OK)
if ((retval=embeddedice_setup(target)) != ERROR_OK)
return retval;
if ((retval=arm7_9_setup(target))!=ERROR_OK)
if ((retval=arm7_9_setup(target)) != ERROR_OK)
return retval;
if (arm7_9->etm_ctx)
{
if ((retval=etm_setup(target))!=ERROR_OK)
if ((retval=etm_setup(target)) != ERROR_OK)
return retval;
}
return ERROR_OK;
......
......@@ -831,13 +831,13 @@ int arm9tdmi_examine(struct target_s *target)
}
target_set_examined(target);
}
if ((retval=embeddedice_setup(target))!=ERROR_OK)
if ((retval=embeddedice_setup(target)) != ERROR_OK)
return retval;
if ((retval=arm7_9_setup(target))!=ERROR_OK)
if ((retval=arm7_9_setup(target)) != ERROR_OK)
return retval;
if (arm7_9->etm_ctx)
{
if ((retval=etm_setup(target))!=ERROR_OK)
if ((retval=etm_setup(target)) != ERROR_OK)
return retval;
}
return ERROR_OK;
......
......@@ -195,7 +195,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
*/
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
{
LOG_ERROR("BUG: Why does this fail the first time????");
}
......@@ -203,7 +203,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
#endif
scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
swjdp->ack = swjdp->ack & 0x7;
......@@ -228,7 +228,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
}
scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
swjdp->ack = swjdp->ack & 0x7;
}
......@@ -261,19 +261,19 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
/* Clear Sticky Error Bits */
scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL);
scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
LOG_DEBUG("swjdp: status 0x%" PRIx32 "", ctrlstat);
dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
LOG_ERROR("Read MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%" PRIx32 "", mem_ap_csw, mem_ap_tar);
}
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
return ERROR_JTAG_DEVICE_ERROR;
}
......@@ -971,7 +971,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
/* Check that we have debug power domains activated */
......@@ -979,7 +979,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
{
LOG_DEBUG("swjdp: wait CDBGPWRUPACK");
dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
alive_sleep(10);
}
......@@ -988,7 +988,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
{
LOG_DEBUG("swjdp: wait CSYSPWRUPACK");
dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
alive_sleep(10);
}
......@@ -1027,7 +1027,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
swjdp_transaction_endcheck(swjdp);
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
mem_ap = ((apid&0x10000)&&((apid&0x0F)!=0));
mem_ap = ((apid&0x10000)&&((apid&0x0F) != 0));
command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
if (apid)
{
......
......@@ -1435,7 +1435,7 @@ int evaluate_shift_imm_thumb(uint16_t opcode, uint32_t address, arm_instruction_
break;
}
if ((imm==0) && (opc!=0))
if ((imm==0) && (opc != 0))
imm = 32;
instruction->info.data_proc.Rd = Rd;
......
......@@ -501,9 +501,9 @@ static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t ex
}
if (target->state != TARGET_HALTED)
{
if ((retval=target_halt(target))!=ERROR_OK)
if ((retval=target_halt(target)) != ERROR_OK)
return retval;
if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
if ((retval=target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK)
{
return retval;
}
......@@ -618,7 +618,7 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem
breakpoint_remove(target, exit_point);
if (retval!=ERROR_OK)
if (retval != ERROR_OK)
return retval;
for (i = 0; i < num_mem_params; i++)
......
......@@ -304,9 +304,9 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in
/* If the target fails to halt due to the breakpoint, force a halt */
if (retval != ERROR_OK || target->state != TARGET_HALTED)
{
if ((retval=target_halt(target))!=ERROR_OK)
if ((retval=target_halt(target)) != ERROR_OK)
return retval;
if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
if ((retval=target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK)
{
return retval;
}
......@@ -356,7 +356,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
for (i = 0; i < num_mem_params; i++)
{
if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value))!=ERROR_OK)
if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
return retval;
}
......
......@@ -141,7 +141,7 @@ void breakpoint_remove(target_t *target, uint32_t address)
void breakpoint_clear_target(target_t *target)
{
breakpoint_t *breakpoint;
while ((breakpoint = target->breakpoints)!=NULL)
while ((breakpoint = target->breakpoints) != NULL)
{
breakpoint_free(target, breakpoint);
}
......@@ -260,7 +260,7 @@ void watchpoint_remove(target_t *target, uint32_t address)
void watchpoint_clear_target(target_t *target)
{
watchpoint_t *watchpoint;
while ((watchpoint = target->watchpoints)!=NULL)
while ((watchpoint = target->watchpoints) != NULL)
{
watchpoint_free(target, watchpoint);
}
......
......@@ -852,7 +852,7 @@ int cortex_m3_assert_reset(target_t *target)
if (target->reset_halt)
{
int retval;
if ((retval = target_halt(target))!=ERROR_OK)
if ((retval = target_halt(target)) != ERROR_OK)
return retval;
}
......
......@@ -125,7 +125,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
/* identify EmbeddedICE version by reading DCC control register */
embeddedice_read_reg(&reg_list[EICE_COMMS_CTRL]);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
{
for (i = 0; i < num_regs; i++)
{
......@@ -204,7 +204,7 @@ int embeddedice_setup(target_t *target)
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
embeddedice_read_reg(dbg_ctrl);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
buf_set_u32(dbg_ctrl->value, 4, 1, 0);
embeddedice_set_reg_w_exec(dbg_ctrl, dbg_ctrl->value);
......
......@@ -282,7 +282,7 @@ int etm_setup(target_t *target)
buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value);
etm_store_reg(etm_ctrl_reg);
if ((retval=jtag_execute_queue())!=ERROR_OK)
if ((retval=jtag_execute_queue()) != ERROR_OK)
return retval;
if ((retval=etm_ctx->capture_driver->init(etm_ctx)) != ERROR_OK)
......
......@@ -688,7 +688,7 @@ int feroceon_examine(struct target_s *target)
int retval;
retval = arm9tdmi_examine(target);
if (retval!=ERROR_OK)
if (retval != ERROR_OK)
return retval;
armv4_5 = target->arch_info;
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment