Commit 4617cd0f authored by Spencer Oliver's avatar Spencer Oliver
Browse files

src: add loader src description



 - add comment where to find the various loaders src files.
Signed-off-by: default avatarSpencer Oliver <ntfreak@users.sourceforge.net>
parent 1fafb669
......@@ -227,6 +227,8 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
return ERROR_OK;
}
/* see contib/loaders/flash/pic32mx.s for src */
static const uint32_t pic32mx_flash_write_code[] = {
/* write: */
0x3C08AA99, /* lui $t0, 0xaa99 */
......
......@@ -773,6 +773,8 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la
return ERROR_OK;
}
/* see contib/loaders/flash/stellaris.s for src */
static const uint8_t stellaris_write_code[] =
{
/*
......
......@@ -446,6 +446,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
struct armv7m_algorithm armv7m_info;
int retval = ERROR_OK;
/* see contib/loaders/flash/stm32x.s for src */
static const uint8_t stm32x_flash_write_code[] = {
/* write: */
0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */
......@@ -462,6 +464,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
0x01, 0xD1, /* bne exit */
0x01, 0x3A, /* subs r2, r2, #1 */
0xED, 0xD1, /* bne write */
/* exit: */
0x00, 0xBE, /* bkpt #0 */
0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */
0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */
......
......@@ -406,6 +406,8 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer,
struct arm_algorithm armv4_5_info;
int retval = ERROR_OK;
/* see contib/loaders/flash/str7x.s for src */
static const uint32_t str7x_flash_write_code[] = {
/* write: */
0xe3a04201, /* mov r4, #0x10000000 */
......
......@@ -364,6 +364,8 @@ static int str9x_write_block(struct flash_bank *bank,
struct arm_algorithm armv4_5_info;
int retval = ERROR_OK;
/* see contib/loaders/flash/str9x.s for src */
static const uint32_t str9x_flash_write_code[] = {
/* write: */
0xe3c14003, /* bic r4, r1, #3 */
......
......@@ -1307,6 +1307,8 @@ int arm_checksum_memory(struct target *target,
uint32_t i;
uint32_t exit_var = 0;
/* see contib/loaders/checksum/armv4_5_crc.s for src */
static const uint32_t arm_crc_code[] = {
0xE1A02000, /* mov r2, r0 */
0xE3E00000, /* mov r0, #0xffffffff */
......
......@@ -562,6 +562,8 @@ int armv7m_checksum_memory(struct target *target,
struct reg_param reg_params[2];
int retval;
/* see contib/loaders/checksum/armv7m_crc.s for src */
static const uint16_t cortex_m3_crc_code[] = {
0x4602, /* mov r2, r0 */
0xF04F, 0x30FF, /* mov r0, #0xffffffff */
......
......@@ -613,6 +613,8 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
int retval;
uint32_t i;
/* see contib/loaders/checksum/mips32.s for src */
static const uint32_t mips_crc_code[] =
{
0x248C0000, /* addiu $t4, $a0, 0 */
......
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