Commit 40580e2d authored by oharboe's avatar oharboe
Browse files

Zach Welch <zw@superlucidity.net> fix -Werror warnings

git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 7989000e
......@@ -55,7 +55,7 @@ const unsigned char bit_reverse_table256[] =
u8* buf_cpy(u8 *from, u8 *to, int size)
{
int num_bytes = CEIL(size, 8);
unsigned int num_bytes = CEIL(size, 8);
unsigned int i;
if (from == NULL)
......@@ -244,7 +244,7 @@ char* buf_to_str(const u8 *buf, int buf_len, int radix)
int str_to_buf(const char *str, int str_len, u8 *buf, int buf_len, int radix)
{
char *charbuf;
u32 tmp;
char tmp;
float factor;
u8 *b256_buf;
int b256_len;
......
......@@ -1758,7 +1758,7 @@ static int jtag_tap_configure_cmd( Jim_GetOptInfo *goi, jtag_tap_t * tap)
jteap = tap->event_action;
/* replace existing? */
while (jteap) {
if (jteap->event == n->value) {
if (jteap->event == (enum jtag_tap_event)n->value) {
break;
}
jteap = jteap->next;
......
......@@ -268,7 +268,7 @@ ep1_memory_write(
USB_TIMEOUT_MS
);
if(usb_ret < sizeof(usb_buffer)) {
if((size_t)usb_ret < sizeof(usb_buffer)) {
break;
}
......@@ -363,7 +363,7 @@ dtc_load_from_buffer(
buffer += sizeof(*header);
length -= sizeof(*header);
if(length < header->length + 1) {
if(length < (size_t)header->length + 1) {
LOG_ERROR("Malformed DTC image\n");
exit(1);
}
......@@ -605,8 +605,8 @@ static
struct {
dtc_reply_queue_entry_t *rq_head;
dtc_reply_queue_entry_t *rq_tail;
int cmd_index;
int reply_index;
u32 cmd_index;
u32 reply_index;
u8 cmd_buffer[USB_EP2BANK_SIZE];
} dtc_queue;
......@@ -617,7 +617,7 @@ struct {
static
struct {
int length;
u32 length;
u32 buffer;
} tap_state_queue;
......
......@@ -161,7 +161,7 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
xilinx_bit_file_t bit_file;
int retval;
int i;
unsigned int i;
scan_field_t field;
......
......@@ -40,7 +40,7 @@
int read_section(FILE *input_file, int length_size, char section, u32 *buffer_length, u8 **buffer)
{
u8 length_buffer[4];
u32 length;
int length;
char section_char;
int read_count;
......
......@@ -348,7 +348,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len)
char local_buffer[1024];
local_buffer[0] = '$';
if (len+4 <= sizeof(local_buffer))
if ((size_t)len + 4 <= sizeof(local_buffer))
{
/* performance gain on smaller packets by only a single call to gdb_write() */
memcpy(local_buffer+1, buffer, len++);
......@@ -1213,7 +1213,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac
{
hex_buffer = malloc(len * 2 + 1);
int i;
u32 i;
for (i = 0; i < len; i++)
{
u8 t = buffer[i];
......@@ -1243,7 +1243,7 @@ int gdb_write_memory_packet(connection_t *connection, target_t *target, char *pa
u8 *buffer;
int i;
u32 i;
int retval;
/* skip command character */
......@@ -1540,12 +1540,12 @@ static int decode_xfer_read(char *buf, char **annex, int *ofs, unsigned int *len
int gdb_calc_blocksize(flash_bank_t *bank)
{
int i;
int block_size = 0xffffffff;
u32 i;
u32 block_size = 0xffffffff;
/* loop through all sectors and return smallest sector size */
for (i = 0; i < bank->num_sectors; i++)
for (i = 0; i < (u32)bank->num_sectors; i++)
{
if (bank->sectors[i].size < block_size)
block_size = bank->sectors[i].size;
......
......@@ -103,7 +103,7 @@ const char *svf_trst_mode_name[4] =
"ABSENT"
};
char *svf_tap_state_name[16];
char *svf_tap_state_name[TAP_NUM_STATES];
#define XXR_TDI (1 << 0)
#define XXR_TDO (1 << 1)
......@@ -316,7 +316,7 @@ static int handle_svf_command(struct command_context_s *cmd_ctx, char *cmd, char
svf_buffer_size = 2 * SVF_MAX_BUFFER_SIZE_TO_COMMIT;
memcpy(&svf_para, &svf_para_init, sizeof(svf_para));
for (i = 0; i < dimof(svf_tap_state_name); i++)
for (i = 0; i < (int)dimof(svf_tap_state_name); i++)
{
svf_tap_state_name[i] = (char *)tap_state_name(i);
}
......@@ -515,7 +515,7 @@ static int svf_tap_state_is_stable(tap_state_t state)
static int svf_tap_state_is_valid(tap_state_t state)
{
return ((state >= 0) && (state < sizeof(svf_tap_state_name)));
return state >= 0 && state < TAP_NUM_STATES;
}
static int svf_find_string_in_array(char *str, char **strs, int num_of_element)
......
......@@ -32,7 +32,7 @@
typedef struct arm720t_common_s
{
int common_magic;
u32 common_magic;
armv4_5_mmu_common_t armv4_5_mmu;
arm7tdmi_common_t arm7tdmi_common;
u32 cp15_control_reg;
......
......@@ -655,7 +655,8 @@ int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
u32 *data;
int i, retval = ERROR_OK;
int retval = ERROR_OK;
u32 i;
data = malloc(size * (sizeof(u32)));
......@@ -1956,7 +1957,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
u32 reg[16];
int num_accesses = 0;
u32 num_accesses = 0;
int thisrun_accesses;
int i;
u32 cpsr;
......@@ -2133,7 +2134,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
u32 reg[16];
int num_accesses = 0;
u32 num_accesses = 0;
int thisrun_accesses;
int i;
u32 cpsr;
......@@ -2466,7 +2467,7 @@ int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
0x04C11DB7 /* CRC32XOR: .word 0x04C11DB7 */
};
int i;
u32 i;
if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
{
......@@ -2518,7 +2519,7 @@ int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u
reg_param_t reg_params[3];
armv4_5_algorithm_t armv4_5_info;
int retval;
int i;
u32 i;
u32 erase_check_code[] =
{
......
......@@ -40,7 +40,7 @@
typedef struct arm7_9_common_s
{
int common_magic;
u32 common_magic;
arm_jtag_t jtag_info;
reg_cache_t *eice_cache;
......
......@@ -32,7 +32,7 @@
typedef struct arm920t_common_s
{
int common_magic;
u32 common_magic;
armv4_5_mmu_common_t armv4_5_mmu;
arm9tdmi_common_t arm9tdmi_common;
u32 cp15_control_reg;
......
......@@ -32,7 +32,7 @@
typedef struct arm926ejs_common_s
{
int common_magic;
u32 common_magic;
armv4_5_mmu_common_t armv4_5_mmu;
arm9tdmi_common_t arm9tdmi_common;
int (*read_cp15)(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 *value);
......
......@@ -30,9 +30,9 @@ typedef struct arm_jtag_s
{
jtag_tap_t *tap;
int scann_size;
u32 scann_size;
u32 scann_instr;
int cur_scan_chain;
u32 cur_scan_chain;
u32 intest_instr;
} arm_jtag_t;
......
......@@ -231,7 +231,7 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
}
}
if (armv4_5_target->core_mode != (value & 0x1f))
if (armv4_5_target->core_mode != (enum armv4_5_mode)(value & 0x1f))
{
LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
armv4_5_target->core_mode = value & 0x1f;
......
......@@ -591,7 +591,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
0x1DB7, 0x04C1 /* CRC32XOR: .word 0x04C11DB7 */
};
int i;
u32 i;
if (target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm) != ERROR_OK)
{
......@@ -640,7 +640,7 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
reg_param_t reg_params[3];
armv7m_algorithm_t armv7m_info;
int retval;
int i;
u32 i;
u16 erase_check_code[] =
{
......
......@@ -1475,7 +1475,7 @@ int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer)
swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
u8 data;
u8 ctrl;
int i;
u32 i;
for (i = 0; i < (size * 4); i++)
{
......
......@@ -484,7 +484,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
u8 field1_out[1];
u8 field2_out[1];
int retval;
int hsact;
u32 hsact;
struct timeval lap;
struct timeval now;
......@@ -544,7 +544,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
gettimeofday(&now, NULL);
}
while ((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000 <= timeout);
while ((u32)((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000) <= timeout);
return ERROR_TARGET_TIMEOUT;
}
......
......@@ -453,7 +453,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
arm7_9->etm_ctx->capture_driver_priv = etb;
etb->tap = tap;
etb->cur_scan_chain = -1;
etb->cur_scan_chain = ~0UL;
etb->reg_cache = NULL;
etb->ram_width = 0;
etb->ram_depth = 0;
......
......@@ -46,17 +46,17 @@ typedef struct etb_s
{
etm_context_t *etm_ctx;
jtag_tap_t *tap;
int cur_scan_chain;
u32 cur_scan_chain;
reg_cache_t *reg_cache;
/* ETB parameters */
int ram_depth;
int ram_width;
u32 ram_depth;
u32 ram_width;
} etb_t;
typedef struct etb_reg_s
{
int addr;
u32 addr;
etb_t *etb;
} etb_reg_t;
......
......@@ -647,7 +647,7 @@ int etmv1_branch_address(etm_context_t *ctx)
u8 packet;
int shift = 0;
int apo;
int i;
u32 i;
/* quit analysis if less than two cycles are left in the trace
* because we can't extract the APO */
......@@ -998,7 +998,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
if (((instruction.type == ARM_B) ||
(instruction.type == ARM_BL) ||
(instruction.type == ARM_BLX)) &&
(instruction.info.b_bl_bx_blx.target_address != -1))
(instruction.info.b_bl_bx_blx.target_address != ~0UL))
{
next_pc = instruction.info.b_bl_bx_blx.target_address;
}
......@@ -1543,7 +1543,7 @@ int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char *
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
int i;
u32 i;
if (argc != 1)
{
......@@ -1611,7 +1611,7 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char *
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
int i;
u32 i;
if (argc != 1)
{
......
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