Commit 1840226d authored by zwelch's avatar zwelch
Browse files

Transform 'u32' to 'uint32_t' in src/flash.

- Replace '\([^_]\)u32' with '\1uint32_t'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2280 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 3c2eabd2
......@@ -33,9 +33,9 @@ static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *
static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int aduc702x_probe(struct flash_bank_s *bank);
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int aduc702x_protect_check(struct flash_bank_s *bank);
......@@ -54,14 +54,14 @@ static int aduc702x_set_write_enable(target_t *target, int enable);
#define ADUC702x_FLASH_FEEHIDE (7*4)
typedef struct {
u32 feesta;
u32 feemod;
u32 feecon;
u32 feedat;
u32 feeadr;
u32 feesign;
u32 feepro;
u32 feehide;
uint32_t feesta;
uint32_t feemod;
uint32_t feecon;
uint32_t feedat;
uint32_t feeadr;
uint32_t feesign;
uint32_t feepro;
uint32_t feehide;
} ADUC702x_FLASH_MMIO;
typedef struct
......@@ -111,7 +111,7 @@ static int aduc702x_build_sector_list(struct flash_bank_s *bank)
//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
int i = 0;
u32 offset = 0;
uint32_t offset = 0;
// sector size is 512
bank->num_sectors = bank->size / 512;
......@@ -139,7 +139,7 @@ static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
//int res;
int x;
int count;
//u32 v;
//uint32_t v;
target_t *target = bank->target;
aduc702x_set_write_enable(target, 1);
......@@ -193,13 +193,13 @@ static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int l
return ERROR_FLASH_OPERATION_FAILED;
}
static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
u32 buffer_size = 7000;
uint32_t buffer_size = 7000;
working_area_t *source;
u32 address = bank->base + offset;
uint32_t address = bank->base + offset;
reg_param_t reg_params[6];
armv4_5_algorithm_t armv4_5_info;
int retval = ERROR_OK;
......@@ -218,7 +218,7 @@ static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
r6 - set to 2, used to write flash command
*/
u32 aduc702x_flash_write_code[] = {
uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
......@@ -279,7 +279,7 @@ static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
while (count > 0)
{
u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
target_write_buffer(target, source->address, thisrun_count * 2, buffer);
......@@ -322,9 +322,9 @@ static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
u32 x;
uint32_t x;
uint8_t b;
target_t *target = bank->target;
......@@ -363,7 +363,7 @@ static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, u32
return ERROR_OK;
}
int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
......
......@@ -47,16 +47,16 @@ static int at91sam7_register_commands(struct command_context_s *cmd_ctx);
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int at91sam7_probe(struct flash_bank_s *bank);
//static int at91sam7_auto_probe(struct flash_bank_s *bank);
static int at91sam7_erase_check(struct flash_bank_s *bank);
static int at91sam7_protect_check(struct flash_bank_s *bank);
static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
......@@ -75,9 +75,9 @@ flash_driver_t at91sam7_flash =
.info = at91sam7_info
};
static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
......@@ -111,9 +111,9 @@ static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
return ERROR_OK;
}
static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number)
{
u32 fsr;
uint32_t fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
return fsr;
......@@ -124,7 +124,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
u32 mckr, mcfr, pllr, mor;
uint32_t mckr, mcfr, pllr, mor;
unsigned long tmp = 0, mainfreq;
/* Read Clock Generator Main Oscillator Register */
......@@ -201,7 +201,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
/* Setup the timimg registers for nvbits or normal flash */
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
uint32_t fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -247,9 +247,9 @@ static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
at91sam7_info->flashmode = mode;
}
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout)
{
u32 status;
uint32_t status;
while ((!((status = at91sam7_get_flash_status(bank->target, bank->bank_number)) & waitbits)) && (timeout-- > 0))
{
......@@ -276,7 +276,7 @@ static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeo
/* Send one command to the AT91SAM flash controller */
static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
{
u32 fcr;
uint32_t fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -311,15 +311,15 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
uint16_t bnk, sec;
uint16_t arch;
u32 cidr;
uint32_t cidr;
uint8_t banks_num = 0;
uint16_t num_nvmbits = 0;
uint16_t sectors_num = 0;
uint16_t pages_per_sector = 0;
uint16_t page_size = 0;
u32 ext_freq;
u32 bank_size;
u32 base_address = 0;
uint32_t ext_freq;
uint32_t bank_size;
uint32_t base_address = 0;
char *target_name = "Unknown";
at91sam7_info = t_bank->driver_priv;
......@@ -622,7 +622,7 @@ static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
uint16_t retval;
u32 blank;
uint32_t blank;
uint16_t fast_check;
uint8_t *buffer;
uint16_t nSector;
......@@ -687,7 +687,7 @@ static int at91sam7_erase_check(struct flash_bank_s *bank)
static int at91sam7_protect_check(struct flash_bank_s *bank)
{
uint8_t lock_pos, gpnvm_pos;
u32 status;
uint32_t status;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -750,9 +750,9 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *
at91sam7_flash_bank_t *at91sam7_info;
target_t *target = t_bank->target;
u32 base_address;
u32 bank_size;
u32 ext_freq;
uint32_t base_address;
uint32_t bank_size;
uint32_t ext_freq;
int chip_width;
int bus_width;
......@@ -860,7 +860,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
u32 nbytes, pos;
uint32_t nbytes, pos;
uint8_t *buffer;
uint8_t erase_all;
......@@ -926,9 +926,9 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u32 cmd;
uint32_t cmd;
int sector;
u32 pagen;
uint32_t pagen;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -974,13 +974,13 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l
return ERROR_OK;
}
static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
u32 dst_min_alignment, wcount, bytes_remaining = count;
u32 first_page, last_page, pagen, buffer_pos;
uint32_t dst_min_alignment, wcount, bytes_remaining = count;
uint32_t first_page, last_page, pagen, buffer_pos;
if (at91sam7_info->cidr == 0)
{
......@@ -1128,7 +1128,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char
flash_bank_t *bank;
int bit;
uint8_t flashcmd;
u32 status;
uint32_t status;
at91sam7_flash_bank_t *at91sam7_info;
int retval;
......
......@@ -28,7 +28,7 @@
typedef struct at91sam7_flash_bank_s
{
/* chip id register */
u32 cidr;
uint32_t cidr;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
......@@ -62,10 +62,10 @@ typedef struct at91sam7_flash_bank_s
/* main clock status */
uint8_t mck_valid;
u32 mck_freq;
uint32_t mck_freq;
/* external clock frequency */
u32 ext_freq;
uint32_t ext_freq;
} at91sam7_flash_bank_t;
......
......@@ -60,7 +60,7 @@ static int avrf_register_commands(struct command_context_s *cmd_ctx);
static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int avrf_erase(struct flash_bank_s *bank, int first, int last);
static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int avrf_probe(struct flash_bank_s *bank);
static int avrf_auto_probe(struct flash_bank_s *bank);
//static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
......@@ -70,7 +70,7 @@ static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
extern int avr_jtag_sendinstr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out);
extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
extern int avr_jtag_senddat(jtag_tap_t *tap, uint32_t *dr_in, uint32_t dr_out, int len);
extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
......@@ -78,8 +78,8 @@ extern int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int
extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
extern int mcu_write_ir_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
extern int mcu_write_dr_u32(jtag_tap_t *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
extern int mcu_execute_queue(void);
flash_driver_t avr_flash =
......@@ -98,7 +98,7 @@ flash_driver_t avr_flash =
};
/* avr program functions */
static int avr_jtag_reset(avr_common_t *avr, u32 reset)
static int avr_jtag_reset(avr_common_t *avr, uint32_t reset)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
......@@ -106,7 +106,7 @@ static int avr_jtag_reset(avr_common_t *avr, u32 reset)
return ERROR_OK;
}
static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
static int avr_jtag_read_jtagid(avr_common_t *avr, uint32_t *id)
{
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
......@@ -140,7 +140,7 @@ static int avr_jtagprg_leaveprogmode(avr_common_t *avr)
static int avr_jtagprg_chiperase(avr_common_t *avr)
{
u32 poll_value;
uint32_t poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
......@@ -161,9 +161,9 @@ static int avr_jtagprg_chiperase(avr_common_t *avr)
return ERROR_OK;
}
static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, u32 buf_size, u32 addr, u32 page_size)
static int avr_jtagprg_writeflashpage(avr_common_t *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
{
u32 i, poll_value;
uint32_t i, poll_value;
avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
......@@ -249,11 +249,11 @@ static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
return ERROR_OK;
}
static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count)
static int avrf_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
target_t *target = bank->target;
avr_common_t *avr = target->arch_info;
u32 cur_size, cur_buffer_size, page_size;
uint32_t cur_size, cur_buffer_size, page_size;
if (bank->target->state != TARGET_HALTED)
{
......@@ -307,7 +307,7 @@ static int avrf_probe(struct flash_bank_s *bank)
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
u32 device_id;
uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
......@@ -388,7 +388,7 @@ static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
avr_common_t *avr = target->arch_info;
avrf_type_t *avr_info = NULL;
int i;
u32 device_id;
uint32_t device_id;
if (bank->target->state != TARGET_HALTED)
{
......
......@@ -33,7 +33,7 @@ static int cfi_register_commands(struct command_context_s *cmd_ctx);
static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int cfi_erase(struct flash_bank_s *bank, int first, int last);
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count);
static int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
static int cfi_probe(struct flash_bank_s *bank);
static int cfi_auto_probe(struct flash_bank_s *bank);
static int cfi_protect_check(struct flash_bank_s *bank);
......@@ -109,8 +109,8 @@ static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
}
}
/* inline u32 flash_address(flash_bank_t *bank, int sector, u32 offset) */
static __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
/* inline uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset) */
static __inline__ uint32_t flash_address(flash_bank_t *bank, int sector, uint32_t offset)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
......@@ -161,7 +161,7 @@ static void cfi_command(flash_bank_t *bank, uint8_t cmd, uint8_t *cmd_buf)
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
......@@ -178,7 +178,7 @@ static uint8_t cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
uint8_t data[CFI_MAX_BUS_WIDTH];
......@@ -203,7 +203,7 @@ static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
}
}
static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
......@@ -225,7 +225,7 @@ static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
return data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
}
static u32 cfi_query_u32(flash_bank_t *bank, int sector, u32 offset)
static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
{
target_t *target = bank->target;
cfi_flash_bank_t *cfi_info = bank->driver_priv;
......@@ -979,7 +979,7 @@ static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
/* NOTE:
* The data to flash must not be changed in endian! We write a bytestrem in
* target byte order already. Only the control and status byte lane of the flash
* WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
* WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t
* word (data seems to be in the upper or lower byte lane for uint16_t accesses).
*/
......@@ -1005,9 +1005,9 @@ static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
/* Convert code image to target endian */
/* FIXME create general block conversion fcts in target.c?) */
static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const u32 *src, u32 count)
static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const uint32_t *src, uint32_t count)
{
u32 i;
uint32_t i;
for (i=0; i< count; i++)
{
target_buffer_set_u32(target, dest, *src);
......@@ -1016,7 +1016,7 @@ static void cfi_fix_code_endian(target_t *target, uint8_t *dest, const u32 *src,
}
}
static u32 cfi_command_val(flash_bank_t *bank, uint8_t cmd)
static uint32_t cfi_command_val(flash_bank_t *bank, uint8_t cmd)
{
target_t *target = bank->target;
......@@ -1039,15 +1039,15 @@ static u32 cfi_command_val(flash_bank_t *bank, uint8_t cmd)
}
}
static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
target_t *target = bank->target;
reg_param_t reg_params[7];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
u32 buffer_size = 32768;
u32 write_command_val, busy_pattern_val, error_pattern_val;
uint32_t buffer_size = 32768;
uint32_t write_command_val, busy_pattern_val, error_pattern_val;
/* algorithm register usage:
* r0: source address (in RAM)
......@@ -1059,7 +1059,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
* r6: error test pattern
*/
static const u32 word_32_code[] = {
static const uint32_t word_32_code[] = {
0xe4904004, /* loop: ldr r4, [r0], #4 */
0xe5813000, /* str r3, [r1] */
0xe5814000, /* str r4, [r1] */
......@@ -1076,7 +1076,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
0xeafffffe /* done: b -2 */
};
static const u32 word_16_code[] = {
static const uint32_t word_16_code[] = {
0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
0xe1c130b0, /* strh r3, [r1] */
0xe1c140b0, /* strh r4, [r1] */
......@@ -1093,7 +1093,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
0xeafffffe /* done: b -2 */
};
static const u32 word_8_code[] = {
static const uint32_t word_8_code[] = {
0xe4d04001, /* loop: ldrb r4, [r0], #1 */
0xe5c13000, /* strb r3, [r1] */
0xe5c14000, /* strb r4, [r1] */
......@@ -1110,8 +1110,8 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
0xeafffffe /* done: b -2 */
};
uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE];
const u32 *target_code_src;
u32 target_code_size;
const uint32_t *target_code_src;
uint32_t target_code_size;
int retval = ERROR_OK;
......@@ -1208,8 +1208,8 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
/* Programming main loop */
while (count > 0)
{
u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
u32 wsm_error;
uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
uint32_t wsm_error;
if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
{
......@@ -1229,7 +1229,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32
/* Execute algorithm, assume breakpoint for last instruction */
retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
cfi_info->write_algorithm->address,
cfi_info->write_algorithm->address + target_code_size - sizeof(u32),
cfi_info->write_algorithm->address + target_code_size - sizeof(uint32_t),
10000, /* 10s should be enough for max. 32k of data */
&armv4_5_info);
......@@ -1283,7 +1283,7 @@ cleanup:
return retval;
}
static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 address, u32 count)
static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t address, uint32_t count)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_spansion_pri_ext_t *pri_ext = cfi_info->pri_ext;
......@@ -1291,8 +1291,8 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
reg_param_t reg_params[10];
armv4_5_algorithm_t armv4_5_info;
working_area_t *source;
u32 buffer_size = 32768;
u32 status;
uint32_t buffer_size = 32768;
uint32_t status;
int retval, retvaltemp;
int exit_code = ERROR_OK;
......@@ -1313,7 +1313,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
static const u32 word_32_code[] = {
static const uint32_t word_32_code[] = {
/* 00008100 <sp_32_code>: */
0xe4905004, /* ldr r5, [r0], #4 */
0xe5889000, /* str r9, [r8] */
......@@ -1347,7 +1347,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
0xeafffffe /* b 8154 <sp_32_done> */
};
static const u32 word_16_code[] = {
static const uint32_t word_16_code[] = {
/* 00008158 <sp_16_code>: */
0xe0d050b2, /* ldrh r5, [r0], #2 */
0xe1c890b0, /* strh r9, [r8] */
......@@ -1381,7 +1381,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
0xeafffffe /* b 81ac <sp_16_done> */
};
static const u32 word_8_code[] = {
static const uint32_t word_8_code[] = {
/* 000081b0 <sp_16_code_end>: */
0xe4d05001, /* ldrb r5, [r0], #1 */
0xe5c89000, /* strb r9, [r8] */
......@@ -1424,7 +1424,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
{
uint8_t *target_code;
int target_code_size;
const u32 *src;
const uint32_t *src;
/* convert bus-width dependent algorithm code to correct endiannes */
switch (bank->bus_width)
......@@ -1496,7 +1496,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
while (count > 0)
{
u32 thisrun_count = (count > buffer_size) ? buffer_size : count;
uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;