Commit 0cba0d4d authored by ntfreak's avatar ntfreak
Browse files

- remove target specific variant and use target->variant member

- fix build warning in cortex_m3
- code cleanup - remove trailing lf and convert c++ comments

git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 846a2589
......@@ -25,7 +25,6 @@
#include "replacements.h"
#include "flash.h"
#include "target.h"
......@@ -37,8 +36,6 @@
#include "../target/embeddedice.h"
#include "types.h"
int ecosflash_register_commands(struct command_context_s *cmd_ctx);
int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int ecosflash_erase(struct flash_bank_s *bank, int first, int last);
......@@ -99,7 +96,6 @@ flash_errmsg(int err);
#define FLASH_ERR_DRV_WRONG_PART 0x0d /* Driver does not support device */
#define FLASH_ERR_LOW_VOLTAGE 0x0e /* Not enough juice to complete job */
char *
flash_errmsg(int err)
{
......@@ -185,7 +181,6 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c
return ERROR_OK;
}
int loadDriver(ecosflash_flash_bank_t *info)
{
u32 buf_cnt;
......@@ -228,7 +223,6 @@ int loadDriver(ecosflash_flash_bank_t *info)
return ERROR_OK;
}
static int const OFFSET_ERASE=0x0;
static int const OFFSET_ERASE_SIZE=0x8;
static int const OFFSET_FLASH=0xc;
......@@ -236,7 +230,6 @@ static int const OFFSET_FLASH_SIZE=0x8;
static int const OFFSET_GET_WORKAREA=0x18;
static int const OFFSET_GET_WORKAREA_SIZE=0x4;
int runCode(ecosflash_flash_bank_t *info,
u32 codeStart, u32 codeStop, u32 r0, u32 r1, u32 r2,
u32 *result,
......@@ -368,13 +361,11 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l
return ERROR_OK;
}
int ecosflash_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
int ecosflash_register_commands(struct command_context_s *cmd_ctx)
{
register_command(cmd_ctx, NULL, "ecosflash", NULL, COMMAND_ANY, NULL);
......@@ -382,7 +373,7 @@ int ecosflash_register_commands(struct command_context_s *cmd_ctx)
return ERROR_OK;
}
/*
#if 0
static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
......@@ -403,7 +394,7 @@ static void command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
}
}
}
*/
#endif
u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
{
......@@ -421,7 +412,6 @@ u32 ecosflash_address(struct flash_bank_s *bank, u32 address)
return retval + bank->base;
}
int ecosflash_erase(struct flash_bank_s *bank, int first, int last)
{
struct flash_bank_s *c=bank;
......@@ -434,7 +424,6 @@ int ecosflash_protect(struct flash_bank_s *bank, int set, int first, int last)
return ERROR_OK;
}
int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
ecosflash_flash_bank_t *info = bank->driver_priv;
......@@ -442,7 +431,6 @@ int ecosflash_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count
return eCosBoard_flash(info, buffer, c->base+offset, count);
}
int ecosflash_protect_check(struct flash_bank_s *bank)
{
return ERROR_OK;
......@@ -455,7 +443,6 @@ int ecosflash_info(struct flash_bank_s *bank, char *buf, int buf_size)
return ERROR_OK;
}
u32 ecosflash_get_flash_status(flash_bank_t *bank)
{
return ERROR_OK;
......@@ -475,7 +462,3 @@ int ecosflash_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd,
{
return ERROR_OK;
}
......@@ -466,7 +466,6 @@ int handle_flash_erase_check_command(struct command_context_s *cmd_ctx, char *cm
j, p->sectors[j].offset, p->sectors[j].size, p->sectors[j].size>>10,
erase_state);
}
}
return ERROR_OK;
......@@ -658,7 +657,6 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm
command_print(cmd_ctx, "auto erase enabled");
}
if (argc < 1)
{
return ERROR_COMMAND_SYNTAX_ERROR;
......@@ -743,7 +741,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char
if(count == 0)
return ERROR_OK;
switch(cmd[4])
{
case 'w':
......@@ -804,7 +801,6 @@ int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cmd, char
return retval;
}
if(err == ERROR_OK)
{
float speed;
......
......@@ -126,7 +126,6 @@ flash_driver_t lpc288x_flash =
.info = lpc288x_info
};
int lpc288x_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
......
......@@ -80,7 +80,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio)
target_t *target = mflash_bank->target;
int ret;
// remove alternate function.
/* remove alternate function. */
mask = 0x3u << (gpio.num & 0xF)*2;
addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4;
......@@ -95,7 +95,7 @@ static int pxa270_set_gpio_to_output (mflash_gpio_num_t gpio)
if ((ret = target_write_u32(target, addr, value)) != ERROR_OK)
return ret;
// set direction to output
/* set direction to output */
mask = 0x1u << (gpio.num & 0x1F);
addr = PXA270_GPDR0 + (gpio.num >> 5) * 4;
......@@ -286,7 +286,7 @@ static int mg_dsk_wait(mg_io_type_wait wait, u32 time)
break;
}
// Now we check the error condition!
/* Now we check the error condition! */
if (status & mg_io_rbit_status_error)
{
target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error);
......@@ -634,7 +634,6 @@ static int mg_mflash_read (u32 addr, u8 *buff, u32 len)
LOG_DEBUG("copies %u byte", end_addr - cur_addr);
}
}
free(sect_buff);
......@@ -671,7 +670,6 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len)
}
mg_mflash_write_sects(sect_buff, sect_num, 1);
}
if (cur_addr < end_addr) {
......@@ -697,9 +695,7 @@ static int mg_mflash_write(u32 addr, u8 *buff, u32 len)
memcpy(sect_buff, buff_ptr, end_addr - cur_addr);
LOG_DEBUG("copies %u byte", end_addr - cur_addr);
mg_mflash_write_sects(sect_buff, sect_num, 1);
}
}
free(sect_buff);
......@@ -711,7 +707,7 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch
{
u32 address, buf_cnt;
u8 *buffer;
// TODO : multi-bank support, large file support
/* TODO : multi-bank support, large file support */
fileio_t fileio;
duration_t duration;
char *duration_text;
......@@ -727,7 +723,6 @@ static int mflash_write_command(struct command_context_s *cmd_ctx, char *cmd, ch
mg_mflash_probe();
}
if (fileio_open(&fileio, args[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK) {
return ERROR_FAIL;
}
......@@ -764,7 +759,7 @@ static int mflash_dump_command(struct command_context_s *cmd_ctx, char *cmd, cha
{
u32 address, size_written, size;
u8 *buffer;
// TODO : multi-bank support
/* TODO : multi-bank support */
fileio_t fileio;
duration_t duration;
char *duration_text;
......
......@@ -39,51 +39,51 @@ typedef struct mflash_gpio_drv_s
typedef struct _mg_io_type_drv_info {
mg_io_uint16 general_configuration; // 00
mg_io_uint16 number_of_cylinders; // 01
mg_io_uint16 reserved1; // 02
mg_io_uint16 number_of_heads; // 03
mg_io_uint16 unformatted_bytes_per_track; // 04
mg_io_uint16 unformatted_bytes_per_sector; // 05
mg_io_uint16 sectors_per_track; // 06
mg_io_uint8 vendor_unique1[6]; // 07/08/09
mg_io_uint8 serial_number[20]; // 10~19
mg_io_uint16 buffer_type; // 20
mg_io_uint16 buffer_sector_size; // 21
mg_io_uint16 number_of_ecc_bytes; // 22
mg_io_uint8 firmware_revision[8]; // 23~26
mg_io_uint8 model_number[40]; // 27
mg_io_uint8 maximum_block_transfer; // 47 low byte
mg_io_uint8 vendor_unique2; // 47 high byte
mg_io_uint16 dword_io; // 48
mg_io_uint16 capabilities; // 49
mg_io_uint16 reserved2; // 50
mg_io_uint8 vendor_unique3; // 51 low byte
mg_io_uint8 pio_cycle_timing_mode; // 51 high byte
mg_io_uint8 vendor_unique4; // 52 low byte
mg_io_uint8 dma_cycle_timing_mode; // 52 high byte
mg_io_uint16 translation_fields_valid; // 53 (low bit)
mg_io_uint16 number_of_current_cylinders; // 54
mg_io_uint16 number_of_current_heads; // 55
mg_io_uint16 current_sectors_per_track; // 56
mg_io_uint16 current_sector_capacity_lo; // 57 & 58
mg_io_uint16 current_sector_capacity_hi; // 57 & 58
mg_io_uint8 multi_sector_count; // 59 low
mg_io_uint8 multi_sector_setting_valid; // 59 high (low bit)
mg_io_uint16 total_user_addressable_sectors_lo; // 60 & 61
mg_io_uint16 total_user_addressable_sectors_hi; // 60 & 61
mg_io_uint8 single_dma_modes_supported; // 62 low byte
mg_io_uint8 single_dma_transfer_active; // 62 high byte
mg_io_uint8 multi_dma_modes_supported; // 63 low byte
mg_io_uint8 multi_dma_transfer_active; // 63 high byte
mg_io_uint16 general_configuration; /* 00 */
mg_io_uint16 number_of_cylinders; /* 01 */
mg_io_uint16 reserved1; /* 02 */
mg_io_uint16 number_of_heads; /* 03 */
mg_io_uint16 unformatted_bytes_per_track; /* 04 */
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
mg_io_uint16 sectors_per_track; /* 06 */
mg_io_uint8 vendor_unique1[6]; /* 07/08/09 */
mg_io_uint8 serial_number[20]; /* 10~19 */
mg_io_uint16 buffer_type; /* 20 */
mg_io_uint16 buffer_sector_size; /* 21 */
mg_io_uint16 number_of_ecc_bytes; /* 22 */
mg_io_uint8 firmware_revision[8]; /* 23~26 */
mg_io_uint8 model_number[40]; /* 27 */
mg_io_uint8 maximum_block_transfer; /* 47 low byte */
mg_io_uint8 vendor_unique2; /* 47 high byte */
mg_io_uint16 dword_io; /* 48 */
mg_io_uint16 capabilities; /* 49 */
mg_io_uint16 reserved2; /* 50 */
mg_io_uint8 vendor_unique3; /* 51 low byte */
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
mg_io_uint8 vendor_unique4; /* 52 low byte */
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */
mg_io_uint16 number_of_current_cylinders; /* 54 */
mg_io_uint16 number_of_current_heads; /* 55 */
mg_io_uint16 current_sectors_per_track; /* 56 */
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */
mg_io_uint8 multi_sector_count; /* 59 low */
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
mg_io_uint16 adv_pio_mode;
mg_io_uint16 min_dma_cyc;
mg_io_uint16 recommend_dma_cyc;
......@@ -140,53 +140,53 @@ typedef struct mflash_bank_s
extern int mflash_register_commands(struct command_context_s *cmd_ctx);
extern int mflash_init_drivers(struct command_context_s *cmd_ctx);
#define MG_MFLASH_SECTOR_SIZE (0x200) //512Bytes = 2^9
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
#define MG_BUFFER_OFFSET 0x8000
#define MG_REG_OFFSET 0xC000
#define MG_REG_FEATURE 0x2 // write case
#define MG_REG_ERROR 0x2 // read case
#define MG_REG_FEATURE 0x2 /* write case */
#define MG_REG_ERROR 0x2 /* read case */
#define MG_REG_SECT_CNT 0x4
#define MG_REG_SECT_NUM 0x6
#define MG_REG_CYL_LOW 0x8
#define MG_REG_CYL_HIGH 0xA
#define MG_REG_DRV_HEAD 0xC
#define MG_REG_COMMAND 0xE // write case
#define MG_REG_STATUS 0xE // read case
#define MG_REG_COMMAND 0xE /* write case */
#define MG_REG_STATUS 0xE /* read case */
#define MG_REG_DRV_CTRL 0x10
#define MG_REG_BURST_CTRL 0x12
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 // msec
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 // msec
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 // msec
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
typedef enum _mg_io_type_wait{
mg_io_wait_bsy = 1,
mg_io_wait_not_bsy = 2,
mg_io_wait_rdy = 3,
mg_io_wait_drq = 4, // wait for data request
mg_io_wait_drq_noerr = 5, // wait for DRQ but ignore the error status bit
mg_io_wait_rdy_noerr = 6 // wait for ready, but ignore error status bit
mg_io_wait_drq = 4, /* wait for data request */
mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */
mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */
} mg_io_type_wait;
//= "Status Register" bit masks.
/*= "Status Register" bit masks. */
typedef enum _mg_io_type_rbit_status{
mg_io_rbit_status_error = 0x01, // error bit in status register
mg_io_rbit_status_corrected_error = 0x04, // corrected error in status register
mg_io_rbit_status_data_req = 0x08, // data request bit in status register
mg_io_rbit_status_seek_done = 0x10, // DSC - Drive Seek Complete
mg_io_rbit_status_write_fault = 0x20, // DWF - Drive Write Fault
mg_io_rbit_status_error = 0x01, /* error bit in status register */
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
mg_io_rbit_status_ready = 0x40,
mg_io_rbit_status_busy = 0x80
} mg_io_type_rbit_status;
//= "Error Register" bit masks.
/*= "Error Register" bit masks. */
typedef enum _mg_io_type_rbit_error{
mg_io_rbit_err_general = 0x01,
......@@ -197,22 +197,22 @@ typedef enum _mg_io_type_rbit_error{
} mg_io_type_rbit_error;
//= "Device Control Register" bit.
/* = "Device Control Register" bit. */
typedef enum _mg_io_type_rbit_devc{
mg_io_rbit_devc_intr = 0x02,// interrupt enable bit (1:disable, 0:enable)
mg_io_rbit_devc_srst = 0x04 // softwrae reset bit (1:assert, 0:de-assert)
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */
} mg_io_type_rbit_devc;
// "Drive Select/Head Register" values.
/* "Drive Select/Head Register" values. */
typedef enum _mg_io_type_rval_dev{
mg_io_rval_dev_must_be_on = 0x80, // These 1 bits are always on
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on),// Master
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on),// Slave0
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on),// Slave1
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on),// Slave2
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
} mg_io_type_rval_dev;
......@@ -226,12 +226,12 @@ typedef enum _mg_io_type_cmd
mg_io_cmd_readmul =0xC4,
mg_io_cmd_writemul =0xC5,
mg_io_cmd_idle =0x97,//0xE3
mg_io_cmd_idle_immediate =0x95,//0xE1
mg_io_cmd_idle =0x97, /* 0xE3 */
mg_io_cmd_idle_immediate =0x95, /* 0xE1 */
mg_io_cmd_setsleep =0x99,//0xE6
mg_io_cmd_stdby =0x96,//0xE2
mg_io_cmd_stdby_immediate =0x94,//0xE0
mg_io_cmd_setsleep =0x99, /* 0xE6 */
mg_io_cmd_stdby =0x96, /* 0xE2 */
mg_io_cmd_stdby_immediate =0x94, /* 0xE0 */
mg_io_cmd_identify =0xEC,
mg_io_cmd_set_feature =0xEF,
......
......@@ -1524,4 +1524,3 @@ int handle_nand_raw_access_command(struct command_context_s *cmd_ctx, char *cmd,
return ERROR_OK;
}
......@@ -83,7 +83,6 @@ typedef struct stellaris_flash_bank_s
#define AMASK 1
#define PMASK 2
/* Flash Controller Command bits */
#define FMC_WRKEY (0xA442<<16)
#define FMC_COMT (1<<3)
......
......@@ -100,4 +100,3 @@ typedef struct stm32x_mem_layout_s {
} stm32x_mem_layout_t;
#endif /* STM32X_H */
......@@ -717,4 +717,3 @@ int str7x_handle_disable_jtag_command(struct command_context_s *cmd_ctx, char *c
return ERROR_OK;
}
......@@ -109,4 +109,3 @@ typedef struct str7x_mem_layout_s {
} str7x_mem_layout_t;
#endif /* STR7X_H */
......@@ -61,4 +61,3 @@ enum str9x_status_codes
#define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */
#endif /* STR9X_H */
......@@ -356,8 +356,8 @@ void command_print_n(command_context_t *context, char *format, ...)
* The latter bit isn't precisely neat, but will do for now.
*/
LOG_USER_N("%s", string);
// We already printed it above
//command_output_text(context, string);
/* We already printed it above */
/* command_output_text(context, string); */
free(string);
}
......@@ -381,8 +381,8 @@ void command_print(command_context_t *context, char *format, ...)
* The latter bit isn't precisely neat, but will do for now.
*/
LOG_USER_N("%s", string);
// We already printed it above
//command_output_text(context, string);
/* We already printed it above */
/* command_output_text(context, string); */
free(string);
}
......@@ -644,7 +644,6 @@ static char* openocd_jim_fgets(char *s, int size, void *cookie)
return NULL;
}
static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
if (argc != 2)
......@@ -801,7 +800,7 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd
Jim_CreateCommand(interp, name, cmd, NULL, NULL);
/* FIX!!! it would be prettier to invoke add_help_text...
accumulate help text in Tcl helptext list. */
* accumulate help text in Tcl helptext list. */
Jim_Obj *helptext=Jim_GetGlobalVariableStr(interp, "ocd_helptext", JIM_ERRMSG);
if (Jim_IsShared(helptext))
helptext = Jim_DuplicateObj(interp, helptext);
......@@ -816,7 +815,6 @@ void register_jim(struct command_context_s *cmd_ctx, const char *name, int (*cmd
Jim_ListAppendElement(interp, helptext, cmd_entry);
}
/* return global variable long value or 0 upon failure */
long jim_global_long(const char *variable)
{
......
......@@ -91,7 +91,6 @@ char *find_file(const char *file)
return NULL;
}
FILE *open_file_from_path (char *file, char *mode)
{
if (mode[0]!='r')
......
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