Commit 0bba8327 authored by mifi's avatar mifi
Browse files

The following patches was applied:

- openocd-flash-static-keyword-v3.patch
- openocd-lpc2000-fix-erase-obo.patch
- openocd-jlink-fix-sign-ptr-warn.patch
- openocd-wextra-etm.patch
- openocd-wextra-jtag.patch
- openocd-add-new-tap-symbols-v6.patch

Many thanks to  Zach Welch <zw(at)superlucidity.net>

git-svn-id: svn://svn.berlios.de/openocd/trunk@1462 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 13de2d2f
......@@ -36,19 +36,19 @@
#include <string.h>
#include <unistd.h>
int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int aduc702x_register_commands(struct command_context_s *cmd_ctx);
int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int aduc702x_probe(struct flash_bank_s *bank);
int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
int aduc702x_protect_check(struct flash_bank_s *bank);
int aduc702x_build_sector_list(struct flash_bank_s *bank);
int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
int aduc702x_set_write_enable(target_t *target, int enable);
static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
static int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int aduc702x_probe(struct flash_bank_s *bank);
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
static int aduc702x_protect_check(struct flash_bank_s *bank);
static int aduc702x_build_sector_list(struct flash_bank_s *bank);
static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
static int aduc702x_set_write_enable(target_t *target, int enable);
#define ADUC702x_FLASH 0xfffff800
#define ADUC702x_FLASH_FEESTA (0*4)
......@@ -91,14 +91,14 @@ flash_driver_t aduc702x_flash =
.info = aduc702x_info
};
int aduc702x_register_commands(struct command_context_s *cmd_ctx)
static int aduc702x_register_commands(struct command_context_s *cmd_ctx)
{
return ERROR_OK;
}
/* flash bank aduc702x 0 0 0 0 <target#>
* The ADC7019-28 devices all have the same flash layout */
int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
aduc702x_flash_bank_t *nbank;
......@@ -113,7 +113,7 @@ int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
return ERROR_OK;
}
int aduc702x_build_sector_list(struct flash_bank_s *bank)
static int aduc702x_build_sector_list(struct flash_bank_s *bank)
{
//aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
......@@ -135,13 +135,13 @@ int aduc702x_build_sector_list(struct flash_bank_s *bank)
return ERROR_OK;
}
int aduc702x_protect_check(struct flash_bank_s *bank)
static int aduc702x_protect_check(struct flash_bank_s *bank)
{
printf("aduc702x_protect_check not implemented yet.\n");
return ERROR_OK;
}
int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
{
//int res;
int x;
......@@ -194,13 +194,13 @@ int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_OK;
}
int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
printf("aduc702x_protect not implemented yet.\n");
return ERROR_FLASH_OPERATION_FAILED;
}
int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
static int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -329,7 +329,7 @@ int aduc702x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
/* All-JTAG, single-access method. Very slow. Used only if there is no
* working area available. */
int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
static int aduc702x_write_single(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
int x;
u8 b;
......@@ -399,12 +399,12 @@ int aduc702x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
return ERROR_OK;
}
int aduc702x_probe(struct flash_bank_s *bank)
static int aduc702x_probe(struct flash_bank_s *bank)
{
return ERROR_OK;
}
int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
snprintf(buf, buf_size, "aduc702x flash driver info" );
return ERROR_OK;
......@@ -412,7 +412,7 @@ int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
/* sets FEEMOD bit 3
* enable = 1 enables writes & erases, 0 disables them */
int aduc702x_set_write_enable(target_t *target, int enable)
static int aduc702x_set_write_enable(target_t *target, int enable)
{
// don't bother to preserve int enable bit here
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
......@@ -425,7 +425,7 @@ int aduc702x_set_write_enable(target_t *target, int enable)
*
* this function sleeps 1ms between checks (after the first one),
* so in some cases may slow things down without a usleep after the first read */
int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
{
u8 v = 4;
......
......@@ -53,22 +53,22 @@
#include <string.h>
#include <unistd.h>
int at91sam7_register_commands(struct command_context_s *cmd_ctx);
int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int at91sam7_probe(struct flash_bank_s *bank);
int at91sam7_auto_probe(struct flash_bank_s *bank);
int at91sam7_erase_check(struct flash_bank_s *bank);
int at91sam7_protect_check(struct flash_bank_s *bank);
int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
u32 at91sam7_get_flash_status(target_t *target, int bank_number);
void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int at91sam7_register_commands(struct command_context_s *cmd_ctx);
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last);
static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int at91sam7_probe(struct flash_bank_s *bank);
//static int at91sam7_auto_probe(struct flash_bank_s *bank);
static int at91sam7_erase_check(struct flash_bank_s *bank);
static int at91sam7_protect_check(struct flash_bank_s *bank);
static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen);
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_flash =
{
......@@ -85,13 +85,14 @@ flash_driver_t at91sam7_flash =
.info = at91sam7_info
};
u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static u32 MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static u32 MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static u32 MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
long SRAMSIZ[16] = {
#if 0
static long SRAMSIZ[16] = {
-1,
0x0400, /* 1K */
0x0800, /* 2K */
......@@ -109,8 +110,9 @@ long SRAMSIZ[16] = {
0x18000, /* 96K */
0x80000, /* 512K */
};
#endif
int at91sam7_register_commands(struct command_context_s *cmd_ctx)
static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
{
command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7_new", NULL, COMMAND_ANY, NULL);
......@@ -119,7 +121,7 @@ int at91sam7_register_commands(struct command_context_s *cmd_ctx)
return ERROR_OK;
}
u32 at91sam7_get_flash_status(target_t *target, int bank_number)
static u32 at91sam7_get_flash_status(target_t *target, int bank_number)
{
u32 fsr;
target_read_u32(target, MC_FSR[bank_number], &fsr);
......@@ -128,7 +130,7 @@ u32 at91sam7_get_flash_status(target_t *target, int bank_number)
}
/* Read clock configuration and set at91sam7_info->mck_freq */
void at91sam7_read_clock_info(flash_bank_t *bank)
static void at91sam7_read_clock_info(flash_bank_t *bank)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -207,7 +209,7 @@ void at91sam7_read_clock_info(flash_bank_t *bank)
}
/* Setup the timimg registers for nvbits or normal flash */
void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -255,7 +257,7 @@ void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
at91sam7_info->flashmode = mode;
}
u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
{
u32 status;
......@@ -282,7 +284,7 @@ u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
}
/* Send one command to the AT91SAM flash controller */
int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
static int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
{
u32 fcr;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -311,7 +313,7 @@ int at91sam7_flash_command(struct flash_bank_s *bank, u8 cmd, u16 pagen)
}
/* Read device id register, main clock frequency register and fill in driver info structure */
int at91sam7_read_part_info(struct flash_bank_s *bank)
static int at91sam7_read_part_info(struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
......@@ -626,7 +628,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank)
return ERROR_OK;
}
int at91sam7_erase_check(struct flash_bank_s *bank)
static int at91sam7_erase_check(struct flash_bank_s *bank)
{
target_t *target = bank->target;
u16 retval;
......@@ -692,7 +694,7 @@ int at91sam7_erase_check(struct flash_bank_s *bank)
return ERROR_OK;
}
int at91sam7_protect_check(struct flash_bank_s *bank)
static int at91sam7_protect_check(struct flash_bank_s *bank)
{
u8 lock_pos, gpnvm_pos;
u32 status;
......@@ -752,7 +754,7 @@ int at91sam7_protect_check(struct flash_bank_s *bank)
# flash bank at91sam7 0x00100000 0 0 4 0 0 AT91SAM7XC256 1 16 64 256 3 0 ==== NOT RECOMENDED !!! ====
# flash bank at91sam7 0 0 0 0 0 (old style, full auto-detection) ==== NOT RECOMENDED !!! ====
****************************************************************************************************************************************************************************************/
int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
flash_bank_t *t_bank = bank;
at91sam7_flash_bank_t *at91sam7_info;
......@@ -864,7 +866,7 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
return ERROR_OK;
}
int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
int sec;
......@@ -932,7 +934,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
return ERROR_OK;
}
int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
{
u32 cmd;
u32 sector, pagen;
......@@ -981,7 +983,7 @@ int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last)
return ERROR_OK;
}
int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
static int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
int retval;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -1050,7 +1052,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
return ERROR_OK;
}
int at91sam7_probe(struct flash_bank_s *bank)
static int at91sam7_probe(struct flash_bank_s *bank)
{
/* we can't probe on an at91sam7
* if this is an at91sam7, it has the configured flash */
......@@ -1069,7 +1071,7 @@ int at91sam7_probe(struct flash_bank_s *bank)
return ERROR_OK;
}
int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed;
at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
......@@ -1130,7 +1132,7 @@ int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
* The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes
* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
*/
int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int bit;
......
......@@ -51,22 +51,22 @@ There are some things to notice
#include <string.h>
#include <unistd.h>
int at91sam7_old_register_commands(struct command_context_s *cmd_ctx);
int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last);
int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last);
int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int at91sam7_old_probe(struct flash_bank_s *bank);
int at91sam7_old_auto_probe(struct flash_bank_s *bank);
int at91sam7_old_erase_check(struct flash_bank_s *bank);
int at91sam7_old_protect_check(struct flash_bank_s *bank);
int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size);
u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane);
void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout);
int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen);
int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int at91sam7_old_register_commands(struct command_context_s *cmd_ctx);
static int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last);
static int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last);
static int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int at91sam7_old_probe(struct flash_bank_s *bank);
//static int at91sam7_old_auto_probe(struct flash_bank_s *bank);
static int at91sam7_old_erase_check(struct flash_bank_s *bank);
static int at91sam7_old_protect_check(struct flash_bank_s *bank);
static int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size);
static u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane);
static void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode);
static u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout);
static int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen);
static int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
flash_driver_t at91sam7_old_flash =
{
......@@ -83,12 +83,12 @@ flash_driver_t at91sam7_old_flash =
.info = at91sam7_old_info
};
u32 MC_FMR_old[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
u32 MC_FCR_old[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
u32 MC_FSR_old[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static u32 MC_FMR_old[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
static u32 MC_FCR_old[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
static u32 MC_FSR_old[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
char * EPROC_old[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
long NVPSIZ_old[16] = {
static char * EPROC_old[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
static long NVPSIZ_old[16] = {
0,
0x2000, /* 8K */
0x4000, /* 16K */
......@@ -107,7 +107,8 @@ long NVPSIZ_old[16] = {
-1
};
long SRAMSIZ_old[16] = {
#if 0
static long SRAMSIZ_old[16] = {
-1,
0x0400, /* 1K */
0x0800, /* 2K */
......@@ -125,8 +126,9 @@ long SRAMSIZ_old[16] = {
0x18000, /* 96K */
0x80000, /* 512K */
};
#endif
int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)
static int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)
{
command_t *at91sam7_old_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL);
register_command(cmd_ctx, at91sam7_old_cmd, "gpnvm", at91sam7_old_handle_gpnvm_command, COMMAND_EXEC,
......@@ -135,7 +137,7 @@ int at91sam7_old_register_commands(struct command_context_s *cmd_ctx)
return ERROR_OK;
}
u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)
static u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)
{
target_t *target = bank->target;
u32 fsr;
......@@ -146,7 +148,7 @@ u32 at91sam7_old_get_flash_status(flash_bank_t *bank, u8 flashplane)
}
/* Read clock configuration and set at91sam7_old_info->usec_clocks*/
void at91sam7_old_read_clock_info(flash_bank_t *bank)
static void at91sam7_old_read_clock_info(flash_bank_t *bank)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -210,7 +212,7 @@ void at91sam7_old_read_clock_info(flash_bank_t *bank)
}
/* Setup the timimg registers for nvbits or normal flash */
void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
static void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
{
u32 fmr, fmcn = 0, fws = 0;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
......@@ -251,7 +253,7 @@ void at91sam7_old_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode)
at91sam7_old_info->flashmode[flashplane] = mode;
}
u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout)
static u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, int timeout)
{
u32 status;
......@@ -279,7 +281,7 @@ u32 at91sam7_old_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbit
/* Send one command to the AT91SAM flash controller */
int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen)
static int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 pagen)
{
u32 fcr;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
......@@ -307,7 +309,7 @@ int at91sam7_old_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd,
}
/* Read device id register, main clock frequency register and fill in driver info structure */
int at91sam7_old_read_part_info(struct flash_bank_s *bank)
static int at91sam7_old_read_part_info(struct flash_bank_s *bank)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -574,7 +576,7 @@ int at91sam7_old_erase_check(struct flash_bank_s *bank)
return ERROR_OK;
}
int at91sam7_old_protect_check(struct flash_bank_s *bank)
static int at91sam7_old_protect_check(struct flash_bank_s *bank)
{
u32 status;
int flashplane;
......@@ -625,7 +627,7 @@ int at91sam7_old_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd
return ERROR_OK;
}
int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last)
static int at91sam7_old_erase(struct flash_bank_s *bank, int first, int last)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
u8 flashplane;
......@@ -716,7 +718,7 @@ int at91sam7_old_protect(struct flash_bank_s *bank, int set, int first, int last
}
int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
static int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
target_t *target = bank->target;
......@@ -784,7 +786,7 @@ int at91sam7_old_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co
}
int at91sam7_old_probe(struct flash_bank_s *bank)
static int at91sam7_old_probe(struct flash_bank_s *bank)
{
/* we can't probe on an at91sam7_old
* if this is an at91sam7_old, it has the configured flash
......@@ -811,7 +813,7 @@ int at91sam7_old_probe(struct flash_bank_s *bank)
}
int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)
static int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)
{
int printed, flashplane;
at91sam7_old_flash_bank_t *at91sam7_old_info = bank->driver_priv;
......@@ -871,7 +873,7 @@ int at91sam7_old_info(struct flash_bank_s *bank, char *buf, int buf_size)
* The maximum number of write/erase cycles for Non Volatile Memory bits is 100. This includes
* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
*/
int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
static int at91sam7_old_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
int bit;
......
......@@ -38,17 +38,17 @@
#include <string.h>
#include <unistd.h>
int cfi_register_commands(struct command_context_s *cmd_ctx);
int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int cfi_erase(struct flash_bank_s *bank, int first, int last);
int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
int cfi_probe(struct flash_bank_s *bank);
int cfi_auto_probe(struct flash_bank_s *bank);
int cfi_protect_check(struct flash_bank_s *bank);
int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int cfi_register_commands(struct command_context_s *cmd_ctx);
static int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int cfi_erase(struct flash_bank_s *bank, int first, int last);
static int cfi_protect(struct flash_bank_s *bank, int set, int first, int last);
static int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
static int cfi_probe(struct flash_bank_s *bank);
static int cfi_auto_probe(struct flash_bank_s *bank);
static int cfi_protect_check(struct flash_bank_s *bank);
static int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size);
//static int cfi_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
#define CFI_MAX_BUS_WIDTH 4
#define CFI_MAX_CHIP_WIDTH 4
......@@ -71,19 +71,19 @@ flash_driver_t cfi_flash =
.info = cfi_info
};
cfi_unlock_addresses_t cfi_unlock_addresses[] =
static cfi_unlock_addresses_t cfi_unlock_addresses[] =
{
[CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
[CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa },
};
/* CFI fixups foward declarations */
void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
static void cfi_fixup_0002_erase_regions(flash_bank_t *flash, void *param);
static void cfi_fixup_0002_unlock_addresses(flash_bank_t *flash, void *param);
static void cfi_fixup_atmel_reversed_erase_regions(flash_bank_t *flash, void *param);
/* fixup after identifying JEDEC manufactuer and ID */
cfi_fixup_t cfi_jedec_fixups[] = {
static cfi_fixup_t cfi_jedec_fixups[] = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D5, cfi_fixup_non_cfi, NULL},
{CFI_MFR_SST, 0x00D6, cfi_fixup_non_cfi, NULL},
......@@ -101,7 +101,7 @@ cfi_fixup_t cfi_jedec_fixups[] = {
};
/* fixup after reading cmdset 0002 primary query table */
cfi_fixup_t cfi_0002_fixups[] = {
static cfi_fixup_t cfi_0002_fixups[] = {
{CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
{CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
......@@ -117,11 +117,11 @@ cfi_fixup_t cfi_0002_fixups[] = {
};
/* fixup after reading cmdset 0001 primary query table */
cfi_fixup_t cfi_0001_fixups[] = {
static cfi_fixup_t cfi_0001_fixups[] = {
{0, 0, NULL, NULL}
};
void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
static void cfi_fixup(flash_bank_t *bank, cfi_fixup_t *fixups)
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
cfi_fixup_t *f;
......@@ -154,7 +154,7 @@ __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset)
}
void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
static void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
{
int i;
......@@ -184,7 +184,7 @@ void cfi_command(flash_bank_t *bank, u8 cmd, u8 *cmd_buf)
* flash banks are expected to be made of similar chips
* the query result should be the same for all
*/
u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
static u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
{
target_t *target = bank->target;
u8 data[CFI_MAX_BUS_WIDTH];
......@@ -201,7 +201,7 @@ u8 cfi_query_u8(flash_bank_t *bank, int sector, u32 offset)
* in case of a bank made of multiple chips,
* the individual values are ORed
*/
u8 cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)