Add support for ATMEL AT91SAM3U - CortexM3 Family

git-svn-id: svn://svn.berlios.de/openocd/trunk@2383 b42882b7-edfa-0310-969c-e2dbd0fdcd60

doc/openocd.texi

@@ -130,7 +130,7 @@ debugged via the GDB protocol.
 
 @b{Flash Programing:} Flash writing is supported for external CFI
 compatible NOR flashes (Intel and AMD/Spansion command set) and several
-internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
+internal flashes (LPC2000, AT91SAM7, AT91SAM3U, STR7x, STR9x, LM3, and
 STM32x). Preliminary support for various NAND flash controllers
 (LPC3180, Orion, S3C24xx, more) controller is included.
 
@@ -3374,11 +3374,68 @@ flash bank aduc702x 0 0 0 0 $_TARGETNAME
 @end example
 @end deffn
 
+@deffn {Flash Driver} at91sam3
+@cindex at91sam3
+All members of the AT91SAM3 (cortex-M3) microcontroller family from
+atmel include internal flash and use the Cortex-M3 core. The driver
+currently (6/22/09) recognizes the AT91SAM3U[1/2/4][C/E] chips. Note
+that the driver was orginaly developed and tested using the
+AT91SAM3U4E, using a SAM3U-EK eval board. Support for other chips in
+the family where cribbed from the data sheet [Note to future
+readers/updaters: Please remove this worrysome comment after other
+chips are confirmed].
+
+The AT91SAM3U4[E/C] (256K) chips have 2 flash banks, the other chips
+(3U[1/2][E/C]) have 1 flash bank, in all cases the flash banks are at
+the following fixed locations. 
+
+@example
+# Flash bank 0 - all chips
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+# Flash bank 1 - only 256K chips
+flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
+@end example
+
+Internally, the AT91SAM3 flash memory is organized as follows:
+
+@itemize
+@item @var{N-Banks:} 256K chips have 2 banks, others have 1 bank.
+@item @var{Bank Size:}  128K/64K Per flash bank
+@item @var{Sectors:} 16 or 8 per bank
+@item @var{SectorSize:} 8K Per Sector
+@item @var{PageSize:} 256 bytes per page. Note that OpenOCD operates on 'sector' sizes, not page sizes.
+@end itemize
+
+The AT91SAM3 driver adds an additional command:
+
+@deffn Command {at91sam3 gpnvm set|clear|show all|NUMBER}
+This command allows you to set, clear, or show the state of the GPNVM bits.
+@end deffn
+
+@deffn Command {at91sam3 info}
+This command attempts to display information about the AT91SAM3
+chip. @b{First} it read the @var{CHIPID_CIDR} [address 0x400e0740, see
+Section 28.2.1, page 505 of the AT91SAM3U 29/may/2009 datasheet,
+document id: doc6430A] and decodes the values. @b{Second} it reads the
+various clock configuration registers and attempts to display how it
+believes the chip is configured. By default, the SLOWCLK is assumed to
+be 32768 Hz, see the command @b{at91sam3 slowclk}.
+@end deffn
+
+@deffn Command {at91sam3 slowclk [VALUE]}
+This command shows/sets the slow clock frequency used in the
+@b{at91sam3 info} command calculations above.
+@end deffn
+
+@end deffn
+
 @deffn {Flash Driver} at91sam7
-All members of the AT91SAM7 microcontroller family from Atmel
-include internal flash and use ARM7TDMI cores.
-The driver automatically recognizes a number of these chips using
-the chip identification register, and autoconfigures itself.
+All members of the AT91SAM7 microcontroller family from Atmel include
+internal flash and use ARM7TDMI cores.  The driver automatically
+recognizes a number of these chips using the chip identification
+register, and autoconfigures itself.
+@end deffn
+
 
 @example
 flash bank at91sam7 0 0 0 0 $_TARGETNAME
@@ -3419,7 +3476,6 @@ This assumes that the first flash bank (number 0) is associated with
 the appropriate at91sam7 target.
 @end quotation
 @end deffn
-@end deffn
 
 @deffn {Flash Driver} avr
 The AVR 8-bit microcontrollers from Atmel integrate flash memory.

src/flash/Makefile.am

@@ -11,6 +11,7 @@ libflash_la_SOURCES = \
 	cfi.c \
 	non_cfi.c \
 	at91sam7.c \
+	at91sam3.c \
 	davinci_nand.c \
 	str7x.c \
 	str9x.c \
@@ -42,6 +43,7 @@ noinst_HEADERS = \
 	cfi.h \
 	non_cfi.h \
 	at91sam7.h \
+	at91sam3.h \
 	str7x.h \
 	str9x.h \
 	nand.h \

src/flash/at91sam3.h

+/***************************************************************************
+ *   Copyright (C) 2009 by Duane Ellis                                     *
+ *   openocd@duaneellis.com                                                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+
+// nothing to do here other then export this.
+extern flash_driver_t at91sam3_flash;

src/flash/flash.c

@@ -30,6 +30,7 @@
 #include "flash.h"
 #include "image.h"
 #include "time_support.h"
+#include "at91sam3.h"
 
 /* command handlers */
 static int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -66,6 +67,7 @@ flash_driver_t *flash_drivers[] = {
 	&lpc2000_flash,
 	&cfi_flash,
 	&at91sam7_flash,
+	&at91sam3_flash,
 	&str7x_flash,
 	&str9x_flash,
 	&aduc702x_flash,

tcl/board/atmel_sam3u_ek.cfg

+source [find target/at91sam3u4e.cfg]

tcl/target/at91sam3u1c.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3u1e.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3u2c.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3u2e.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3u4c.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+# This is a 256K chip, it has the 2nd bank
+flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3u4e.cfg

+# common stuff
+source [find target/at91sam3uxx.cfg]
+
+# size is automatically "calculated" by probing
+flash bank at91sam3 0x000080000 0 1 1 $_TARGETNAME
+# This is a 256K chip - it has the 2nd bank
+flash bank at91sam3 0x000100000 0 1 1 $_TARGETNAME
+
+

tcl/target/at91sam3uXX.cfg

+# script for ATMEL sam3, a CORTEX-M3 chip
+#
+#  at91sam3u4e
+#  at91sam3u2e
+#  at91sam3u1e
+#  at91sam3u4c
+#  at91sam3u2c
+#  at91sam3u1c
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME sam3
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+
+#jtag scan chain
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+# 16K is plenty, the smallest chip has this much
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+
+reset_config srst_only
+
+# GDB can use this
+gdb_memory_map enable
+# And GDB can flash the chip
+gdb_flash_program enable
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+    halt
+}