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    ARM: start abstracting ADIv5 transports (JTAG/SWD) · db6c9946
    David Brownell authored
    
    
    To support both JTAG and SWD, ADIv5 needs DAP operations which are
    transport-neutral, instead being of JTAG-specific.  This patch:
    
     - Defines such a transport-neutral interface, abstracting access
       to DP and AP registers through a conceptual queue of operations.
    
     - Builds the first implementation of such a transport with the existing
       JTAG-specific code.
    
    In contrast to the current JTAG-only interface, the interface adds
    support for two previously-missing (and unused) DAP operations:
    
     - aborting the current AP transaction (untested);
     - reading the IDCODE register (tested) ... required for SWD init.
    
    The choice of transports may be fixed at the chip, board, or JTAG/SWD
    adapter level.  Or if all the relevant hardware supports both transport
    options, the choice may be made at runtime, This patch provides basic
    infrastructure to support whichever choice is made.
    
    The current "JTAG-only" transport choice policy will necessarily continue
    for now, until SWD support becomes available in OpenOCD.  Later patches
    start phasing out JTAG-specific calls in favor of transport-neutral calls.
    
    Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
    db6c9946