str9xpec.c 32.1 KB
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/***************************************************************************
 *   Copyright (C) 2005 by Dominic Rath                                    *
 *   Dominic.Rath@gmx.de                                                   *
 *                                                                         *
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 *   Copyright (C) 2008 by Spencer Oliver                                  *
 *   spen@spen-soft.co.uk                                                  *
 *                                                                         *
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 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

#include "str9xpec.h"
#include "arm7_9_common.h"


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static int str9xpec_register_commands(struct command_context_s *cmd_ctx);
static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last);
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static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
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static int str9xpec_probe(struct flash_bank_s *bank);
static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_protect_check(struct flash_bank_s *bank);
static int str9xpec_erase_check(struct flash_bank_s *bank);
static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size);

static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last);
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static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector);
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static int str9xpec_write_options(struct flash_bank_s *bank);

static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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flash_driver_t str9xpec_flash =
{
	.name = "str9xpec",
	.register_commands = str9xpec_register_commands,
	.flash_bank_command = str9xpec_flash_bank_command,
	.erase = str9xpec_erase,
	.protect = str9xpec_protect,
	.write = str9xpec_write,
	.probe = str9xpec_probe,
	.auto_probe = str9xpec_probe,
	.erase_check = str9xpec_erase_check,
	.protect_check = str9xpec_protect_check,
	.info = str9xpec_info
};

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static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
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{
	command_t *str9xpec_cmd = register_command(cmd_ctx, NULL, "str9xpec", NULL, COMMAND_ANY, "str9xpec flash specific commands");
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	register_command(cmd_ctx, str9xpec_cmd, "enable_turbo", str9xpec_handle_flash_enable_turbo_command, COMMAND_EXEC,
					 "enable str9xpec turbo mode");
	register_command(cmd_ctx, str9xpec_cmd, "disable_turbo", str9xpec_handle_flash_disable_turbo_command, COMMAND_EXEC,
					 "disable str9xpec turbo mode");
	register_command(cmd_ctx, str9xpec_cmd, "options_cmap", str9xpec_handle_flash_options_cmap_command, COMMAND_EXEC,
					 "configure str9xpec boot sector");
	register_command(cmd_ctx, str9xpec_cmd, "options_lvdthd", str9xpec_handle_flash_options_lvdthd_command, COMMAND_EXEC,
					 "configure str9xpec lvd threshold");
	register_command(cmd_ctx, str9xpec_cmd, "options_lvdsel", str9xpec_handle_flash_options_lvdsel_command, COMMAND_EXEC,
					 "configure str9xpec lvd selection");
	register_command(cmd_ctx, str9xpec_cmd, "options_lvdwarn", str9xpec_handle_flash_options_lvdwarn_command, COMMAND_EXEC,
					 "configure str9xpec lvd warning");
	register_command(cmd_ctx, str9xpec_cmd, "options_read", str9xpec_handle_flash_options_read_command, COMMAND_EXEC,
					 "read str9xpec options");
	register_command(cmd_ctx, str9xpec_cmd, "options_write", str9xpec_handle_flash_options_write_command, COMMAND_EXEC,
					 "write str9xpec options");
	register_command(cmd_ctx, str9xpec_cmd, "lock", str9xpec_handle_flash_lock_command, COMMAND_EXEC,
					 "lock str9xpec device");
	register_command(cmd_ctx, str9xpec_cmd, "unlock", str9xpec_handle_flash_unlock_command, COMMAND_EXEC,
					 "unlock str9xpec device");
	register_command(cmd_ctx, str9xpec_cmd, "part_id", str9xpec_handle_part_id_command, COMMAND_EXEC,
					 "print part id of str9xpec flash bank <num>");
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	return ERROR_OK;
}

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int str9xpec_set_instr(jtag_tap_t *tap, uint32_t new_instr, tap_state_t end_state)
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{
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	if ( tap == NULL ){
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		return ERROR_TARGET_INVALID;
	}
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	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
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	{
		scan_field_t field;
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		field.tap = tap;
		field.num_bits = tap->ir_length;
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		field.out_value = calloc(CEIL(field.num_bits, 8), 1);
		buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
		field.in_value = NULL;
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		jtag_add_ir_scan(1, &field, end_state);
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		free(field.out_value);
	}
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	return ERROR_OK;
}

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static uint8_t str9xpec_isc_status(jtag_tap_t *tap)
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{
	scan_field_t field;
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	uint8_t status;
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	if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
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		return ISC_STATUS_ERROR;
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	field.tap = tap;
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	field.num_bits = 8;
	field.out_value = NULL;
	field.in_value = &status;
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	jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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	jtag_execute_queue();
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	LOG_DEBUG("status: 0x%2.2x", status);
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	if (status & ISC_STATUS_SECURITY)
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		LOG_INFO("Device Security Bit Set");
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	return status;
}

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static int str9xpec_isc_enable(struct flash_bank_s *bank)
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{
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	uint8_t status;
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	jtag_tap_t *tap;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	if (str9xpec_info->isc_enable)
		return ERROR_OK;
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	/* enter isc mode */
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	if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
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		return ERROR_TARGET_INVALID;
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	/* check ISC status */
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	status = str9xpec_isc_status(tap);
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	if (status & ISC_STATUS_MODE)
	{
		/* we have entered isc mode */
		str9xpec_info->isc_enable = 1;
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		LOG_DEBUG("ISC_MODE Enabled");
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	}
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	return ERROR_OK;
}

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static int str9xpec_isc_disable(struct flash_bank_s *bank)
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{
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	uint8_t status;
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	jtag_tap_t *tap;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	if (!str9xpec_info->isc_enable)
		return ERROR_OK;
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	if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
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		return ERROR_TARGET_INVALID;
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	/* delay to handle aborts */
	jtag_add_sleep(50);
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	/* check ISC status */
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	status = str9xpec_isc_status(tap);
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	if (!(status & ISC_STATUS_MODE))
	{
		/* we have left isc mode */
		str9xpec_info->isc_enable = 0;
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		LOG_DEBUG("ISC_MODE Disabled");
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	}
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	return ERROR_OK;
}

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static int str9xpec_read_config(struct flash_bank_s *bank)
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{
	scan_field_t field;
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	uint8_t status;
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	jtag_tap_t *tap;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	LOG_DEBUG("ISC_CONFIGURATION");
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	/* execute ISC_CONFIGURATION command */
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	str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
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	field.tap = tap;
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	field.num_bits = 64;
	field.out_value = NULL;
	field.in_value = str9xpec_info->options;
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	jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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	jtag_execute_queue();
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	status = str9xpec_isc_status(tap);
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	return status;
}

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static int str9xpec_build_block_list(struct flash_bank_s *bank)
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{
	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	int i;
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	int num_sectors;
	int b0_sectors = 0, b1_sectors = 0;
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	uint32_t offset = 0;
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	int b1_size = 0x2000;
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	switch (bank->size)
	{
		case (256 * 1024):
			b0_sectors = 4;
			break;
		case (512 * 1024):
			b0_sectors = 8;
			break;
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		case (1024 * 1024):
			b0_sectors = 16;
			break;
		case (2048 * 1024):
			b0_sectors = 32;
			break;
		case (128 * 1024):
			b1_size = 0x4000;
			b1_sectors = 8;
			break;
		case (32 * 1024):
			b1_sectors = 4;
			break;
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		default:
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			LOG_ERROR("BUG: unknown bank->size encountered");
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			exit(-1);
	}
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	num_sectors = b0_sectors + b1_sectors;
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	bank->num_sectors = num_sectors;
	bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
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	str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
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	num_sectors = 0;
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	for (i = 0; i < b0_sectors; i++)
	{
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		bank->sectors[num_sectors].offset = offset;
		bank->sectors[num_sectors].size = 0x10000;
		offset += bank->sectors[i].size;
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		bank->sectors[num_sectors].is_erased = -1;
		bank->sectors[num_sectors].is_protected = 1;
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		str9xpec_info->sector_bits[num_sectors++] = i;
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	}
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	for (i = 0; i < b1_sectors; i++)
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	{
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		bank->sectors[num_sectors].offset = offset;
		bank->sectors[num_sectors].size = b1_size;
		offset += bank->sectors[i].size;
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		bank->sectors[num_sectors].is_erased = -1;
		bank->sectors[num_sectors].is_protected = 1;
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		str9xpec_info->sector_bits[num_sectors++] = i + 32;
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	}
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	return ERROR_OK;
}

/* flash bank str9x <base> <size> 0 0 <target#>
 */
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static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
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{
	str9xpec_flash_controller_t *str9xpec_info;
	armv4_5_common_t *armv4_5 = NULL;
	arm7_9_common_t *arm7_9 = NULL;
	arm_jtag_t *jtag_info = NULL;
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	if (argc < 6)
	{
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		LOG_WARNING("incomplete flash_bank str9x configuration");
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		return ERROR_FLASH_BANK_INVALID;
	}
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	str9xpec_info = malloc(sizeof(str9xpec_flash_controller_t));
	bank->driver_priv = str9xpec_info;
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	/* find out jtag position of flash controller
	 * it is always after the arm966 core */
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	armv4_5 = bank->target->arch_info;
	arm7_9 = armv4_5->arch_info;
	jtag_info = &arm7_9->jtag_info;
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	str9xpec_info->tap = jtag_tap_by_position( jtag_info->tap->abs_chain_position - 1);
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	str9xpec_info->isc_enable = 0;
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	str9xpec_build_block_list(bank);
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	/* clear option byte register */
	buf_set_u32(str9xpec_info->options, 0, 64, 0);
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	return ERROR_OK;
}

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static int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
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{
	scan_field_t field;
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	uint8_t status;
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	jtag_tap_t *tap;
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	int i;
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	uint8_t *buffer = NULL;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	if (!str9xpec_info->isc_enable) {
		str9xpec_isc_enable( bank );
	}
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	if (!str9xpec_info->isc_enable) {
		return ERROR_FLASH_OPERATION_FAILED;
	}
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	buffer = calloc(CEIL(64, 8), 1);

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	LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
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	for (i = first; i <= last; i++) {
		buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
	}
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	/* execute ISC_BLANK_CHECK command */
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	str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
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	field.tap = tap;
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	field.num_bits = 64;
	field.out_value = buffer;
	field.in_value = NULL;
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	jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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	jtag_add_sleep(40000);
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	/* read blank check result */
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	field.tap = tap;
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	field.num_bits = 64;
	field.out_value = NULL;
	field.in_value = buffer;
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	jtag_add_dr_scan(1, &field, TAP_IRPAUSE);
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	jtag_execute_queue();
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	status = str9xpec_isc_status(tap);
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	for (i = first; i <= last; i++)
	{
		if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
			bank->sectors[i].is_erased = 0;
		else
			bank->sectors[i].is_erased = 1;
	}
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	free(buffer);
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	str9xpec_isc_disable(bank);
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	if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
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		return ERROR_FLASH_OPERATION_FAILED;
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	return ERROR_OK;
}

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static int str9xpec_protect_check(struct flash_bank_s *bank)
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{
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	uint8_t status;
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	int i;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	status = str9xpec_read_config(bank);
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	for (i = 0; i < bank->num_sectors; i++)
	{
		if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
			bank->sectors[i].is_protected = 1;
		else
			bank->sectors[i].is_protected = 0;
	}
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	if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
		return ERROR_FLASH_OPERATION_FAILED;
	return ERROR_OK;
}

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static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
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{
	scan_field_t field;
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	uint8_t status;
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	jtag_tap_t *tap;
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	int i;
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	uint8_t *buffer = NULL;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	if (!str9xpec_info->isc_enable) {
		str9xpec_isc_enable( bank );
	}
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	if (!str9xpec_info->isc_enable) {
		return ISC_STATUS_ERROR;
	}
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	buffer = calloc(CEIL(64, 8), 1);
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	LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
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	/* last bank: 0xFF signals a full erase (unlock complete device) */
	/* last bank: 0xFE signals a option byte erase */
	if (last == 0xFF)
	{
		for (i = 0; i < 64; i++) {
			buf_set_u32(buffer, i, 1, 1);
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		}
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	}
	else if (last == 0xFE)
	{
		buf_set_u32(buffer, 49, 1, 1);
	}
	else
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	{
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		for (i = first; i <= last; i++) {
			buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
		}
	}
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	LOG_DEBUG("ISC_ERASE");
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	/* execute ISC_ERASE command */
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	str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
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	field.tap = tap;
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	field.num_bits = 64;
	field.out_value = buffer;
	field.in_value = NULL;
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	jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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	jtag_execute_queue();
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	jtag_add_sleep(10);
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	/* wait for erase completion */
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	while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
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		alive_sleep(1);
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	}
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	free(buffer);
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	str9xpec_isc_disable(bank);
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	return status;
}

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static int str9xpec_erase(struct flash_bank_s *bank, int first, int last)
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{
	int status;
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	status = str9xpec_erase_area(bank, first, last);
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	if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
		return ERROR_FLASH_OPERATION_FAILED;
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	return ERROR_OK;
}

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static int str9xpec_lock_device(struct flash_bank_s *bank)
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{
	scan_field_t field;
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	uint8_t status;
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	jtag_tap_t *tap;
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	str9xpec_flash_controller_t *str9xpec_info = NULL;
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	str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	if (!str9xpec_info->isc_enable) {
		str9xpec_isc_enable( bank );
	}
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	if (!str9xpec_info->isc_enable) {
		return ISC_STATUS_ERROR;
	}
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	/* set security address */
	str9xpec_set_address(bank, 0x80);
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	/* execute ISC_PROGRAM command */
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	str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
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	str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
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	do {
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		field.tap = tap;
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		field.num_bits = 8;
		field.out_value = NULL;
		field.in_value = &status;
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		jtag_add_dr_scan(1, &field, jtag_get_end_state());
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		jtag_execute_queue();
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	} while (!(status & ISC_STATUS_BUSY));
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	str9xpec_isc_disable(bank);
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	return status;
}

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static int str9xpec_unlock_device(struct flash_bank_s *bank)
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{
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	uint8_t status;
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	status = str9xpec_erase_area(bank, 0, 255);
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	return status;
}

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static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
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{
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	uint8_t status;
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	int i;
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	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	status = str9xpec_read_config(bank);
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	if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
		return ERROR_FLASH_OPERATION_FAILED;

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	LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
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	/* last bank: 0xFF signals a full device protect */
	if (last == 0xFF)
	{
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		if ( set )
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		{
			status = str9xpec_lock_device(bank);
		}
		else
		{
			/* perform full erase to unlock device */
			status = str9xpec_unlock_device(bank);
		}
	}
	else
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	{
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		for (i = first; i <= last; i++)
		{
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			if ( set )
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				buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
			else
				buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
		}
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		status = str9xpec_write_options(bank);
	}
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	if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
		return ERROR_FLASH_OPERATION_FAILED;
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	return ERROR_OK;
}

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static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector)
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{
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	jtag_tap_t *tap;
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	scan_field_t field;
	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	tap = str9xpec_info->tap;
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	/* set flash controller address */
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	str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
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	field.tap = tap;
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	field.num_bits = 8;
	field.out_value = &sector;
	field.in_value = NULL;
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	jtag_add_dr_scan(1, &field, jtag_get_end_state());
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	return ERROR_OK;
}

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static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
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{
	str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
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	uint32_t dwords_remaining = (count / 8);
	uint32_t bytes_remaining = (count & 0x00000007);
	uint32_t bytes_written = 0;
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	uint8_t status;
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	uint32_t check_address = offset;
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	jtag_tap_t *tap;
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	scan_field_t field;
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	uint8_t *scanbuf;
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	int i;
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	int first_sector = 0;
	int last_sector = 0;
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	tap = str9xpec_info->tap;
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	if (!str9xpec_info->isc_enable) {
		str9xpec_isc_enable(bank);
	}
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	if (!str9xpec_info->isc_enable) {
		return ERROR_FLASH_OPERATION_FAILED;
	}
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	if (offset & 0x7)
	{
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		LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
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		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
	}
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	for (i = 0; i < bank->num_sectors; i++)
	{
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		uint32_t sec_start = bank->sectors[i].offset;
		uint32_t sec_end = sec_start + bank->sectors[i].size;
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		/* check if destination falls within the current sector */
		if ((check_address >= sec_start) && (check_address < sec_end))
		{
			/* check if destination ends in the current sector */
			if (offset + count < sec_end)
				check_address = offset + count;
			else
				check_address = sec_end;
		}
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		if ((offset >= sec_start) && (offset < sec_end)){
			first_sector = i;
		}
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		if ((offset + count >= sec_start) && (offset + count < sec_end)){
			last_sector = i;
		}
	}
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	if (check_address != offset + count)
		return ERROR_FLASH_DST_OUT_OF_BANK;

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	LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
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	scanbuf = calloc(CEIL(64, 8), 1);
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	LOG_DEBUG("ISC_PROGRAM");
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	for (i = first_sector; i <= last_sector; i++)
	{
		str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
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		dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);

		while (dwords_remaining > 0)
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		{
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			str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
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			field.tap = tap;
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			field.num_bits = 64;
			field.out_value = (buffer + bytes_written);
			field.in_value = NULL;
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			jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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			/* small delay before polling */
			jtag_add_sleep(50);
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			str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
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			do {
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				field.tap = tap;
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				field.num_bits = 8;
				field.out_value = NULL;
				field.in_value = scanbuf;
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				jtag_add_dr_scan(1, &field, jtag_get_end_state());
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				jtag_execute_queue();
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				status = buf_get_u32(scanbuf, 0, 8);
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			} while (!(status & ISC_STATUS_BUSY));
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			if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
				return ERROR_FLASH_OPERATION_FAILED;
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			/* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
				return ERROR_FLASH_OPERATION_FAILED; */
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			dwords_remaining--;
			bytes_written += 8;
		}
	}
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	if (bytes_remaining)
	{
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		uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
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		int i = 0;
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		while (bytes_remaining > 0)
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		{
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			last_dword[i++] = *(buffer + bytes_written);
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			bytes_remaining--;
			bytes_written++;
		}
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		str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
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		field.tap = tap;
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		field.num_bits = 64;
		field.out_value = last_dword;
		field.in_value = NULL;
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		jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
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		/* small delay before polling */
		jtag_add_sleep(50);
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		str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
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		do {
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			field.tap = tap;
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			field.num_bits = 8;
			field.out_value = NULL;
			field.in_value = scanbuf;
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			jtag_add_dr_scan(1, &field, jtag_get_end_state());
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			jtag_execute_queue();
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			status = buf_get_u32(scanbuf, 0, 8);