lpc2900.c 52.6 KB
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/***************************************************************************
 *   Copyright (C) 2009 by                                                 *
 *   Rolf Meeser <rolfm_9dq@yahoo.de>                                      *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/

#ifdef HAVE_CONFIG_H
#include "config.h"
#endif


#include "image.h"

#include "lpc2900.h"
#include "binarybuffer.h"
#include "armv4_5.h"


/* 1024 bytes */
#define KiB                 1024

/* Some flash constants */
#define FLASH_PAGE_SIZE     512     /* bytes */
#define FLASH_ERASE_TIME    100000  /* microseconds */
#define FLASH_PROGRAM_TIME  1000    /* microseconds */

/* Chip ID / Feature Registers */
#define CHIPID          0xE0000000  /* Chip ID */
#define FEAT0           0xE0000100  /* Chip feature 0 */
#define FEAT1           0xE0000104  /* Chip feature 1 */
#define FEAT2           0xE0000108  /* Chip feature 2 (contains flash size indicator) */
#define FEAT3           0xE000010C  /* Chip feature 3 */

#define EXPECTED_CHIPID 0x209CE02B  /* Chip ID of all LPC2900 devices */

/* Flash/EEPROM Control Registers */
#define FCTR            0x20200000  /* Flash control */
#define FPTR            0x20200008  /* Flash program-time */
#define FTCTR           0x2020000C  /* Flash test control */
#define FBWST           0x20200010  /* Flash bridge wait-state */
#define FCRA            0x2020001C  /* Flash clock divider */
#define FMSSTART        0x20200020  /* Flash Built-In Selft Test start address */
#define FMSSTOP         0x20200024  /* Flash Built-In Selft Test stop address */
#define FMS16           0x20200028  /* Flash 16-bit signature */
#define FMSW0           0x2020002C  /* Flash 128-bit signature Word 0 */
#define FMSW1           0x20200030  /* Flash 128-bit signature Word 1 */
#define FMSW2           0x20200034  /* Flash 128-bit signature Word 2 */
#define FMSW3           0x20200038  /* Flash 128-bit signature Word 3 */

#define EECMD           0x20200080  /* EEPROM command */
#define EEADDR          0x20200084  /* EEPROM address */
#define EEWDATA         0x20200088  /* EEPROM write data */
#define EERDATA         0x2020008C  /* EEPROM read data */
#define EEWSTATE        0x20200090  /* EEPROM wait state */
#define EECLKDIV        0x20200094  /* EEPROM clock divider */
#define EEPWRDWN        0x20200098  /* EEPROM power-down/start */
#define EEMSSTART       0x2020009C  /* EEPROM BIST start address */
#define EEMSSTOP        0x202000A0  /* EEPROM BIST stop address */
#define EEMSSIG         0x202000A4  /* EEPROM 24-bit BIST signature */

#define INT_CLR_ENABLE  0x20200FD8  /* Flash/EEPROM interrupt clear enable */
#define INT_SET_ENABLE  0x20200FDC  /* Flash/EEPROM interrupt set enable */
#define INT_STATUS      0x20200FE0  /* Flash/EEPROM interrupt status */
#define INT_ENABLE      0x20200FE4  /* Flash/EEPROM interrupt enable */
#define INT_CLR_STATUS  0x20200FE8  /* Flash/EEPROM interrupt clear status */
#define INT_SET_STATUS  0x20200FEC  /* Flash/EEPROM interrupt set status */

/* Interrupt sources */
#define INTSRC_END_OF_PROG    (1 << 28)
#define INTSRC_END_OF_BIST    (1 << 27)
#define INTSRC_END_OF_RDWR    (1 << 26)
#define INTSRC_END_OF_MISR    (1 << 2)
#define INTSRC_END_OF_BURN    (1 << 1)
#define INTSRC_END_OF_ERASE   (1 << 0)


/* FCTR bits */
#define FCTR_FS_LOADREQ       (1 << 15)
#define FCTR_FS_CACHECLR      (1 << 14)
#define FCTR_FS_CACHEBYP      (1 << 13)
#define FCTR_FS_PROGREQ       (1 << 12)
#define FCTR_FS_RLS           (1 << 11)
#define FCTR_FS_PDL           (1 << 10)
#define FCTR_FS_PD            (1 << 9)
#define FCTR_FS_WPB           (1 << 7)
#define FCTR_FS_ISS           (1 << 6)
#define FCTR_FS_RLD           (1 << 5)
#define FCTR_FS_DCR           (1 << 4)
#define FCTR_FS_WEB           (1 << 2)
#define FCTR_FS_WRE           (1 << 1)
#define FCTR_FS_CS            (1 << 0)
/* FPTR bits */
#define FPTR_EN_T             (1 << 15)
/* FTCTR bits */
#define FTCTR_FS_BYPASS_R     (1 << 29)
#define FTCTR_FS_BYPASS_W     (1 << 28)
/* FMSSTOP bits */
#define FMSSTOP_MISR_START    (1 << 17)
/* EEMSSTOP bits */
#define EEMSSTOP_STRTBIST     (1 << 31)

/* Index sector */
#define ISS_CUSTOMER_START1   (0x830)
#define ISS_CUSTOMER_END1     (0xA00)
#define ISS_CUSTOMER_SIZE1    (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
#define ISS_CUSTOMER_NWORDS1  (ISS_CUSTOMER_SIZE1 / 4)
#define ISS_CUSTOMER_START2   (0xA40)
#define ISS_CUSTOMER_END2     (0xC00)
#define ISS_CUSTOMER_SIZE2    (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
#define ISS_CUSTOMER_NWORDS2  (ISS_CUSTOMER_SIZE2 / 4)
#define ISS_CUSTOMER_SIZE     (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)



/**
 * Private data for \c lpc2900 flash driver.
 */
typedef struct lpc2900_flash_bank_s
{
	/**
	 * Holds the value read from CHIPID register.
	 * The driver will not load if the chipid doesn't match the expected
	 * value of 0x209CE02B of the LPC2900 family. A probe will only be done
	 * if the chipid does not yet contain the expected value.
	 */
	uint32_t chipid;

	/**
	 * String holding device name.
	 * This string is set by the probe function to the type number of the
	 * device. It takes the form "LPC29xx".
	 */
	char * target_name;

	/**
	 * System clock frequency.
	 * Holds the clock frequency in Hz, as passed by the configuration file
	 * to the <tt>flash bank</tt> command.
	 */
	uint32_t clk_sys_fmc;

	/**
	 * Flag to indicate that dangerous operations are possible.
	 * This flag can be set by passing the correct password to the
	 * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
	 * which operate on the index sector, can be executed.
	 */
	uint32_t risky;

	/**
	 * Maximum contiguous block of internal SRAM (bytes).
	 * Autodetected by the driver. Not the total amount of SRAM, only the
	 * the largest \em contiguous block!
	 */
	uint32_t max_ram_block;

} lpc2900_flash_bank_t;


static uint32_t lpc2900_wait_status(flash_bank_t *bank, uint32_t mask, int timeout);
static void lpc2900_setup(struct flash_bank_s *bank);
static uint32_t lpc2900_is_ready(struct flash_bank_s *bank);
static uint32_t lpc2900_read_security_status(struct flash_bank_s *bank);
static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
                                    uint32_t addr_from, uint32_t addr_to,
                                    uint32_t (*signature)[4] );
static uint32_t lpc2900_address2sector(struct flash_bank_s *bank, uint32_t offset);
static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time );


/***********************  Helper functions  **************************/


/**
 * Wait for an event in mask to occur in INT_STATUS.
 *
 * Return when an event occurs, or after a timeout.
 *
 * @param[in] bank Pointer to the flash bank descriptor
 * @param[in] mask Mask to be used for INT_STATUS
 * @param[in] timeout Timeout in ms
 */
static uint32_t lpc2900_wait_status( flash_bank_t *bank,
                                     uint32_t mask,
                                     int timeout )
{
	uint32_t int_status;
	target_t *target = bank->target;


	do
	{
		alive_sleep(1);
		timeout--;
		target_read_u32(target, INT_STATUS, &int_status);
	}
	while( ((int_status & mask) == 0) && (timeout != 0) );

	if (timeout == 0)
	{
		LOG_DEBUG("Timeout!");
		return ERROR_FLASH_OPERATION_FAILED;
	}

	return ERROR_OK;
}



/**
 * Set up the flash for erase/program operations.
 *
 * Enable the flash, and set the correct CRA clock of 66 kHz.
 *
 * @param bank Pointer to the flash bank descriptor
 */
static void lpc2900_setup( struct flash_bank_s *bank )
{
	uint32_t fcra;
	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;


	/* Power up the flash block */
	target_write_u32( bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS );


	fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
	target_write_u32( bank->target, FCRA, fcra );
}



/**
 * Check if device is ready.
 *
 * Check if device is ready for flash operation:
 * Must have been successfully probed.
 * Must be halted.
 */
static uint32_t lpc2900_is_ready( struct flash_bank_s *bank )
{
	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

	if( lpc2900_info->chipid != EXPECTED_CHIPID )
	{
		return ERROR_FLASH_BANK_NOT_PROBED;
	}

	if( bank->target->state != TARGET_HALTED )
	{
		LOG_ERROR( "Target not halted" );
		return ERROR_TARGET_NOT_HALTED;
	}

	return ERROR_OK;
}


/**
 * Read the status of sector security from the index sector.
 *
 * @param bank Pointer to the flash bank descriptor
 */
static uint32_t lpc2900_read_security_status( struct flash_bank_s *bank )
{
	uint32_t status;
	if( (status = lpc2900_is_ready( bank )) != ERROR_OK )
	{
		return status;
	}

	target_t *target = bank->target;

	/* Enable ISS access */
	target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);

	/* Read the relevant block of memory from the ISS sector */
	uint32_t iss_secured_field[ 0x230/16 ][ 4 ];
	target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
	                           (uint8_t *)iss_secured_field);

	/* Disable ISS access */
	target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);

	/* Check status of each sector. Note that the sector numbering in the LPC2900
	 * is different from the logical sector numbers used in OpenOCD!
	 * Refer to the user manual for details.
	 *
	 * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
	 * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
	 * Anything else is undefined (is_protected = -1). This is treated as
	 * a protected sector!
	 */
	int sector;
	int index;
	for( sector = 0; sector < bank->num_sectors; sector++ )
	{
		/* Convert logical sector number to physical sector number */
		if( sector <= 4 )
		{
			index = sector + 11;
		}
		else if( sector <= 7 )
		{
			index = sector + 27;
		}
		else
		{
			index = sector - 8;
		}

		bank->sectors[sector].is_protected = -1;

		if (
		    (iss_secured_field[index][0] == 0x00000000) &&
		    (iss_secured_field[index][1] == 0x00000000) &&
		    (iss_secured_field[index][2] == 0x00000000) &&
		    (iss_secured_field[index][3] == 0x00000000) )
		{
			bank->sectors[sector].is_protected = 1;
		}

		if (
		    (iss_secured_field[index][0] == 0xFFFFFFFF) &&
		    (iss_secured_field[index][1] == 0xFFFFFFFF) &&
		    (iss_secured_field[index][2] == 0xFFFFFFFF) &&
		    (iss_secured_field[index][3] == 0xFFFFFFFF) )
		{
			bank->sectors[sector].is_protected = 0;
		}
	}

	return ERROR_OK;
}


/**
 * Use BIST to calculate a 128-bit hash value over a range of flash.
 *
 * @param bank Pointer to the flash bank descriptor
 * @param addr_from
 * @param addr_to
 * @param signature
 */
static uint32_t lpc2900_run_bist128(struct flash_bank_s *bank,
                                    uint32_t addr_from,
                                    uint32_t addr_to,
                                    uint32_t (*signature)[4] )
{
	target_t *target = bank->target;

	/* Clear END_OF_MISR interrupt status */
	target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_MISR );

	/* Start address */
	target_write_u32( target, FMSSTART, addr_from >> 4);
	/* End address, and issue start command */
	target_write_u32( target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START );

	/* Poll for end of operation. Calculate a reasonable timeout. */
	if( lpc2900_wait_status( bank, INTSRC_END_OF_MISR, 1000 ) != ERROR_OK )
	{
		return ERROR_FLASH_OPERATION_FAILED;
	}

	/* Return the signature */
	target_read_memory( target, FMSW0, 4, 4, (uint8_t *)signature );

	return ERROR_OK;
}


/**
 * Return sector number for given address.
 *
 * Return the (logical) sector number for a given relative address.
 * No sanity check is done. It assumed that the address is valid.
 *
 * @param bank Pointer to the flash bank descriptor
 * @param offset Offset address relative to bank start
 */
static uint32_t lpc2900_address2sector( struct flash_bank_s *bank,
                                        uint32_t offset )
{
	uint32_t address = bank->base + offset;


	/* Run through all sectors of this bank */
	int sector;
	for( sector = 0; sector < bank->num_sectors; sector++ )
	{
		/* Return immediately if address is within the current sector */
		if( address < (bank->sectors[sector].offset + bank->sectors[sector].size) )
		{
			return sector;
		}
	}

	/* We should never come here. If we do, return an arbitrary sector number. */
	return 0;
}




/**
 * Write one page to the index sector.
 *
 * @param bank Pointer to the flash bank descriptor
 * @param pagenum Page number (0...7)
 * @param page Page array (FLASH_PAGE_SIZE bytes)
 */
static int lpc2900_write_index_page( struct flash_bank_s *bank,
                                     int pagenum,
                                     uint8_t (*page)[FLASH_PAGE_SIZE] )
{
	/* Only pages 4...7 are user writable */
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	if ((pagenum < 4) || (pagenum > 7))
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	{
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		LOG_ERROR("Refuse to burn index sector page %d", pagenum);
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		return ERROR_COMMAND_ARGUMENT_INVALID;
	}

	/* Get target, and check if it's halted */
	target_t *target = bank->target;
	if( target->state != TARGET_HALTED )
	{
		LOG_ERROR( "Target not halted" );
		return ERROR_TARGET_NOT_HALTED;
	}

	/* Private info */
	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

	/* Enable flash block and set the correct CRA clock of 66 kHz */
	lpc2900_setup( bank );

	/* Un-protect the index sector */
	target_write_u32( target, bank->base, 0 );
	target_write_u32( target, FCTR,
	                  FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
	                  FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );

	/* Set latch load mode */
	target_write_u32( target, FCTR,
	                  FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS );

	/* Write whole page to flash data latches */
	if( target_write_memory( target,
	                         bank->base + pagenum * FLASH_PAGE_SIZE,
	                         4, FLASH_PAGE_SIZE / 4, (uint8_t *)page) != ERROR_OK )
	{
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		LOG_ERROR("Index sector write failed @ page %d", pagenum);
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		target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );

		return ERROR_FLASH_OPERATION_FAILED;
	}

	/* Clear END_OF_BURN interrupt status */
	target_write_u32( target, INT_CLR_STATUS, INTSRC_END_OF_BURN );

	/* Set the program/erase time to FLASH_PROGRAM_TIME */
	target_write_u32(target, FPTR,
	                 FPTR_EN_T | lpc2900_calc_tr( lpc2900_info->clk_sys_fmc,
	                                              FLASH_PROGRAM_TIME ));

	/* Trigger flash write */
	target_write_u32( target, FCTR,
	                  FCTR_FS_PROGREQ | FCTR_FS_ISS |
	                  FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS );

	/* Wait for the end of the write operation. If it's not over after one
	 * second, something went dreadfully wrong... :-(
	 */
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	if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK)
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	{
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		LOG_ERROR("Index sector write failed @ page %d", pagenum);
		target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
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		return ERROR_FLASH_OPERATION_FAILED;
	}

	target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );

	return ERROR_OK;
}



/**
 * Calculate FPTR.TR register value for desired program/erase time.
 *
 * @param clock System clock in Hz
 * @param time Program/erase time in µs
 */
static uint32_t lpc2900_calc_tr( uint32_t clock, uint32_t time )
{
	/*           ((time[µs]/1e6) * f[Hz]) + 511
	 * FPTR.TR = -------------------------------
	 *                         512
	 *
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	 * The result is the
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	 */

	uint32_t tr_val = (uint32_t)((((time / 1e6) * clock) + 511.0) / 512.0);

	return tr_val;
}


/***********************  Private flash commands  **************************/


/**
 * Command to determine the signature of the whole flash.
 *
 * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
 * of the flash content.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_signature_command( struct command_context_s *cmd_ctx,
                                             char *cmd, char **args, int argc )
{
	uint32_t status;
	uint32_t signature[4];


	if( argc < 1 )
	{
		LOG_WARNING( "Too few arguments. Call: lpc2900 signature <bank#>" );
		return ERROR_FLASH_BANK_INVALID;
	}

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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;
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	if( bank->target->state != TARGET_HALTED )
	{
		LOG_ERROR( "Target not halted" );
		return ERROR_TARGET_NOT_HALTED;
	}

	/* Run BIST over whole flash range */
	if( (status = lpc2900_run_bist128( bank,
	                                   bank->base,
	                                   bank->base + (bank->size - 1),
	                                   &signature)
	                                 ) != ERROR_OK )
	{
		return status;
	}

	command_print( cmd_ctx, "signature: 0x%8.8" PRIx32
	                                  ":0x%8.8" PRIx32
	                                  ":0x%8.8" PRIx32
	                                  ":0x%8.8" PRIx32,
	              signature[3], signature[2], signature[1], signature[0] );

	return ERROR_OK;
}



/**
 * Store customer info in file.
 *
 * Read customer info from index sector, and store that block of data into
 * a disk file. The format is binary.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_read_custom_command( struct command_context_s *cmd_ctx,
                                               char *cmd, char **args, int argc )
{
	if( argc < 2 )
	{
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;

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	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;
	lpc2900_info->risky = 0;

	/* Get target, and check if it's halted */
	target_t *target = bank->target;
	if( target->state != TARGET_HALTED )
	{
		LOG_ERROR( "Target not halted" );
		return ERROR_TARGET_NOT_HALTED;
	}

	/* Storage for customer info. Read in two parts */
	uint32_t customer[ ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2 ];

	/* Enable access to index sector */
	target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS );

	/* Read two parts */
	target_read_memory( target, bank->base+ISS_CUSTOMER_START1, 4,
	                            ISS_CUSTOMER_NWORDS1,
	                            (uint8_t *)&customer[0] );
	target_read_memory( target, bank->base+ISS_CUSTOMER_START2, 4,
	                            ISS_CUSTOMER_NWORDS2,
	                            (uint8_t *)&customer[ISS_CUSTOMER_NWORDS1] );

	/* Deactivate access to index sector */
	target_write_u32( target, FCTR, FCTR_FS_CS | FCTR_FS_WEB );

	/* Try and open the file */
	fileio_t fileio;
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	const char *filename = args[1];
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	int ret = fileio_open( &fileio, filename, FILEIO_WRITE, FILEIO_BINARY );
	if( ret != ERROR_OK )
	{
		LOG_WARNING( "Could not open file %s", filename );
		return ret;
	}

	uint32_t nwritten;
	ret = fileio_write( &fileio, sizeof(customer),
                        (const uint8_t *)customer, &nwritten );
	if( ret != ERROR_OK )
	{
		LOG_ERROR( "Write operation to file %s failed", filename );
		fileio_close( &fileio );
		return ret;
	}

	fileio_close( &fileio );

	return ERROR_OK;
}




/**
 * Enter password to enable potentially dangerous options.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_password_command(struct command_context_s *cmd_ctx,
                                           char *cmd, char **args, int argc)
{
	if (argc < 2)
	{
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;

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	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

#define ISS_PASSWORD "I_know_what_I_am_doing"

	lpc2900_info->risky = !strcmp( args[1], ISS_PASSWORD );

	if( !lpc2900_info->risky )
	{
		command_print(cmd_ctx, "Wrong password (use '%s')", ISS_PASSWORD);
		return ERROR_COMMAND_ARGUMENT_INVALID;
	}

	command_print(cmd_ctx,
                  "Potentially dangerous operation allowed in next command!");

	return ERROR_OK;
}



/**
 * Write customer info from file to the index sector.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_write_custom_command( struct command_context_s *cmd_ctx,
                                                char *cmd, char **args, int argc )
{
	if (argc < 2)
	{
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;

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	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

	/* Check if command execution is allowed. */
	if( !lpc2900_info->risky )
	{
		command_print( cmd_ctx, "Command execution not allowed!" );
		return ERROR_COMMAND_ARGUMENT_INVALID;
	}
	lpc2900_info->risky = 0;

	/* Get target, and check if it's halted */
	target_t *target = bank->target;
	if (target->state != TARGET_HALTED)
	{
		LOG_ERROR("Target not halted");
		return ERROR_TARGET_NOT_HALTED;
	}

	/* The image will always start at offset 0 */
	image_t image;
	image.base_address_set = 1;
	image.base_address = 0;
	image.start_address_set = 0;

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	const char *filename = args[1];
	const char *type = (argc >= 3) ? args[2] : NULL;
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	retval = image_open(&image, filename, type);
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	if (retval != ERROR_OK)
	{
		return retval;
	}

	/* Do a sanity check: The image must be exactly the size of the customer
	   programmable area. Any other size is rejected. */
	if( image.num_sections != 1 )
	{
		LOG_ERROR("Only one section allowed in image file.");
		return ERROR_COMMAND_SYNTAX_ERROR;
	}
	if( (image.sections[0].base_address != 0) ||
        (image.sections[0].size != ISS_CUSTOMER_SIZE) )
	{
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		LOG_ERROR("Incorrect image file size. Expected %d, "
			"got %" PRIu32,
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                   ISS_CUSTOMER_SIZE, image.sections[0].size);
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

	/* Well boys, I reckon this is it... */

	/* Customer info is split into two blocks in pages 4 and 5. */
	uint8_t page[FLASH_PAGE_SIZE];

	/* Page 4 */
	uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
	memset( page, 0xff, FLASH_PAGE_SIZE );
	uint32_t size_read;
	retval = image_read_section( &image, 0, 0,
	                             ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
	if( retval != ERROR_OK )
	{
		LOG_ERROR("couldn't read from file '%s'", filename);
		image_close(&image);
		return retval;
	}
	if( (retval = lpc2900_write_index_page( bank, 4, &page )) != ERROR_OK )
	{
		image_close(&image);
		return retval;
	}

	/* Page 5 */
	offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
	memset( page, 0xff, FLASH_PAGE_SIZE );
	retval = image_read_section( &image, 0, ISS_CUSTOMER_SIZE1,
	                             ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
	if( retval != ERROR_OK )
	{
		LOG_ERROR("couldn't read from file '%s'", filename);
		image_close(&image);
		return retval;
	}
	if( (retval = lpc2900_write_index_page( bank, 5, &page )) != ERROR_OK )
	{
		image_close(&image);
		return retval;
	}

	image_close(&image);

	return ERROR_OK;
}



/**
 * Activate 'sector security' for a range of sectors.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_secure_sector_command(struct command_context_s *cmd_ctx,
                                                char *cmd, char **args, int argc)
{
	if (argc < 3)
	{
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

	/* Get the bank descriptor */
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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;

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	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

	/* Check if command execution is allowed. */
	if( !lpc2900_info->risky )
	{
		command_print( cmd_ctx, "Command execution not allowed! "
		"(use 'password' command first)");
		return ERROR_COMMAND_ARGUMENT_INVALID;
	}
	lpc2900_info->risky = 0;

	/* Read sector range, and do a sanity check. */
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	int first, last;
	COMMAND_PARSE_NUMBER(int, args[1], first);
	COMMAND_PARSE_NUMBER(int, args[2], last);
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	if( (first >= bank->num_sectors) ||
	    (last >= bank->num_sectors) ||
	    (first > last) )
	{
		command_print( cmd_ctx, "Illegal sector range" );
		return ERROR_COMMAND_ARGUMENT_INVALID;
	}

	uint8_t page[FLASH_PAGE_SIZE];
	int sector;

	/* Sectors in page 6 */
	if( (first <= 4) || (last >= 8) )
	{
		memset( &page, 0xff, FLASH_PAGE_SIZE );
		for( sector = first; sector <= last; sector++ )
		{
			if( sector <= 4 )
			{
				memset( &page[0xB0 + 16*sector], 0, 16 );
			}
			else if( sector >= 8 )
			{
				memset( &page[0x00 + 16*(sector - 8)], 0, 16 );
			}
		}

		if( (retval = lpc2900_write_index_page( bank, 6, &page )) != ERROR_OK )
		{
			LOG_ERROR("failed to update index sector page 6");
			return retval;
		}
	}

	/* Sectors in page 7 */
	if( (first <= 7) && (last >= 5) )
	{
		memset( &page, 0xff, FLASH_PAGE_SIZE );
		for( sector = first; sector <= last; sector++ )
		{
			if( (sector >= 5) && (sector <= 7) )
			{
				memset( &page[0x00 + 16*(sector - 5)], 0, 16 );
			}
		}

		if( (retval = lpc2900_write_index_page( bank, 7, &page )) != ERROR_OK )
		{
			LOG_ERROR("failed to update index sector page 7");
			return retval;
		}
	}

	command_print( cmd_ctx,
	        "Sectors security will become effective after next power cycle");

	/* Update the sector security status */
	if ( lpc2900_read_security_status(bank) != ERROR_OK )
	{
		LOG_ERROR( "Cannot determine sector security status" );
		return ERROR_FLASH_OPERATION_FAILED;
	}

	return ERROR_OK;
}



/**
 * Activate JTAG protection.
 *
 * @param cmd_ctx
 * @param cmd
 * @param args
 * @param argc
 */
static int lpc2900_handle_secure_jtag_command(struct command_context_s *cmd_ctx,
                                              char *cmd, char **args, int argc)
{
	if (argc < 1)
	{
		return ERROR_COMMAND_SYNTAX_ERROR;
	}

	/* Get the bank descriptor */
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	flash_bank_t *bank;
	int retval = flash_command_get_bank_by_num(cmd_ctx, args[0], &bank);
	if (ERROR_OK != retval)
		return retval;

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	lpc2900_flash_bank_t *lpc2900_info = bank->driver_priv;

	/* Check if command execution is allowed. */
	if( !lpc2900_info->risky )
	{
		command_print( cmd_ctx, "Command execution not allowed! "
		                        "(use 'password' command first)");
		return ERROR_COMMAND_ARGUMENT_INVALID;
	}
	lpc2900_info->risky = 0;

	/* Prepare page */
	uint8_t page[FLASH_PAGE_SIZE];
	memset( &page, 0xff, FLASH_PAGE_SIZE );


	/* Insert "soft" protection word */
	page[0x30 + 15] = 0x7F;
	page[0x30 + 11] = 0x7F;
	page[0x30 +  7] = 0x7F;
	page[0x30 +  3] = 0x7F;

	/* Write to page 5 */
	if( (retval = lpc2900_write_index_page( bank, 5, &page ))
			!= ERROR_OK )
	{
		LOG_ERROR("failed to update index sector page 5");
		return retval;
	}

	LOG_INFO("JTAG security set. Good bye!");

	return ERROR_OK;
}



/***********************  Flash interface functions  **************************/


/**
 * Register private command handlers.
 *
 * @param cmd_ctx
 */
static int lpc2900_register_commands(struct command_context_s *cmd_ctx)
{
	command_t *lpc2900_cmd = register_command(cmd_ctx, NULL, "lpc2900",
	                                          NULL, COMMAND_ANY, NULL);

	register_command(
	    cmd_ctx,
	    lpc2900_cmd,