zy1000.c 21.9 KB
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/***************************************************************************
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 *   Copyright (C) 2007-2010 by Øyvind Harboe                              *
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 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/
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/* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
 *
 * The zy1000 is a standalone debugger that has a web interface and
 * requires no drivers on the developer host as all communication
 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
 * accelerate the JTAG commands, while offering *very* low latency
 * between OpenOCD and the FPGA registers.
 *
 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
 *
 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
 * revb is using ARM7 + Xilinx.
 *
 * See Zylin web pages or contact Zylin for more information.
 *
 * The reason this code is in OpenOCD rather than OpenOCD linked with the
 * ZY1000 code is that OpenOCD is the long road towards getting
 * libopenocd into place. libopenocd will support both low performance,
 * low latency systems(embedded) and high performance high latency
 * systems(PCs).
 */
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#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

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#include <target/embeddedice.h>
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#include <jtag/minidriver.h>
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#include <jtag/interface.h>
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#include "zy1000_version.h"
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#include <cyg/hal/hal_io.h>             // low level i/o
#include <cyg/hal/hal_diag.h>

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#include <time.h>

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#ifdef CYGPKG_HAL_NIOS2
#include <cyg/hal/io.h>
#include <cyg/firmwareutil/firmwareutil.h>
#endif

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#define ZYLIN_VERSION GIT_ZY1000_VERSION
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#define ZYLIN_DATE __DATE__
#define ZYLIN_TIME __TIME__
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#define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
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#define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
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static int zy1000_khz(int khz, int *jtag_speed)
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{
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	if (khz == 0)
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	{
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		*jtag_speed = 0;
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	}
	else
	{
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		*jtag_speed = 64000/khz;
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	}
	return ERROR_OK;
}

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static int zy1000_speed_div(int speed, int *khz)
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{
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	if (speed == 0)
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	{
		*khz = 0;
	}
	else
	{
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		*khz = 64000/speed;
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	}

	return ERROR_OK;
}

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static bool readPowerDropout(void)
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{
	cyg_uint32 state;
	// sample and clear power dropout
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
	ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
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	bool powerDropout;
	powerDropout = (state & 0x80) != 0;
	return powerDropout;
}
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static bool readSRST(void)
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{
	cyg_uint32 state;
	// sample and clear SRST sensing
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
	ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
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	bool srstAsserted;
	srstAsserted = (state & 0x40) != 0;
	return srstAsserted;
}

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static int zy1000_srst_asserted(int *srst_asserted)
{
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	*srst_asserted = readSRST();
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	return ERROR_OK;
}

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static int zy1000_power_dropout(int *dropout)
{
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	*dropout = readPowerDropout();
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	return ERROR_OK;
}

void zy1000_reset(int trst, int srst)
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{
	LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
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	/* flush the JTAG FIFO. Not flushing the queue before messing with
	 * reset has such interesting bugs as causing hard to reproduce
	 * RCLK bugs as RCLK will stop responding when TRST is asserted
	 */
	waitIdle();

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	if (!srst)
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	{
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
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	}
	else
	{
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		/* Danger!!! if clk != 0 when in
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		 * idle in TAP_IDLE, reset halt on str912 will fail.
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		 */
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
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	}

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	if (!trst)
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	{
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
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	}
	else
	{
		/* assert reset */
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
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	}
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	if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
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	{
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		/* we're now in the RESET state until trst is deasserted */
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
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	} else
	{
		/* We'll get RCLK failure when we assert TRST, so clear any false positives here */
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
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	}

	/* wait for srst to float back up */
	if (!srst)
	{
		int i;
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		for (i = 0; i < 1000; i++)
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		{
			// We don't want to sense our own reset, so we clear here.
			// There is of course a timing hole where we could loose
			// a "real" reset.
			if (!readSRST())
				break;

			/* wait 1ms */
			alive_sleep(1);
		}

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		if (i == 1000)
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		{
			LOG_USER("SRST didn't deassert after %dms", i);
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		} else if (i > 1)
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		{
			LOG_USER("SRST took %dms to deassert", i);
		}
	}
}

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int zy1000_speed(int speed)
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{
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	/* flush JTAG master FIFO before setting speed */
	waitIdle();

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	if (speed == 0)
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	{
		/*0 means RCLK*/
		speed = 0;
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
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		LOG_DEBUG("jtag_speed using RCLK");
	}
	else
	{
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		if (speed > 8190 || speed < 2)
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		{
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			LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
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			return ERROR_INVALID_ARGUMENTS;
		}

		LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
		ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
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	}
	return ERROR_OK;
}

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static bool savePower;
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static void setPower(bool power)
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{
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	savePower = power;
	if (power)
	{
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
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	} else
	{
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
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	}
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}

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COMMAND_HANDLER(handle_power_command)
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{
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	switch (CMD_ARGC)
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	{
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	case 1: {
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		bool enable;
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		COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
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		setPower(enable);
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		// fall through
	}
	case 0:
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		LOG_INFO("Target power %s", savePower ? "on" : "off");
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		break;
	default:
		return ERROR_INVALID_ARGUMENTS;
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	}
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	return ERROR_OK;
}


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/* Give TELNET a way to find out what version this is */
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static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
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{
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	if ((argc < 1) || (argc > 3))
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		return JIM_ERR;
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	const char *version_str = NULL;
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	if (argc == 1)
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	{
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		version_str = ZYLIN_OPENOCD_VERSION;
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	} else
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	{
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		const char *str = Jim_GetString(argv[1], NULL);
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		const char *str2 = NULL;
		if (argc > 2)
			str2 = Jim_GetString(argv[2], NULL);
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		if (strcmp("openocd", str) == 0)
		{
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			version_str = ZYLIN_OPENOCD;
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		}
		else if (strcmp("zy1000", str) == 0)
		{
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			version_str = ZYLIN_VERSION;
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		}
		else if (strcmp("date", str) == 0)
		{
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			version_str = ZYLIN_DATE;
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		}
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		else if (strcmp("time", str) == 0)
		{
			version_str = ZYLIN_TIME;
		}
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		else if (strcmp("pcb", str) == 0)
		{
#ifdef CYGPKG_HAL_NIOS2
			version_str="c";
#else
			version_str="b";
#endif
		}
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#ifdef CYGPKG_HAL_NIOS2
		else if (strcmp("fpga", str) == 0)
		{

			/* return a list of 32 bit integers to describe the expected
			 * and actual FPGA
			 */
			static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
			cyg_uint32 id, timestamp;
			HAL_READ_UINT32(SYSID_BASE, id);
			HAL_READ_UINT32(SYSID_BASE+4, timestamp);
			sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
			version_str = fpga_id;
			if ((argc>2) && (strcmp("time", str2) == 0))
			{
			    time_t last_mod = timestamp;
			    char * t = ctime (&last_mod) ;
			    t[strlen(t)-1] = 0;
			    version_str = t;
			}
		}
#endif

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		else
		{
			return JIM_ERR;
		}
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	}
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	Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));

	return JIM_OK;
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}

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#ifdef CYGPKG_HAL_NIOS2
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struct info_forward
{
	void *data;
	struct cyg_upgrade_info *upgraded_file;
};

static void report_info(void *data, const char * format, va_list args)
{
	char *s = alloc_vprintf(format, args);
	LOG_USER_N("%s", s);
	free(s);
}

struct cyg_upgrade_info firmware_info =
{
		(cyg_uint8 *)0x84000000,
		"/ram/firmware.phi",
		"Firmware",
		0x0300000,
		0x1f00000 -
		0x0300000,
		"ZylinNiosFirmware\n",
		report_info,
};

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static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
	if (argc != 2)
		return JIM_ERR;

	int length;
	const char *str = Jim_GetString(argv[1], &length);

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	/* */
	int tmpFile;
	if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
	{
		return JIM_ERR;
	}
	bool success;
	success = write(tmpFile, str, length) == length;
	close(tmpFile);
	if (!success)
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		return JIM_ERR;

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	if (!cyg_firmware_upgrade(NULL, firmware_info))
		return JIM_ERR;
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	return JIM_OK;
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}
#endif

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static int
zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
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								   int argc,
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		Jim_Obj * const *argv)
{
	if (argc != 1)
	{
		Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
		return JIM_ERR;
	}

	cyg_uint32 status;
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	ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
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	Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
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	return JIM_OK;
}

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int zy1000_init(void)
{
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	LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
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	setPower(true); // on by default


	 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
	zy1000_reset(0, 0);
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	zy1000_speed(jtag_get_speed());
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	return ERROR_OK;
}

int zy1000_quit(void)
{

	return ERROR_OK;
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}



int interface_jtag_execute_queue(void)
{
	cyg_uint32 empty;

	waitIdle();
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	ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
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	/* clear JTAG error register */
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
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	if ((empty&0x400) != 0)
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	{
		LOG_WARNING("RCLK timeout");
		/* the error is informative only as we don't want to break the firmware if there
		 * is a false positive.
		 */
//		return ERROR_FAIL;
	}
	return ERROR_OK;
}





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static cyg_uint32 getShiftValue(void)
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{
	cyg_uint32 value;
	waitIdle();
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	ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
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	VERBOSE(LOG_INFO("getShiftValue %08x", value));
	return value;
}
#if 0
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static cyg_uint32 getShiftValueFlip(void)
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{
	cyg_uint32 value;
	waitIdle();
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	ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
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	VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
	return value;
}
#endif

#if 0
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static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, cyg_uint32 value)
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{
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	VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
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	cyg_uint32 a,b;
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	a = state;
	b = endState;
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
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	VERBOSE(getShiftValueFlip());
}
#endif

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static void gotoEndState(tap_state_t end_state)
{
	setCurrentState(end_state);
}

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static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, int pause)
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{
	int i;
	int j;
	int k;

	for (i = 0; i < num_fields; i++)
	{
		cyg_uint32 value;

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		uint8_t *inBuffer = NULL;
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		// figure out where to store the input data
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		int num_bits = fields[i].num_bits;
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		if (fields[i].in_value != NULL)
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		{
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			inBuffer = fields[i].in_value;
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		}

		// here we shuffle N bits out/in
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		j = 0;
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		while (j < num_bits)
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		{
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			tap_state_t pause_state;
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			int l;
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			k = num_bits-j;
			pause_state = (shiftState == TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
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			if (k > 32)
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			{
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				k = 32;
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				/* we have more to shift out */
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			} else if (pause&&(i == num_fields-1))
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			{
				/* this was the last to shift out this time */
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				pause_state = (shiftState==TAP_DRSHIFT)?TAP_DRPAUSE:TAP_IRPAUSE;
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			}

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			// we have (num_bits + 7)/8 bytes of bits to toggle out.
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			// bits are pushed out LSB to MSB
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			value = 0;
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			if (fields[i].out_value != NULL)
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			{
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				for (l = 0; l < k; l += 8)
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				{
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					value|=fields[i].out_value[(j + l)/8]<<l;
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				}
			}
			/* mask away unused bits for easier debugging */
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			if (k < 32)
			{
				value&=~(((uint32_t)0xffffffff) << k);
			} else
			{
				/* Shifting by >= 32 is not defined by the C standard
				 * and will in fact shift by &0x1f bits on nios */
			}
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			shiftValueInner(shiftState, pause_state, k, value);

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			if (inBuffer != NULL)
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			{
				// data in, LSB to MSB
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				value = getShiftValue();
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				// we're shifting in data to MSB, shift data to be aligned for returning the value
				value >>= 32-k;

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				for (l = 0; l < k; l += 8)
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				{
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					inBuffer[(j + l)/8]=(value >> l)&0xff;
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				}
			}
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			j += k;
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		}
	}
}

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int interface_jtag_add_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
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{

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	int j;
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	int scan_size = 0;
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	struct jtag_tap *tap, *nextTap;
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	for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
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	{
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		nextTap = jtag_tap_next_enabled(tap);
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		int pause = (nextTap==NULL);
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		int found = 0;
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		scan_size = tap->ir_length;
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		/* search the list */
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		for (j = 0; j < num_fields; j++)
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		{
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			if (tap == fields[j].tap)
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			{
				found = 1;

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				scanFields(1, fields + j, TAP_IRSHIFT, pause);
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				/* update device information */
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				buf_cpy(fields[j].out_value, tap->cur_instr, scan_size);
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				tap->bypass = 0;
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				break;
			}
		}

		if (!found)
		{
			/* if a device isn't listed, set it to BYPASS */
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			uint8_t ones[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
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			struct scan_field tmp;
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			memset(&tmp, 0, sizeof(tmp));
			tmp.out_value = ones;
			tmp.num_bits = scan_size;
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			scanFields(1, &tmp, TAP_IRSHIFT, pause);
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			/* update device information */
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			buf_cpy(tmp.out_value, tap->cur_instr, scan_size);
			tap->bypass = 1;
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		}
	}
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	gotoEndState(state);
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	return ERROR_OK;
}





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int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
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{
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	scanFields(num_fields, fields, TAP_IRSHIFT, 1);
	gotoEndState(state);
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	return ERROR_OK;
}

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int interface_jtag_add_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
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{
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	int j;
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	struct jtag_tap *tap, *nextTap;
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	for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
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	{
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		nextTap = jtag_tap_next_enabled(tap);
		int found = 0;
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		int pause = (nextTap==NULL);
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		for (j = 0; j < num_fields; j++)
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		{
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			/* Find a range of fields to write to this tap */
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			if (tap == fields[j].tap)
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			{
				found = 1;
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				int i;
				for (i = j + 1; i < num_fields; i++)
				{
					if (tap != fields[j].tap)
					{
						break;
					}
				}

				scanFields(i - j, fields + j, TAP_DRSHIFT, pause);
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				j = i;
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			}
		}
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		if (!found)
		{
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			/* Shift out a 0 for disabled tap's */
			shiftValueInner(TAP_DRSHIFT, pause?TAP_DRPAUSE:TAP_DRSHIFT, 1, 0);
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		}
		else
		{
		}
	}
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	gotoEndState(state);
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	return ERROR_OK;
}

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int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
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{
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	scanFields(num_fields, fields, TAP_DRSHIFT, 1);
	gotoEndState(state);
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	return ERROR_OK;
}


int interface_jtag_add_tlr()
{
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	setCurrentState(TAP_RESET);
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	return ERROR_OK;
}




int interface_jtag_add_reset(int req_trst, int req_srst)
{
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	zy1000_reset(req_trst, req_srst);
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	return ERROR_OK;
}

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static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
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{
	/* num_cycles can be 0 */
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	setCurrentState(clockstate);
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	/* execute num_cycles, 32 at the time. */
	int i;
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	for (i = 0; i < num_cycles; i += 32)
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	{
		int num;
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		num = 32;
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		if (num_cycles-i < num)
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		{
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			num = num_cycles-i;
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		}
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		shiftValueInner(clockstate, clockstate, num, 0);
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	}

#if !TEST_MANUAL()
	/* finish in end_state */
	setCurrentState(state);
#else
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	tap_state_t t = TAP_IDLE;
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	/* test manual drive code on any target */
	int tms;
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	uint8_t tms_scan = tap_get_tms_path(t, state);
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	int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
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	for (i = 0; i < tms_count; i++)
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	{
		tms = (tms_scan >> i) & 1;
		waitIdle();
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		ZY1000_POKE(ZY1000_JTAG_BASE + 0x28,  tms);
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	}
	waitIdle();
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	ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
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#endif


	return ERROR_OK;
}

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int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
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{
	return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
}

int interface_jtag_add_clocks(int num_cycles)
{
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	return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
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}

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int interface_jtag_add_sleep(uint32_t us)
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{
	jtag_sleep(us);
	return ERROR_OK;
}

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int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
{
	/*wait for the fifo to be empty*/
	waitIdle();

	for (unsigned i = 0; i < num_bits; i++)
	{
		int tms;

		if (((seq[i/8] >> (i % 8)) & 1) == 0)
		{
			tms = 0;
		}
		else
		{
			tms = 1;
		}

		waitIdle();
		ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
	}

	waitIdle();
	if (state != TAP_INVALID)
	{
		ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
	} else
	{
		/* this would be normal if we are switching to SWD mode */
	}
	return ERROR_OK;
}

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int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
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{
	int state_count;
	int tms = 0;

	state_count = 0;

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	tap_state_t cur_state = cmd_queue_cur_state;
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	uint8_t seq[16];
	memset(seq, 0, sizeof(seq));
	assert(num_states < (sizeof(seq) * 8));

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	while (num_states)
	{
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		if (tap_state_transition(cur_state, false) == path[state_count])
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		{
			tms = 0;
		}
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		else if (tap_state_transition(cur_state, true) == path[state_count])
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		{
			tms = 1;
		}
		else
		{
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			LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
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			exit(-1);
		}

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		seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
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		cur_state = path[state_count];
		state_count++;
		num_states--;
	}

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	return interface_add_tms_seq(state_count, seq, cur_state);
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}
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void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
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{
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//	static int const reg_addr = 0x5;
	tap_state_t end_state = jtag_get_end_state();
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	if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
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	{
		/* better performance via code duplication */
		if (little)
		{
			int i;
			for (i = 0; i < count; i++)
			{
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				shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
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				shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
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				buffer += 4;
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			}
		} else
		{
			int i;
			for (i = 0; i < count; i++)
			{
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				shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
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				shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
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				buffer += 4;
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			}
		}
	}
	else
	{
		int i;
		for (i = 0; i < count; i++)
		{
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			embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
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			buffer += 4;
		}
	}
}

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int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
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{
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#if 0
	int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
	return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
#else
	static const int bits[] = {32, 2};
	uint32_t values[] = {0, 0};

	/* FIX!!!!!! the target_write_memory() API started this nasty problem
	 * with unaligned uint32_t * pointers... */
	const uint8_t *t = (const uint8_t *)data;

	while (count--)
	{
		values[0] = *t++;
		values[0] |= (*t++<<8);
		values[0] |= (*t++<<16);
		values[0] |= (*t++<<24);

		if (count > 0)
		{
			jtag_add_dr_out(tap,
				2,
				bits,
				values,
				TAP_DRPAUSE);

#if 1
			/* copy & paste from arm11_dbgtap.c */
			//TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT

			waitIdle();
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
			waitIdle();
			ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
#else
			static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
			{
				TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
			};

			jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
				arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
#endif
		} else
		{
			/* This will happen on the last iteration updating the current tap state
			 * so we don't have to track it during the common code path */
			jtag_add_dr_out(tap,
				2,
				bits,
				values,
				TAP_IDLE);
		}
	}

	return jtag_execute_queue();
#endif
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}


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static const struct command_registration zy1000_commands[] = {
	{
		.name = "power",
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		.handler = handle_power_command,
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		.mode = COMMAND_ANY,
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		.help = "Turn power switch to target on/off. "
			"With no arguments, prints status.",
		.usage = "('on'|'off)",
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	},
	{
		.name = "zy1000_version",
		.mode = COMMAND_ANY,
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		.jim_handler = jim_zy1000_version,
		.help = "Print version info for zy1000.",
		.usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
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	},
	{
		.name = "powerstatus",
		.mode = COMMAND_ANY,
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		.jim_handler = zylinjtag_Jim_Command_powerstatus,
		.help = "Returns power status of target",
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	},
#ifdef CYGPKG_HAL_NIOS2
	{
		.name = "updatezy1000firmware",
		.mode = COMMAND_ANY,
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		.jim_handler = jim_zy1000_writefirmware,
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		.help = "writes firmware to flash",
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		/* .usage = "some_string", */
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	},
#endif
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	COMMAND_REGISTRATION_DONE
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};



struct jtag_interface zy1000_interface =
{
	.name = "ZY1000",
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	.supported = DEBUG_CAP_TMS_SEQ,
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	.execute_queue = NULL,
	.speed = zy1000_speed,
	.commands = zy1000_commands,
	.init = zy1000_init,
	.quit = zy1000_quit,
	.khz = zy1000_khz,
	.speed_div = zy1000_speed_div,
	.power_dropout = zy1000_power_dropout,
	.srst_asserted = zy1000_srst_asserted,
};