pic32mx.c 24 KB
Newer Older
oharboe's avatar
oharboe committed
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
/***************************************************************************
 *   Copyright (C) 2005 by Dominic Rath                                    *
 *   Dominic.Rath@gmx.de                                                   *
 *                                                                         *
 *   Copyright (C) 2008 by Spencer Oliver                                  *
 *   spen@spen-soft.co.uk                                                  *
 *                                                                         *
 *   Copyright (C) 2008 by John McCarthy                                   *
 *   jgmcc@magma.ca                                                        *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

Zachary T Welch's avatar
Zachary T Welch committed
30
#include "imp.h"
31
#include <target/algorithm.h>
32
#include <target/mips32.h>
Spencer Oliver's avatar
Spencer Oliver committed
33
#include <target/mips_m4k.h>
oharboe's avatar
oharboe committed
34

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
#define PIC32MX_MANUF_ID	0x029

/* pic32mx memory locations */

#define PIC32MX_PHYS_RAM			0x00000000
#define PIC32MX_PHYS_PGM_FLASH		0x1D000000
#define PIC32MX_PHYS_PERIPHERALS	0x1F800000
#define PIC32MX_PHYS_BOOT_FLASH		0x1FC00000

/*
 * Translate Virtual and Physical addresses.
 * Note: These macros only work for KSEG0/KSEG1 addresses.
 */

#define Virt2Phys(v) 	((v) & 0x1FFFFFFF)

/* pic32mx configuration register locations */

#define PIC32MX_DEVCFG0		0xBFC02FFC
#define PIC32MX_DEVCFG1		0xBFC02FF8
#define PIC32MX_DEVCFG2		0xBFC02FF4
#define PIC32MX_DEVCFG3		0xBFC02FF0
#define PIC32MX_DEVID		0xBF80F220

#define PIC32MX_BMXPFMSZ	0xBF882060
#define PIC32MX_BMXBOOTSZ	0xBF882070
#define PIC32MX_BMXDRMSZ	0xBF882040

/* pic32mx flash controller register locations */

#define PIC32MX_NVMCON		0xBF80F400
#define PIC32MX_NVMCONCLR	0xBF80F404
#define PIC32MX_NVMCONSET	0xBF80F408
#define PIC32MX_NVMCONINV	0xBF80F40C
#define NVMCON_NVMWR		(1 << 15)
#define NVMCON_NVMWREN		(1 << 14)
#define NVMCON_NVMERR		(1 << 13)
#define NVMCON_LVDERR		(1 << 12)
#define NVMCON_LVDSTAT		(1 << 11)
#define NVMCON_OP_PFM_ERASE		0x5
#define NVMCON_OP_PAGE_ERASE	0x4
#define NVMCON_OP_ROW_PROG		0x3
#define NVMCON_OP_WORD_PROG		0x1
#define NVMCON_OP_NOP			0x0

#define PIC32MX_NVMKEY		0xBF80F410
#define PIC32MX_NVMADDR		0xBF80F420
#define PIC32MX_NVMADDRCLR	0xBF80F424
#define PIC32MX_NVMADDRSET	0xBF80F428
#define PIC32MX_NVMADDRINV	0xBF80F42C
#define PIC32MX_NVMDATA		0xBF80F430
#define PIC32MX_NVMSRCADDR	0xBF80F440

/* flash unlock keys */

#define NVMKEY1			0xAA996655
#define NVMKEY2			0x556699AA

struct pic32mx_flash_bank
{
	struct working_area *write_algorithm;
	int probed;
};

99
100
101
102
/*
 * DEVID values as per PIC32MX Flash Programming Specification Rev H
 */

103
static const struct pic32mx_devs_s {
104
	uint32_t devid;
105
	const char *name;
oharboe's avatar
oharboe committed
106
} pic32mx_devs[] = {
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
	{0x04A07053, "110F016B"},
	{0x04A09053, "110F016C"},
	{0x04A0B053, "110F016D"},
	{0x04A06053, "120F032B"},
	{0x04A08053, "120F032C"},
	{0x04A0A053, "120F032D"},
	{0x04A01053, "210F016B"},
	{0x04A03053, "210F016C"},
	{0x04A05053, "210F016D"},
	{0x04A00053, "220F032B"},
	{0x04A02053, "220F032C"},
	{0x04A04053, "220F032D"},
	{0x00938053, "360F512L"},
	{0x00934053, "360F256L"},
	{0x0092D053, "340F128L"},
	{0x0092A053, "320F128L"},
	{0x00916053, "340F512H"},
	{0x00912053, "340F256H"},
	{0x0090D053, "340F128H"},
	{0x0090A053, "320F128H"},
	{0x00906053, "320F064H"},
	{0x00902053, "320F032H"},
	{0x00978053, "460F512L"},
	{0x00974053, "460F256L"},
	{0x0096D053, "440F128L"},
	{0x00952053, "440F256H"},
	{0x00956053, "440F512H"},
	{0x0094D053, "440F128H"},
	{0x00942053, "420F032H"},
	{0x04307053, "795F512L"},
	{0x0430E053, "795F512H"},
	{0x04306053, "775F512L"},
	{0x0430D053, "775F512H"},
	{0x04312053, "775F256L"},
	{0x04303053, "775F256H"},
	{0x04417053, "764F128L"},
	{0x0440B053, "764F128H"},
	{0x04341053, "695F512L"},
	{0x04325053, "695F512H"},
	{0x04311053, "675F512L"},
	{0x0430C053, "675F512H"},
	{0x04305053, "675F256L"},
	{0x0430B053, "675F256H"},
	{0x04413053, "664F128L"},
	{0x04407053, "664F128H"},
	{0x04411053, "664F064L"},
	{0x04405053, "664F064H"},
	{0x0430F053, "575F512L"},
	{0x04309053, "575F512H"},
	{0x04333053, "575F256L"},
	{0x04317053, "575F256H"},
	{0x0440F053, "564F128L"},
	{0x04403053, "564F128H"},
	{0x0440D053, "564F064L"},
	{0x04401053, "564F064H"},
	{0x04400053, "534F064H"},
	{0x0440C053, "534F064L"},
	{0x00000000, NULL}
oharboe's avatar
oharboe committed
165
166
167
168
};

/* flash bank pic32mx <base> <size> 0 0 <target#>
 */
169
FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
oharboe's avatar
oharboe committed
170
{
171
	struct pic32mx_flash_bank *pic32mx_info;
oharboe's avatar
oharboe committed
172

173
	if (CMD_ARGC < 6)
oharboe's avatar
oharboe committed
174
175
176
177
178
	{
		LOG_WARNING("incomplete flash_bank pic32mx configuration");
		return ERROR_FLASH_BANK_INVALID;
	}

179
	pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
oharboe's avatar
oharboe committed
180
181
182
183
184
185
186
187
	bank->driver_priv = pic32mx_info;

	pic32mx_info->write_algorithm = NULL;
	pic32mx_info->probed = 0;

	return ERROR_OK;
}

188
static uint32_t pic32mx_get_flash_status(struct flash_bank *bank)
oharboe's avatar
oharboe committed
189
{
Zachary T Welch's avatar
Zachary T Welch committed
190
	struct target *target = bank->target;
191
	uint32_t status;
oharboe's avatar
oharboe committed
192
193
194
195
196
197

	target_read_u32(target, PIC32MX_NVMCON, &status);

	return status;
}

198
static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
oharboe's avatar
oharboe committed
199
{
200
	uint32_t status;
oharboe's avatar
oharboe committed
201
202
203
204

	/* wait for busy to clear */
	while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0))
	{
205
		LOG_DEBUG("status: 0x%" PRIx32, status);
oharboe's avatar
oharboe committed
206
207
		alive_sleep(1);
	}
zwelch's avatar
zwelch committed
208
	if (timeout <= 0)
209
		LOG_DEBUG("timeout: status: 0x%" PRIx32, status);
oharboe's avatar
oharboe committed
210
211
212
213

	return status;
}

214
static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeout)
oharboe's avatar
oharboe committed
215
{
Zachary T Welch's avatar
Zachary T Welch committed
216
	struct target *target = bank->target;
217
	uint32_t status;
oharboe's avatar
oharboe committed
218

zwelch's avatar
zwelch committed
219
	target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
oharboe's avatar
oharboe committed
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235

	/* unlock flash registers */
	target_write_u32(target, PIC32MX_NVMKEY, NVMKEY1);
	target_write_u32(target, PIC32MX_NVMKEY, NVMKEY2);

	/* start operation */
	target_write_u32(target, PIC32MX_NVMCONSET, NVMCON_NVMWR);

	status = pic32mx_wait_status_busy(bank, timeout);

	/* lock flash registers */
	target_write_u32(target, PIC32MX_NVMCONCLR, NVMCON_NVMWREN);

	return status;
}

236
static int pic32mx_protect_check(struct flash_bank *bank)
oharboe's avatar
oharboe committed
237
{
Zachary T Welch's avatar
Zachary T Welch committed
238
	struct target *target = bank->target;
oharboe's avatar
oharboe committed
239

240
	uint32_t devcfg0;
oharboe's avatar
oharboe committed
241
242
243
244
245
246
247
248
249
250
	int s;
	int num_pages;

	if (target->state != TARGET_HALTED)
	{
		LOG_ERROR("Target not halted");
		return ERROR_TARGET_NOT_HALTED;
	}

	target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
251

zwelch's avatar
zwelch committed
252
	if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
oharboe's avatar
oharboe committed
253
		num_pages = 0xffff;  /* All pages protected */
254
	else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
oharboe's avatar
oharboe committed
255
	{
zwelch's avatar
zwelch committed
256
		if (devcfg0 & (1 << 24))
oharboe's avatar
oharboe committed
257
258
259
260
261
262
			num_pages = 0;       /* All pages unprotected */
		else
			num_pages = 0xffff;  /* All pages protected */
	}
	else /* pgm flash */
		num_pages = (~devcfg0 >> 12) & 0xff;
263

oharboe's avatar
oharboe committed
264
265
266
267
268
269
270
271
	for (s = 0; s < bank->num_sectors && s < num_pages; s++)
		bank->sectors[s].is_protected = 1;
	for (; s < bank->num_sectors; s++)
		bank->sectors[s].is_protected = 0;

	return ERROR_OK;
}

272
static int pic32mx_erase(struct flash_bank *bank, int first, int last)
oharboe's avatar
oharboe committed
273
{
Zachary T Welch's avatar
Zachary T Welch committed
274
	struct target *target = bank->target;
oharboe's avatar
oharboe committed
275
	int i;
276
	uint32_t status;
oharboe's avatar
oharboe committed
277
278
279
280
281
282
283

	if (bank->target->state != TARGET_HALTED)
	{
		LOG_ERROR("Target not halted");
		return ERROR_TARGET_NOT_HALTED;
	}

284
285
	if ((first == 0) && (last == (bank->num_sectors - 1))
		&& (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH))
oharboe's avatar
oharboe committed
286
	{
287
288
		/* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
		 * we need to use the MTAP to perform a full erase */
289
		LOG_DEBUG("Erasing entire program flash");
oharboe's avatar
oharboe committed
290
		status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
291
		if (status & NVMCON_NVMERR)
oharboe's avatar
oharboe committed
292
			return ERROR_FLASH_OPERATION_FAILED;
293
		if (status & NVMCON_LVDERR)
oharboe's avatar
oharboe committed
294
295
296
297
298
299
			return ERROR_FLASH_OPERATION_FAILED;
		return ERROR_OK;
	}

	for (i = first; i <= last; i++)
	{
300
		target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
oharboe's avatar
oharboe committed
301
302
303

		status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);

304
		if (status & NVMCON_NVMERR)
oharboe's avatar
oharboe committed
305
			return ERROR_FLASH_OPERATION_FAILED;
306
		if (status & NVMCON_LVDERR)
oharboe's avatar
oharboe committed
307
308
309
310
311
312
313
			return ERROR_FLASH_OPERATION_FAILED;
		bank->sectors[i].is_erased = 1;
	}

	return ERROR_OK;
}

314
static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
oharboe's avatar
oharboe committed
315
{
Zachary T Welch's avatar
Zachary T Welch committed
316
	struct target *target = bank->target;
oharboe's avatar
oharboe committed
317
318
319
320
321
322
323
324
325
326

	if (target->state != TARGET_HALTED)
	{
		LOG_ERROR("Target not halted");
		return ERROR_TARGET_NOT_HALTED;
	}

	return ERROR_OK;
}

327
328
/* see contib/loaders/flash/pic32mx.s for src */

329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
static const uint32_t pic32mx_flash_write_code[] = {
					/* write: */
	0x3C08AA99,		/* lui $t0, 0xaa99 */
	0x35086655,		/* ori $t0, 0x6655 */
	0x3C095566,		/* lui $t1, 0x5566 */
	0x352999AA,		/* ori $t1, 0x99aa */
	0x3C0ABF80,		/* lui $t2, 0xbf80 */
	0x354AF400,		/* ori $t2, 0xf400 */
	0x340B4003,		/* ori $t3, $zero, 0x4003 */
	0x340C8000,		/* ori $t4, $zero, 0x8000 */
					/* write_row: */
	0x2CD30080,		/* sltiu $s3, $a2, 128 */
	0x16600008,		/* bne $s3, $zero, write_word */
	0x340D4000,		/* ori $t5, $zero, 0x4000 */
	0xAD450020,		/* sw $a1, 32($t2) */
	0xAD440040,		/* sw $a0, 64($t2) */
	0x04110016,		/* bal progflash */
	0x24840200,		/* addiu $a0, $a0, 512 */
	0x24A50200,		/* addiu $a1, $a1, 512 */
	0x1000FFF7,		/* beq $zero, $zero, write_row */
	0x24C6FF80,		/* addiu $a2, $a2, -128 */
					/* write_word: */
	0x3C15A000,		/* lui $s5, 0xa000 */
	0x36B50000,		/* ori $s5, $s5, 0x0 */
	0x00952025,		/* or $a0, $a0, $s5 */
	0x10000008,		/* beq $zero, $zero, next_word */
	0x340B4001,		/* ori $t3, $zero, 0x4001 */
					/* prog_word: */
	0x8C940000,		/* lw $s4, 0($a0) */
	0xAD540030,		/* sw $s4, 48($t2) */
	0xAD450020,		/* sw $a1, 32($t2) */
	0x04110009,		/* bal progflash */
	0x24840004,		/* addiu $a0, $a0, 4 */
	0x24A50004,		/* addiu $a1, $a1, 4 */
	0x24C6FFFF,		/* addiu $a2, $a2, -1 */
					/* next_word: */
	0x14C0FFF8,		/* bne $a2, $zero, prog_word */
	0x00000000,		/* nop */
					/* done: */
	0x10000002,		/* beq $zero, $zero, exit */
	0x24040000,		/* addiu $a0, $zero, 0 */
					/* error: */
	0x26240000,		/* addiu $a0, $s1, 0 */
					/* exit: */
	0x7000003F,		/* sdbbp */
					/* progflash: */
	0xAD4B0000,		/* sw $t3, 0($t2) */
	0xAD480010,		/* sw $t0, 16($t2) */
	0xAD490010,		/* sw $t1, 16($t2) */
	0xAD4C0008,		/* sw $t4, 8($t2) */
					/* waitflash: */
	0x8D500000,		/* lw $s0, 0($t2) */
	0x020C8024,		/* and $s0, $s0, $t4 */
	0x1600FFFD,		/* bne $s0, $zero, waitflash */
	0x00000000,		/* nop */
	0x00000000,		/* nop */
	0x00000000, 	/* nop */
	0x00000000,		/* nop */
	0x00000000,		/* nop */
	0x8D510000,		/* lw $s1, 0($t2) */
	0x30113000,		/* andi $s1, $zero, 0x3000 */
	0x1620FFEF,		/* bne $s1, $zero, error */
	0xAD4D0004,		/* sw $t5, 4($t2) */
	0x03E00008,		/* jr $ra */
	0x00000000		/* nop */
};

static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
		uint32_t offset, uint32_t count)
oharboe's avatar
oharboe committed
398
{
Zachary T Welch's avatar
Zachary T Welch committed
399
	struct target *target = bank->target;
400
	uint32_t buffer_size = 16384;
401
	struct working_area *source;
402
	uint32_t address = bank->base + offset;
403
	struct reg_param reg_params[3];
404
	int retval = ERROR_OK;
405

406
	struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
407
	struct mips32_algorithm mips32_info;
oharboe's avatar
oharboe committed
408
409

	/* flash write code */
410
411
	if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
			&pic32mx_info->write_algorithm) != ERROR_OK)
oharboe's avatar
oharboe committed
412
413
414
415
416
	{
		LOG_WARNING("no working area available, can't do block memory writes");
		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
	};

417
418
419
420
	if ((retval = target_write_buffer(target,
			pic32mx_info->write_algorithm->address,
			sizeof(pic32mx_flash_write_code),
			(uint8_t*)pic32mx_flash_write_code)) != ERROR_OK)
oharboe's avatar
oharboe committed
421
422
423
		return retval;

	/* memory buffer */
Øyvind Harboe's avatar
Øyvind Harboe committed
424
	while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
oharboe's avatar
oharboe committed
425
	{
426
427
428
429
430
431
432
		buffer_size /= 2;
		if (buffer_size <= 256)
		{
			/* if we already allocated the writing code, but failed to get a
			 * buffer, free the algorithm */
			if (pic32mx_info->write_algorithm)
				target_free_working_area(target, pic32mx_info->write_algorithm);
oharboe's avatar
oharboe committed
433

434
435
436
437
438
439
440
			LOG_WARNING("no large enough working area available, can't do block memory writes");
			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
		}
	};

	mips32_info.common_magic = MIPS32_COMMON_MAGIC;
	mips32_info.isa_mode = MIPS32_ISA_MIPS32;
oharboe's avatar
oharboe committed
441

442
443
444
445
446
	init_reg_param(&reg_params[0], "a0", 32, PARAM_IN_OUT);
	init_reg_param(&reg_params[1], "a1", 32, PARAM_OUT);
	init_reg_param(&reg_params[2], "a2", 32, PARAM_OUT);

	while (count > 0)
oharboe's avatar
oharboe committed
447
	{
448
		uint32_t status;
449
450
		uint32_t thisrun_count = (count > (buffer_size / 4)) ?
				(buffer_size / 4) : count;
oharboe's avatar
oharboe committed
451

452
453
		if ((retval = target_write_buffer(target, source->address,
				thisrun_count * 4, buffer)) != ERROR_OK)
oharboe's avatar
oharboe committed
454
455
			break;

456
457
458
		buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
		buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
		buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
oharboe's avatar
oharboe committed
459

460
461
		if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
				pic32mx_info->write_algorithm->address,
462
				0,
463
				10000, &mips32_info)) != ERROR_OK)
oharboe's avatar
oharboe committed
464
465
466
467
468
469
		{
			LOG_ERROR("error executing pic32mx flash write algorithm");
			retval = ERROR_FLASH_OPERATION_FAILED;
			break;
		}

470
471
472
		status = buf_get_u32(reg_params[0].value, 0, 32);

		if (status & NVMCON_NVMERR)
oharboe's avatar
oharboe committed
473
		{
zwelch's avatar
zwelch committed
474
			LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
475
476
477
			retval = ERROR_FLASH_OPERATION_FAILED;
			break;
		}
478
479
480

		if (status & NVMCON_LVDERR)
		{
zwelch's avatar
zwelch committed
481
			LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
482
483
484
			retval = ERROR_FLASH_OPERATION_FAILED;
			break;
		}
oharboe's avatar
oharboe committed
485

486
487
488
		buffer += thisrun_count * 4;
		address += thisrun_count * 4;
		count -= thisrun_count;
oharboe's avatar
oharboe committed
489
490
491
	}

	target_free_working_area(target, source);
492
	target_free_working_area(target, pic32mx_info->write_algorithm);
oharboe's avatar
oharboe committed
493

494
495
496
	destroy_reg_param(&reg_params[0]);
	destroy_reg_param(&reg_params[1]);
	destroy_reg_param(&reg_params[2]);
oharboe's avatar
oharboe committed
497
498
499
500

	return retval;
}

501
static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word)
oharboe's avatar
oharboe committed
502
{
Zachary T Welch's avatar
Zachary T Welch committed
503
	struct target *target = bank->target;
oharboe's avatar
oharboe committed
504

505
	target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address));
oharboe's avatar
oharboe committed
506
507
508
509
510
	target_write_u32(target, PIC32MX_NVMDATA, word);

	return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
}

511
static int pic32mx_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
512
{
513
514
515
516
517
	uint32_t words_remaining = (count / 4);
	uint32_t bytes_remaining = (count & 0x00000003);
	uint32_t address = bank->base + offset;
	uint32_t bytes_written = 0;
	uint32_t status;
518
	int retval;
oharboe's avatar
oharboe committed
519
520
521
522
523
524
525

	if (bank->target->state != TARGET_HALTED)
	{
		LOG_ERROR("Target not halted");
		return ERROR_TARGET_NOT_HALTED;
	}

526
527
528
	LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
			" count: 0x%8.8" PRIx32 "", bank->base, offset, count);

oharboe's avatar
oharboe committed
529
530
	if (offset & 0x3)
	{
duane's avatar
duane committed
531
		LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
oharboe's avatar
oharboe committed
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
	}

	/* multiple words (4-byte) to be programmed? */
	if (words_remaining > 0)
	{
		/* try using a block write */
		if ((retval = pic32mx_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
		{
			if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
			{
				/* if block write failed (no sufficient working area),
				 * we use normal (slow) single dword accesses */
				LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
			}
			else if (retval == ERROR_FLASH_OPERATION_FAILED)
			{
549
550
				LOG_ERROR("flash writing failed");
				return retval;
oharboe's avatar
oharboe committed
551
552
553
554
555
556
557
558
559
560
561
562
			}
		}
		else
		{
			buffer += words_remaining * 4;
			address += words_remaining * 4;
			words_remaining = 0;
		}
	}

	while (words_remaining > 0)
	{
563
564
		uint32_t value;
		memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
oharboe's avatar
oharboe committed
565

566
		status = pic32mx_write_word(bank, address, value);
567

568
		if (status & NVMCON_NVMERR)
569
570
		{
			LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
oharboe's avatar
oharboe committed
571
			return ERROR_FLASH_OPERATION_FAILED;
572
573
		}

574
		if (status & NVMCON_LVDERR)
575
576
		{
			LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
oharboe's avatar
oharboe committed
577
			return ERROR_FLASH_OPERATION_FAILED;
578
		}
oharboe's avatar
oharboe committed
579
580
581
582
583
584
585
586

		bytes_written += 4;
		words_remaining--;
		address += 4;
	}

	if (bytes_remaining)
	{
587
		uint32_t value = 0xffffffff;
588
		memcpy(&value, buffer + bytes_written, bytes_remaining);
oharboe's avatar
oharboe committed
589

590
		status = pic32mx_write_word(bank, address, value);
591

592
		if (status & NVMCON_NVMERR)
593
594
		{
			LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
oharboe's avatar
oharboe committed
595
			return ERROR_FLASH_OPERATION_FAILED;
596
597
		}

598
		if (status & NVMCON_LVDERR)
599
600
		{
			LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
oharboe's avatar
oharboe committed
601
			return ERROR_FLASH_OPERATION_FAILED;
602
		}
oharboe's avatar
oharboe committed
603
604
605
606
607
	}

	return ERROR_OK;
}

608
static int pic32mx_probe(struct flash_bank *bank)
oharboe's avatar
oharboe committed
609
{
Zachary T Welch's avatar
Zachary T Welch committed
610
	struct target *target = bank->target;
611
	struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
612
	struct mips32_common *mips32 = target->arch_info;
613
	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
oharboe's avatar
oharboe committed
614
	int i;
615
	uint32_t num_pages = 0;
616
	uint32_t device_id;
oharboe's avatar
oharboe committed
617
618
619
620
621
	int page_size;

	pic32mx_info->probed = 0;

	device_id = ejtag_info->idcode;
622
	LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)",
duane's avatar
duane committed
623
			  device_id,
624
			  (unsigned)((device_id >> 1) & 0x7ff),
625
			  (unsigned)((device_id >> 12) & 0xffff),
626
			  (unsigned)((device_id >> 28) & 0xf));
oharboe's avatar
oharboe committed
627

628
	if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
629
		LOG_WARNING("Cannot identify target as a PIC32MX family.");
oharboe's avatar
oharboe committed
630
631
632
633
634
		return ERROR_FLASH_OPERATION_FAILED;
	}

	page_size = 4096;

635
	if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH)
oharboe's avatar
oharboe committed
636
	{
637
638
639
640
641
642
643
644
645
646
647
648
649
		/* 0x1FC00000: Boot flash size */
#if 0
		/* for some reason this register returns 8k for the boot bank size
		 * this does not match the docs, so for now set the boot bank at a
		 * fixed 12k */
		if (target_read_u32(target, PIC32MX_BMXBOOTSZ, &num_pages) != ERROR_OK) {
			LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 12k flash");
			num_pages = (12 * 1024);
		}
#else
		/* fixed 12k boot bank - see comments above */
		num_pages = (12 * 1024);
#endif
oharboe's avatar
oharboe committed
650
	}
651
	else
oharboe's avatar
oharboe committed
652
	{
653
654
655
656
657
		/* read the flash size from the device */
		if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
			LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
			num_pages = (512 * 1024);
		}
oharboe's avatar
oharboe committed
658
659
	}

660
	LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
oharboe's avatar
oharboe committed
661

662
663
664
665
666
667
	if (bank->sectors)
	{
		free(bank->sectors);
		bank->sectors = NULL;
	}

oharboe's avatar
oharboe committed
668
	/* calculate numbers of pages */
669
	num_pages /= page_size;
oharboe's avatar
oharboe committed
670
671
	bank->size = (num_pages * page_size);
	bank->num_sectors = num_pages;
672
	bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
oharboe's avatar
oharboe committed
673

674
	for (i = 0; i < (int)num_pages; i++)
oharboe's avatar
oharboe committed
675
676
677
678
679
680
681
682
683
684
685
686
	{
		bank->sectors[i].offset = i * page_size;
		bank->sectors[i].size = page_size;
		bank->sectors[i].is_erased = -1;
		bank->sectors[i].is_protected = 1;
	}

	pic32mx_info->probed = 1;

	return ERROR_OK;
}

687
static int pic32mx_auto_probe(struct flash_bank *bank)
oharboe's avatar
oharboe committed
688
{
689
	struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
oharboe's avatar
oharboe committed
690
691
692
693
694
	if (pic32mx_info->probed)
		return ERROR_OK;
	return pic32mx_probe(bank);
}

695
static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
oharboe's avatar
oharboe committed
696
{
Zachary T Welch's avatar
Zachary T Welch committed
697
	struct target *target = bank->target;
698
	struct mips32_common *mips32 = target->arch_info;
699
	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
700
	uint32_t device_id;
701
	int printed = 0, i;
oharboe's avatar
oharboe committed
702
703
704

	device_id = ejtag_info->idcode;

705
	if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
706
707
		snprintf(buf, buf_size,
				 "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
708
				 (unsigned)((device_id >> 1) & 0x7ff),
duane's avatar
duane committed
709
				 PIC32MX_MANUF_ID);
oharboe's avatar
oharboe committed
710
711
		return ERROR_FLASH_OPERATION_FAILED;
	}
712

zwelch's avatar
zwelch committed
713
	for (i = 0; pic32mx_devs[i].name != NULL; i++)
714
	{
715
		if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
oharboe's avatar
oharboe committed
716
717
718
719
720
			printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
			break;
		}
	}

721
722
	if (pic32mx_devs[i].name == NULL) {
		printed = snprintf(buf, buf_size, "Unknown");
oharboe's avatar
oharboe committed
723
724
	}

725
726
	buf += printed;
	buf_size -= printed;
727
	snprintf(buf, buf_size, " Ver: 0x%02x",
728
			(unsigned)((device_id >> 28) & 0xf));
oharboe's avatar
oharboe committed
729
730
731
732

	return ERROR_OK;
}

733
COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
oharboe's avatar
oharboe committed
734
{
735
	uint32_t address, value;
oharboe's avatar
oharboe committed
736
737
	int status, res;

738
	if (CMD_ARGC != 3)
oharboe's avatar
oharboe committed
739
	{
740
		command_print(CMD_CTX, "pic32mx pgm_word <addr> <value> <bank>");
oharboe's avatar
oharboe committed
741
742
743
		return ERROR_OK;
	}

744
745
	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
	COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
746

747
	struct flash_bank *bank;
748
	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank);
749
750
	if (ERROR_OK != retval)
		return retval;
oharboe's avatar
oharboe committed
751

zwelch's avatar
zwelch committed
752
	if (address < bank->base || address >= (bank->base + bank->size))
oharboe's avatar
oharboe committed
753
	{
754
		command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
oharboe's avatar
oharboe committed
755
756
757
758
759
		return ERROR_OK;
	}

	res = ERROR_OK;
	status = pic32mx_write_word(bank, address, value);
760
	if (status & NVMCON_NVMERR)
oharboe's avatar
oharboe committed
761
		res = ERROR_FLASH_OPERATION_FAILED;
762
	if (status & NVMCON_LVDERR)
oharboe's avatar
oharboe committed
763
764
765
		res = ERROR_FLASH_OPERATION_FAILED;

	if (res == ERROR_OK)
766
		command_print(CMD_CTX, "pic32mx pgm word complete");
oharboe's avatar
oharboe committed
767
	else
768
		command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
oharboe's avatar
oharboe committed
769
770
771

	return ERROR_OK;
}
772

Spencer Oliver's avatar
Spencer Oliver committed
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
COMMAND_HANDLER(pic32mx_handle_unlock_command)
{
	uint32_t mchip_cmd;
	struct target *target = NULL;
	struct mips_m4k_common *mips_m4k;
	struct mips_ejtag *ejtag_info;
	int timeout = 10;

	if (CMD_ARGC < 1)
	{
		command_print(CMD_CTX, "pic32mx unlock <bank>");
		return ERROR_OK;
	}

	struct flash_bank *bank;
	int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
	if (ERROR_OK != retval)
		return retval;

	target = bank->target;
	mips_m4k = target_to_m4k(target);
	ejtag_info = &mips_m4k->mips32.ejtag_info;

	/* we have to use the MTAP to perform a full erase */
	mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
	mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);

	/* first check status of device */
	mchip_cmd = MCHP_STATUS;
	mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
	if (mchip_cmd & (1 << 7))
	{
		/* device is not locked */
		command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
	}

	/* unlock/erase device */
810
	mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
Spencer Oliver's avatar
Spencer Oliver committed
811

812
	mips_ejtag_drscan_8_out(ejtag_info, MCHP_ERASE);
Spencer Oliver's avatar
Spencer Oliver committed
813
814
815
816
817
818
819
820
821
822
823
824

	do {
		mchip_cmd = MCHP_STATUS;
		mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
		if (timeout-- == 0)
		{
			LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
			break;
		}
		alive_sleep(1);
	} while ((mchip_cmd & (1 << 2)) || (!(mchip_cmd & (1 << 3))));

825
	mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST);
Spencer Oliver's avatar
Spencer Oliver committed
826
827
828
829
830
831
832
833
834
835
836

	/* select ejtag tap */
	mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);

	command_print(CMD_CTX, "pic32mx unlocked.\n"
			"INFO: a reset or power cycle is required "
			"for the new settings to take effect.");

	return ERROR_OK;
}

837
838
839
static const struct command_registration pic32mx_exec_command_handlers[] = {
	{
		.name = "pgm_word",
David Brownell's avatar
David Brownell committed
840
		.handler = pic32mx_handle_pgm_word_command,
841
842
843
		.mode = COMMAND_EXEC,
		.help = "program a word",
	},
Spencer Oliver's avatar
Spencer Oliver committed
844
845
846
847
848
849
850
	{
		.name = "unlock",
		.handler = pic32mx_handle_unlock_command,
		.mode = COMMAND_EXEC,
		.usage = "[bank_id]",
		.help = "Unlock/Erase entire device.",
	},
851
852
	COMMAND_REGISTRATION_DONE
};
853

854
855
856
857
858
859
860
861
862
static const struct command_registration pic32mx_command_handlers[] = {
	{
		.name = "pic32mx",
		.mode = COMMAND_ANY,
		.help = "pic32mx flash command group",
		.chain = pic32mx_exec_command_handlers,
	},
	COMMAND_REGISTRATION_DONE
};
863

864
struct flash_driver pic32mx_flash = {
David Brownell's avatar
David Brownell committed
865
866
867
868
869
870
	.name = "pic32mx",
	.commands = pic32mx_command_handlers,
	.flash_bank_command = pic32mx_flash_bank_command,
	.erase = pic32mx_erase,
	.protect = pic32mx_protect,
	.write = pic32mx_write,
871
	.read = default_flash_read,
David Brownell's avatar
David Brownell committed
872
873
874
875
876
877
	.probe = pic32mx_probe,
	.auto_probe = pic32mx_auto_probe,
	.erase_check = default_flash_mem_blank_check,
	.protect_check = pic32mx_protect_check,
	.info = pic32mx_info,
};