This is in preparation to support switching the system clock on the fly.
Changing the prescaler of the timer was found to be the easiest option and appears to be glitch free.
Timer frequency is now held close to a value which can be achieved both with a 48 MHz PCLK (96 MHz system clock) and a 7.5 MHz PCLK (15 MHz system clock).
If even lower PCLKs should be supported, the frequency of the timer has to be changed as well.